REGISTER now for FREE 
|
FREE patent keyword monitoring and additional FREE benefits. REGISTER now for FREE
|
|
|
Data Processing: Software Development, Installation, And Management > Software Program Development Tool (e.g., Integrated Case Tool Or Stand-alone Development Tool) > Translation Of Code > Compiling Code > Optimization > Code Restructuring Code RestructuringCode Restructuring patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/11/07 - 20070240142 - Apparatus and method for ensuring maximum code motion of accesses to dma buffers A “kill” intrinsic that may be used in programs for designating specific data objects as having been “killed” by a preceding action is provided. The concept of a data object being “killed” is that the compiler is informed that no operations (e.g., loads and stores) on that data object, or ... 09/27/07 - 20070226723 - Efficient generation of simd code in presence of multi-threading and other false sharing conditions and in machines having memory protection support A computer implemented method, system and computer program product for automatically generating SIMD code, particularly in the presence of multi-threading and other false sharing conditions, and in machines having a segmented/virtual page memory protection system. The method begins by analyzing data to be accessed by a targeted loop including at ... 08/16/07 - 20070192762 - Method to analyze and reduce number of data reordering operations in simd code A method for analyzing data reordering operations in Single Issue Multiple Data source code and generating executable code therefrom is provided. Input is received. One or more data reordering operations in the input are identified and each data reordering operation in the input is abstracted into a corresponding virtual shuffle ... 08/02/07 - 20070180440 - Methods and apparatus for meta-architecture defined programmable instruction fetch functions supporting assembled variable length instruction processors A computing architecture and software techniques are described which modifies the basic sequential instruction fetching mechanism of a processor by separating a program's control flow from its functional execution flow. A compiled sequential HLL program's static control structures are analyzed and a separate program based on its own unique instructions ... 07/05/07 - 20070157188 - Operation frame filtering, building, and execution The present subject matter relates to operation frame filtering, building, and execution. Some embodiments include identifying a frame signature, counting a number of execution occurrences of the frame signature, and building a frame of operations to execute instead of operations identified by the frame signature. ... 09/21/06 - 20060212863 - Method and apparatus for processor code optimization using code compression An improved method of optimizing the instruction set of a digital processor using code compression. In one embodiment, the method comprises obtaining an assembly language program to be used for the optimization process; calculating the static frequency of each instruction type from the base instruction set; sorting the instruction types ... 07/06/06 - 20060150171 - Control words for instruction packets of processors and methods thereof An instruction packet having an extended machine language instruction may include at least a machine language instruction having encoded bits of an operation and a control word including bits of one or more extension fields. The structure and meaning of the extension fields may depend upon the extended machine language ... 06/15/06 - 20060130030 - Method and apparatus for timing information flow in a distributed system A computer and software method and apparatus for distributed data processing which provides agreement between data sources (sensors) and data sinks (actuators) as to what data has been written into a shared buffer. The invention further provides methods and means for meeting data timeliness requirements. Invention employs a programming primitive ... 12/29/05 - 20050289530 - Scheduling of instructions in program compilation A method and apparatus for scheduling of instructions for program compilation are provided. An embodiment of a method comprises placing a plurality of computer instructions in a plurality of priority queues, each priority queue representing a class of computer instruction; maintaining a state value, the state value representing any computer ... 12/15/05 - 20050278714 - Warp processor for dynamic hardware/software partitioning A warp processor includes a microprocessor, profiler, dynamic partitioning module, and warp configurable logic architecture. The warp processor initially executes a binary for an application entirely on the microprocessor, the profiler monitors the execution of the binary to detect its critical code regions, and the dynamic partitioning module partitions the ... 08/25/05 - 20050188364 - System and method for automatic parallelization of sequential code Systems and methods are described for automatically transforming essentially sequential code into a plurality of codes which are to be executed in parallel to achieve the same or equivalent result to the sequential code. User-defined task boundaries are determined in the input code to thereby define a plurality of tasks. ... 08/18/05 - 20050183079 - Tail duplicating during block layout In one embodiment of the present invention, a method includes duplicating a block of a code segment into a tail duplicate block during block layout of the code segment, thus integrating block layout and tail duplication. After such duplication, the original block may be laid out and the tail duplicate ... 08/11/05 - 20050177823 - License management Licenses to an OS are managed for each recording medium used for recording the OS. A removable recording medium having the OS recorded thereon is read and activated by a computer and allows the computer to: read recording medium identification data from the recording medium; read, from the recording medium, ... 06/16/05 - 20050132345 - Automatic task distribution in scalable processors The present invention relates to a processing method and apparatus for processing an information based on a sequence of instructions, wherein a repeated sub-sequence is detected in the sequence of instructions and an allocation between a processing resource and said repeated sub-sequence is determined based on an index information indicating ... 06/09/05 - 20050125785 - Method for binary-level branch reversal on computer architectures supporting predicted execution Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be made that causes the conditional branch instruction to trigger, or execute, when an opposite ... ### FreshPatents.com Support |