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Data Processing: Design And Analysis Of Circuit Or Semiconductor Mask > Circuit Design Circuit DesignCircuit Design patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.11/08/07 - 20070261010 - Nonlinear driver model for multi-driver systems A precharacterized cell library for EDA tools includes driver model data includes output current signals indexed by output voltages. The driver model can then generate a model output by interpolating the output current signals using the output voltage to generate an output current. The output current can then be used ... 11/08/07 - 20070261009 - Programmable devices to route signals on probe cards A probe card of a wafer test system includes one or more programmable ICs, such as FPGAs, to provide routing from individual test signal channels to one of multiple probes. The programmable ICs can be placed on a base PCB of the probe card, or on a daughtercard attached to ... 10/18/07 - 20070245271 - Frequency divider monitor of phase lock loop A design structure for designing, manufacturing, and/or testing a frequency divider and monitoring circuit. The circuit including a phase locked loop circuit including a voltage controlled oscillator and a feedback frequency divider, an output of the voltage controlled oscillator connected to an input of the feedback frequency divider, and output ... 10/18/07 - 20070245270 - Method for manufacturing a programmable system in package Some embodiments provide a method for manufacturing a programmable system in package. The method divides a system into sets of operations. For each set of operations, the method identifies several integrated circuits (“IC's”) for performing the set of operations. The method packages several of identified IC's into a single IC ... 10/11/07 - 20070240083 - Processing apparatus In a processing apparatus, a plurality of processors which perform different kinds of processing is integrated on a first semiconductor substrate. A plurality of memories to be managed by the plurality of processors integrated on the first semiconductor substrate is integrated on a second semiconductor substrate. The plurality of processors ... 10/11/07 - 20070240082 - Shallow trench avoidance in integrated circuits Diffusion regions in a standard cell design are bridged across cell boundaries. Shallow trench isolation is reduced and nitride passivation thickness variation is reduced. ... 10/04/07 - 20070234242 - Logic circuit, logic circuit design method, logic circuit design system, and logic circuit design program A latch conversion circuit which is to be added to a basic logic circuit to obtain a latch circuit having an extremely small through delay amount is prepared in advance. Moreover, provided is means for obtaining a latch circuit position whereat the shifting of the clock edge, such as skew ... 10/04/07 - 20070234241 - Data processing system and method A data processing system and method is proposed. The data processing system is connected with a component library and an original design database. The component library includes component data including part numbers and attributes of components while the original design database stores original design data of pins, nets and codes ... 10/04/07 - 20070234240 - Automatically optimize performance of package execution Various technologies and techniques are disclosed that automatically optimize package execution performance. A profiling phase executes each task in a control flow package and measures performance metrics, such as task execution length, task memory usage, task correlation to CPU versus input/output operations, network bandwidth, and running applications. An optimization phase ... 09/27/07 - 20070226659 - Extracting high frequency impedance in a circuit design using an electronic design automation tool Exemplary impedance extraction methods, systems, and apparatus are described herein. In one exemplary embodiment, for instance, a signal-wire segment of a circuit layout is selected. A predetermined number of return paths are identified for the selected signal-wire segment. The selected signal-wire segment and the identified return paths are further segmented ... 09/20/07 - 20070220451 - Method for modeling and documenting a network A network documentation system computer program (302) for documenting a network (100) receives a configuration of elements (205) within the network (100). Methodology (320) of the program represents the elements (205) by nodes (336) in a model of the network (100). Each of the nodes (336) is defined by one ... 09/20/07 - 20070220450 - Computer-executable circuit drawing file integration interface and system thereof A computer-executable circuit drawing file integration interface and system thereof is provided. The interface and system are used to merge more than one circuit drawing file into a consolidated circuit drawing file. The interface comprises a first file selection window, used to enable the user to select and preview the ... 08/23/07 - 20070198955 - Method and apparatus for monitoring cross-sectional shape of a pattern formed on a semiconductor device A method is provided for estimating a cross-sectional shape or for monitoring manufacturing process parameters of a semiconductor device pattern to be measured. In this method, in order to enable SEM-based management of the cross-sectional shape or manufacturing process parameters of the pattern to be measured, the association between the ... 07/26/07 - 20070174794 - Method and apparatus for automated synthesis of multi-channel circuits Methods and apparatuses to time-share resources having internal states are described. A first design of a system having a plurality of instances of a logical block to perform logical operations is received. The instances may have internal states. The system is automatically transformed to generate a second design having a ... 07/26/07 - 20070174793 - Automatic design device, automatic design method, and automatic design program An automatic design device includes: a calculating section calculating additional geometries added to basic geometries including wiring lines and vias arranged on a chip region; a classifying section classifying the additional geometries into at least an additional graphic required for manufacture and an additional graphic required for circuit characteristics in ... 06/14/07 - 20070136698 - Method, system and apparatus for a parser for use in the processing of structured documents Embodiments of systems, methods and apparatuses for a parser for generating one or more data structures representative of a structured document are disclosed. More specifically, embodiments of a parser may comprise hardware circuitry operable to receive a structured document, begin parsing the structured document as it is being received and ... 06/07/07 - 20070130548 - Point and click expression builder In one embodiment, a method for constructing an application includes presenting to a user a list of possible elements for a logic expression. The possible elements may include one or more names of variables. The method further includes receiving a user selection of one or more elements from the list ... 05/31/07 - 20070124706 - Method and system for representing analog connectivity in hardware description language designs System and method for representing analog connectivity in a design written in a hardware description language are disclosed. The method includes detecting a circuit component that does not have explicit connection path in the design, where the circuit component includes one or more lower-level circuit instances arranged in one or ... 05/24/07 - 20070118822 - Confirmation system for authenticity of article and confirmation method An article confirmation method has reading irreproducible fine characteristics from a genuine article, reading irreproducible fine characteristics from an article to be confirmed, comparing the irreproducible fine characteristics between the genuine article and the article to be confirmed, and determining authenticity of the article to be confirmed based on a ... 05/17/07 - 20070113208 - Memory compiler redundancy An improved redundancy architecture for embedded memories in an ASIC chip includes one or more compiler-generated embedded memory instances. Each embedded memory instance has a universal register for storing an address of a defective subunit of the memory instance from a variety of sources. A control block is located on ... 05/10/07 - 20070106962 - Image processing method, recorded matter, storage medium, image processing apparatus, image forming method, image forming apparatus, image forming system, and ink An image processing method of processing image data includes a color space conversion step of converting an input color signal of image data into an output color signal having cyan (C), magenta (M), and yellow (Y) values; a black generation/under color removal step of converting the CMY values into cyan ... 05/10/07 - 20070106961 - System and method for reformatting a motherboard design file A method for reformatting a motherboard design file includes the steps of: converting the motherboard design file from a first format to a second format, and generating a converted temp file based on the motherboard design file; selecting information classes of the converted temp file; parsing contents from the converted ... 05/10/07 - 20070106960 - System and method for the development and distribution of a vhdl intellectual property core Provided is a system and method for the development and distribution of a VHDL Intellectual Property (“IP”) Core. In particular, the system includes a module for regulating source control of core design files, a module for extracting or adding information to a file, and for controlling file release consistent with ... 05/03/07 - 20070101301 - Simulation appartus, simulation method, and semiconductor device An apparatus for simulating a current-voltage characteristic of a device includes an atomic structure creating unit that creates an atomic structure model of the device, an electronic structure calculating unit that calculates an electronic structure in the atomic structure model, a first IV characteristic calculating unit that calculates the current-voltage ... 04/12/07 - 20070083831 - Various methods and apparatuses for estimating characteristics of an electronic system's design Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area, and power characteristics of an electronic system design. The IP Generator receives a user-supplied file having data describing a configuration of an IP design having multiple levels of hierarchy. The IP Generator also receives user-supplied ... 04/12/07 - 20070083830 - Various methods and apparatuses for an executable parameterized timing model Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area and power constraints in an electronic design system. The IP Generator receives a user-supplied file having data describing a configuration of an intellectual property (IP) design, the data includes one or more configuration parameters. The ... 04/05/07 - 20070079261 - Integrated circuit device and method for forming the same In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines ... 03/29/07 - 20070074134 - Semiconductor integrated circuit for reducing leak current through mos transistors A semiconductor device is composed of: a power control region within which function cells are arranged; a basic power supply line overlapping said power control region, and positioned in a power supply interconnection layer; a virtual power supply line arranged in said power control region in a direction perpendicular to ... 03/08/07 - 20070055951 - Device and method for measuring microporous film on battery electrode plate, coater equipped with film measuring device, and coating method using film measuring method There is provided a film measuring device capable of accurately and easily measuring the thickness of a microporous film formed on a battery electrode plate over the entire area of the film. A color CCD sensor 8 shoots the microporous film. A video board 11 converts a color tone of ... 03/08/07 - 20070055950 - System and method for selecting mosfets suitable for a circuit design The present invention provides a computer-based method for selecting MOSFETs suitable for a circuit design. The method includes the steps of: providing a database (18) that stores specifications and product information of various MOSFETs; receiving specifications of a circuit design; analyzing the circuit design specifications and determining whether the circuit ... 03/01/07 - 20070050735 - Method, system and program product for specifying and using register entities to configure a simulated or physical digital system In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains first and second latches each having a respective plurality of different possible latch values. With one or more statements, a first ... 02/22/07 - 20070044044 - Automating power domains in electronic design automation One or more portions of the design (e.g., components, channels, or portions thereof) can be assigned instances of one or more component power domains (CPDs). Assigning an instance of a CPD to a design element (or to a portion thereof) can indicate, for example, whether the element can be switched ... 02/22/07 - 20070044043 - Dbr film for laser imaging A system for imaging a substrate can comprise an image data source, an electromagnetic radiation source operatively connected to the image data source and configured to emit electromagnetic radiation in accordance with information provided by the image data source, and a DBR film applied to a substrate. The DBR film ... 02/15/07 - 20070038967 - System and method for design, procurement and manufacturing collaboration A method for designing an electronic component includes receiving a device criteria (e.g., a parametric value, procurement value, etc.) from a designer, querying a database for devices corresponding to the device criteria, querying the database for procurement data and/or engineering data associated with the corresponding devices, presenting the devices to ... 02/15/07 - 20070038966 - Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components A method realizes an electric connection between a nanometric circuit and standard electronic components. The method includes: providing, above a semiconductor substrate, a seed having a notched wall substantially perpendicular to the substrate, the wall having n recesses spaced apart from one another; and realizing n conductive nanowires alternated with ... 02/15/07 - 20070038965 - Photo printing system and photo printing method A photo printing system and a photo printing method are provided. The photo printing system includes a printer for receiving printing data, printing an image on an image portion of a photo printing medium on which an image should be printed, and printing a message on a tear-off portion of ... 02/15/07 - 20070038964 - System and method for extracting material differences between different circuit board design diagrams A system is provided for extracting material changes in different design diagrams of a motherboard. The system includes: an extracting module for extracting a first raw BOM from a first circuit design diagram of the motherboard, and for extracting a second raw BOM from a second circuit design diagram of ... 02/08/07 - 20070033548 - Semiconductor integrated circuit device In a semiconductor integrated circuit device, a VDD wiring trace and a GND wiring trace are routed along an N-well and a P-well, respectively, within a substrate. A substrate-bias VDD2 wiring trace is routed in a direction that intersects the VDD wiring trace and GND wiring trace in the same ... 02/08/07 - 20070033547 - Input capacitance characterization method in ip library A methodology for characterization of an IP (Intellectual Property) component is provided. Digital pins are recognized by skipping analog pins and special IO pins. First two layers of the IP component are classified in response to connection of the input pins. Partial circuits of the IP component are extracted for ... 02/01/07 - 20070028194 - Semiconductor device In a semiconductor device having a large-scale arithmetic circuit, when there is delay in clock signals, a malfunction occurs in a circuit. In particular, in an environment where supply voltage varies as in a wireless chip, it is very difficult to precisely estimate delays in clock signals in designing. Further, ... 02/01/07 - 20070028193 - Multiple voltage integrated circuit and design method therefor An integrated circuit (IC) design, method and program product for reducing IC design power consumption. The IC is organized in circuit rows. Circuit rows may include a low voltage island powered by a low voltage (Vddl) supply and a high voltage island powered by a high voltage (Vddh) supply. Circuit ... 01/25/07 - 20070022392 - Multi-variable polynomial modeling techniques for use in integrated circuit design Techniques are disclosed for modeling a cell of an integrated circuit design. In one aspect of the invention, a full-space polynomial model is fit to cell information comprising measured data points associated with one or more independent variables such as voltage slew, capacitive load, supply voltage or temperature. Error values ... 01/11/07 - 20070011627 - Compilable, reconfigurable network processor A processor, particularly a network processor, is designed by first writing code to be processed by the processor. That code is then electronically compiled to design hardware of the processor and to provide executable code for execution on the designed hardware. To facilitate compilation, the written code may be restricted ... 01/04/07 - 20070006103 - Signal flow driven circuit analysis and partitioning technique A method for generating a layout for an analog circuit design is provided. The method includes tracing a signal flow through a circuit netlist, and partitioning the circuit netlist into a digital portion and an analog portion. A signal flow is defined through the analog portion of the circuit netlist. ... 12/14/06 - 20060282798 - Efficient electromagnetic modeling of irregular metal planes A method of modeling electromagnetism in an irregular conductive plane, by dividing the surface into a grid of unequal and unaligned rectangles, assigning a circuit node location to a center of each rectangle, and calculating capacitive and inductive parameters based on the center circuit node locations. Rectangulation is accomplished using ... 11/23/06 - 20060265673 - Facilitating high level validation of integrated circuits in parallel with development of blocks in a hierarchical design approach A design management tool which automates the parallel validation of an entire integrated circuit while the individual blocks (together forming the integrated circuit) are designed. In an embodiment, a designer specifies various checkpoints associated with each design stage, and the specific information to be made available to a top level ... 11/16/06 - 20060259878 - Automated processor generation system for designing a configurable processor and method for the same An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger ... 11/09/06 - 20060253809 - Hierarchial semiconductor design Hierarchical semiconductor structure design is disclosed. One aspect of the invention is a computerized system that includes a semiconductor structure (such as a semiconductor test structure) and a basic atom. The system also includes a hierarchy of abstractions ordered from highest to lowest. Each abstraction relates a plurality of instances ... 11/09/06 - 20060253808 - Library of cells for use in designing sets of domino logic circuits in a standard cell library, or the like, and method for using same A cell library for designing integrated domino circuits has a first library portion with a plurality of selectable logic circuits having different transistor sizes and/or logic functions for selection according to desired logic function and parametric characteristics. A second library portion includes a plurality of selectable prechargeable driver circuits. Each ... 11/09/06 - 20060253807 - Recording medium and data processing device While reproducing content stored in a recording medium, a user terminal as a data processing device downloads a related content as different content related to the reproduction target content from a content distribution server via a communication network. Immediately after the reproduction of the reproduction target content is completed, a ... 11/09/06 - 20060253806 - Content based yield prediction of vlsi designs A system, method and program product for predicting yield of a VLSI design. A method is providing including the steps of: identifying and grouping sub-circuits contained within an integrated circuit design by type; calculating critical area values for regions within the integrated circuit design; and applying different yield models to ... 10/26/06 - 20060242611 - Integrating programmable logic into personal computer (pc) architecture A portion of chip die real estate is allocated to blocks of programmable logic (PL) fabric. These blocks can be used to load special purpose processors which operate in concert with the general purpose processors (GPPs). These processors, implemented in PL, may integrate with a PC system architecture. Blocks of ... 10/26/06 - 20060242610 - Systems and methods of data traffic generation via density estimation Systems and methods for providing density-based traffic generation. Data are clustered to create partitions, and transforms of clustered data are constructed in a transformed space. Data points are generated via employing grid discretization in the transformed space, and density estimates of the generated data points are employed to generate synthetic ... 10/19/06 - 20060236273 - System, method and program for designing a semiconductor integrated circuit using standard cells A computer implemented method for designing a semiconductor integrated circuit includes analyzing information of standard cells to be arranged in a chip area based on circuit behavior information so as to generate standard cell information, generating a mega cell including a group of standard cells, based on the standard cell ... 10/19/06 - 20060236272 - System and method for automatically calculating parameters of an mosfet A system for automatically calculating parameters of an MOSFET is disclosed. The parameter calculating system runs in a computer. The parameter calculating system is used for receiving values input by the users, and for calculating parameters of the MOSFET according to the input values. The parameter calculating system includes a ... 10/19/06 - 20060236271 - Optical lithography correction process A apparatus and method for correcting a process critical layout includes characterizing the influence of individual ones of a set of worst case process variations on a simulated nano-circuit layout design and then correcting layout geometries in the simulated nano-circuit layout based on such characterizations. ... 10/19/06 - 20060236270 - Composable system-in-package integrated circuits and process of composing the same An SIP for performing a plurality of hard and soft functions comprises standard IC die and custom platforms mounted to a substrate. Die are identified for each standard hard function, such as memory, processing, I/O and other standard functions and one or more user-configurable base platforms are selected that, when ... 10/12/06 - 20060230364 - Method and computer program product for generation of bus functional models In accordance with the present invention, there is provided a method for creating a Bus Functional Model of an Integrated Circuit. The method comprises the following steps: providing (102) a detailed specification of said Integrated Circuit, defining (104) an architecture for said Bus Functional Model. In the following step data ... 10/05/06 - 20060225004 - Apparatus for giving assistance in analyzing deficiency in rtl-input program and method of doing the same An apparatus for giving assistance in analyzing deficiency in a RTL-input program, includes a partial RTL creator which creates partial RTL description data containing logic description identical with logic description extracted from successive portions of input RTL description data, and having correspondence in signals identical with the same in the ... 10/05/06 - 20060225003 - Engineering design system using human interactive evaluation A design system includes a design engine for generating designs, an evaluation process for evaluating the generated designs based on human visual inspection and/or domain knowledge, and an optimization process for pruning based at least in part on the evaluation. Generation of additional designs is performed based on optimization. Newly-generated ... 10/05/06 - 20060225002 - Circuit having hardware threading Hardware threading optimizes use of hardware resources in a dynamic workload environment. Unutilized hardware resources are dynamically borrowed to increase throughput performance and/or power savings by enabling parallel processing of application pipeline stages. ... 08/24/06 - 20060190846 - Building metal pillars in a chip for structure support Stacked via pillars, such as metal via pillars, are provided at different and designated locations in IC chips to support the chip structure during processing and any related processing stresses such as thermal and mechanical stresses. These stacked via pillars connect and extend from a base substrate of the strip ... 08/10/06 - 20060179416 - Semiconductor device and bios authentication system A semiconductor device comprises a semiconductor substrate, a basic module having a memory cell unit composed of first nonvolatile memory cells or a processor unit on a part of the substrate, an authentication module which has second nonvolatile memory cells in an area different from that of the basic module ... 07/20/06 - 20060161873 - Method for designing integrated circuit package and method for manufacturing same A new IC package 12 is designed as follows. That is, a circuit block 2 is omitted from an existing IC package 11 including a package 11a having a circuit block 1 and the circuit block 2 which are connected to a plurality of terminals including high-frequency terminals, but the ... 07/06/06 - 20060150126 - Hardware verification scripting Exemplary techniques for verifying a hardware design are described. In a described embodiment, a method comprises compiling an error verification object corresponding to an error verification command to verify a portion of a hardware design of a device under test. The error verification object is compiled in accordance with data ... 06/22/06 - 20060136848 - Cell, standard cell, standard cell library, a placement method using standard cell, and a semiconductor integrated circuit A cell according to the present invention comprises a plurality of terminals capable of transmitting an input signal or an output signal and serving as a minimum unit in designing a semiconductor integrated circuit, wherein the plurality of terminals is located on routing grids lined in a Y direction which ... 06/08/06 - 20060123363 - Method and apparatus for automated design of quantum circuits The present invention provides an algebraic approach to quantum circuit design based on using a GSVD (Generalized Singular Value Decomposition) to map a unitary matrix, representing a desired quantum computation, into a product of block diagonal unitary matrices, each of which can then be mapped into equivalent circuit fragments. The ... 06/01/06 - 20060117275 - Asynchronous communication network for multi-element integrated circuit system Embodiments of the invention include a system for communication within an integrated circuit. Hardware object nodes are connected to one another through a system of physical channels. Messages are sent from one node to another over the channels. The messages can be asynchronous in nature, as well as time-insensitive. The ... 06/01/06 - 20060117274 - Behavior processor system and method The debug system described in this patent specification provides a system that generates hardware elements from normally non-synthesizable code elements for placement on an FPGA device. This particular FPGA device is called a Behavior Processor. This Behavior Processor executes in hardware those code constructs that were previously executed in software. ... 05/25/06 - 20060112355 - Method and process for design of integrated circuits using regular geometry patterns to obtain geometrically consistent component features The invention provides a method and process for designing an integrated circuit based on using the results from both 1) a specific set of silicon test structure characterizations and 2) the decomposition of logic into combinations of simple logic primitives, from which a set of logic bricks are derived that ... 05/18/06 - 20060107239 - Standard cell library having cell drive strengths selected according to delay A cell library which enables reduced quantization over-design in large scale circuit design is provided. Library cells having the same cell function have drive strengths selected to provide delays about equal to a predetermined set of design delays, at a nominal load corresponding to the cell function. In contrast, conventional ... 05/04/06 - 20060095872 - Integrated circuit devices and methods and apparatuses for designing integrated circuit devices Methods and apparatuses to design an Integrated Circuit (IC) with a shielding of wires. In at least one embodiment, a shielding mesh of at least two reference voltages (e.g., power and ground) is used to reduce both the capacitive coupling and the inductive coupling in routed signal wires in IC ... 05/04/06 - 20060095871 - Nonlinear receiver model for gate-level delay caculation A characterized cell library for EDA tools includes receiver model data that provides two or more capacitance values for a given receiver modeling situation (signal type and operating conditions). The receiver model can then use different capacitance values to generate different portions of the model receiver signal, thereby enabling more ... 05/04/06 - 20060095870 - Power network analyzer for an integrated circuit design A design of an integrated circuit device, in which locations of power wires and memory/logic circuitry are known, is analyzed by at least: identifying intersections of power wires with one another, for power wires that are electrically connected to one another through vias; segmenting power wires, at their intersections; preparing ... 05/04/06 - 20060095869 - Nonlinear driver model for multi-driver systems A precharacterized cell library for EDA tools includes driver model data includes output current signals indexed by output voltages. The driver model can then generate a model output by interpolating the output current signals using the output voltage to generate an output current. The output current can then be used ... 02/16/06 - 20060036973 - Method and an apparatus to design a processing system using a graphical user interface A method and an apparatus to design a processing system using a graphical user interface (GUI) are described. The method includes allowing a user to define a transfer function via a GUI. The method may further include submitting the transfer function to a processing device maker associated with a processing ... 02/16/06 - 20060036972 - Interchangeable integrated circuit building blocks Interchangeable integrated circuit building blocks include functionally equivalent integrated circuit building blocks, having similar footprints, and having one or more dissimilar features or operational characteristics. The functionally equivalent integrated circuit building blocks are interchangeable in a design layout without having to re-place and re-route. The functionally equivalent integrated circuit building ... 02/09/06 - 20060031790 - Trusted computing platform In more detail, the main processing unit (21) of the computing platform is directed to address the trusted hardware device (24), in advance of the BIOS memory, after release from ‘reset’. The trusted hardware device (24) is configured to receive memory read signals from the main processing unit (21) and, ... 02/09/06 - 20060031789 - Built-in self-test emulator Systems, methods, and a computer program are disclosed. One embodiment comprises a compiler for developing verification tests of an integrated circuit. The compiler comprises an interface and a built-in self-test (BIST) emulator. The interface includes an input and an output. The interface receives and forwards operator-level instructions to the BIST ... 02/09/06 - 20060031788 - Optimization algorithm to optimize within substrate uniformities A method to optimize semiconductor processing equipment (hardware settings and process conditions) to minimize non-uniformities within a wafer based on linescan measurements and a calculation of or prediction for a polar map. Measurements of a metrology value are taken at a number of points along a linescan (or two orthogonal ... 02/02/06 - 20060026538 - Relational database storage and retrieval of circuit element classifications Various embodiments of a system, method and database for storing circuit element classification information in a relational database are disclosed. One database embodiment comprises a block relation, a structure relation, a FET relation, a NET relation and an association relation. ... 01/19/06 - 20060015828 - Method for designing structured asics in silicon processes with three unique masking steps A multi-function core base cell includes a set of functional microcircuits. These microcircuits are used to design a Library of Logic Function Macros. The functional macros consisting of one or more microcircuits have a fixed and complete physical layout similar to a conventional standard cell library macro set. In addition ... 12/29/05 - 20050289485 - Hardware/software design tool and language specification mechanism enabling efficient technology retargeting and optimization An innovative hardware/software design tool provides four modes of operation for converting an electronic design specification and zero or more technology specifications into realization of the electronic design in computer hardware, software and firmware. The first mode of operation compiles design and logic technology specifications into a model which can ... 12/29/05 - 20050289484 - Externalization of coil structure patterns A user can create a coil structure pattern on a display screen and annotate it with information such as comments, key values, and script fragments. Generating a coil structure pattern comprises receiving at least one pattern or sub-pattern, and assembling a layout comprising the pattern or sub-pattern. A parameter value, ... 12/22/05 - 20050283743 - Method for generating hardware information A method is provided that generates hardware information for executing a first program including a first algorithm that repeats a first process, the hardware information being suited to implementing a “for” loop written in C language in a device in which a plurality of PE are connected and a circuit ... 12/15/05 - 20050278659 - Cell library providing transistor size information for automatic circuit design A simple, approximate power optimization in connection with automatic large scale circuit design using a cell library is provided. The cell library of the present invention provides active region information for each cell, and preferably also provides conventional parameters such as cell physical area and cell performance information. Typically, several ... 12/15/05 - 20050278658 - Standard cell library having cell drive strengths selected according to delay A cell library which enables reduced quantization over-design in large scale circuit design is provided. Library cells having the same cell function have drive strengths selected to provide delays about equal to a predetermined set of design delays, at a nominal load corresponding to the cell function. In contrast, conventional ... 12/08/05 - 20050273731 - Operation-related information display method and operation-related information display system An operation-related information display method includes storing information for identifying a printed-wiring board and information related to the printed-wiring board, identifying the printed-wiring board, obtaining information related to the printed-wiring board corresponding to the identified printed-wiring board, and when voluntary information is designated in the obtained information related to the ... 11/17/05 - 20050257177 - System on chip development with reconfigurable multi-project wafer technology A method is disclosed for designing a semiconductor circuit on a multi-project wafer (MPW). One or more standard modules designed by one or more vendors with verified functions are first identified. Some of the standard modules are charged based on usage. At least one reconfigurable module of the MPW is ... 11/10/05 - 20050251762 - Methods and apparatus for synthesizable pipeline control An organization and method of designing a processor of an integrated circuit are provided which includes identifying reusable portions of a custom design to be created for a processor. The processor is custom designed to meet specific performance criteria. Such custom designing includes custom designing macros for the reusable portions, ... 11/10/05 - 20050251761 - Integrated circuit configuration system and method The present invention systems and methods enable configuration of functional components in integrated circuits. A present invention system and method can flexibly change the operational characteristics of functional components in an integrated circuit die based upon a variety of factors. In one embodiment, manufacturing yields, compatibility characteristics, performance requirements, and ... 11/03/05 - 20050246667 - Bus structure, database and method of designing interface With respect to each application, libraries, corresponding to operation models, for describing operations respectively attained by employing a Neumann CPU (bus structure), a Harvard CPU (bus structure) and a direction separate type CPU (bus structure) are registered. In a performance table of each library, the performance index of the library ... 10/27/05 - 20050240883 - Fringe rlgc model for interconnect parasitic extraction An RLGC library is generated so as to include fringe RLCG functions for 2-D canonical interconnect structures. During parameter extraction for selected interconnect structures of an integrated circuit, printed circuit board, or integrated circuit package design, the RLGC library is used to generate fringe RLGC coefficients which in addition to ... 10/20/05 - 20050235233 - Voltage reference signal circuit layout inside multi-layered substrate A multi-layered substrate has a voltage reference signal circuit layout therein. A major change in the design of the multi-layered substrate is the moving of a reference signal trace from a signal layer to a non-signaling layer. Once the reference signal trace is moved, the signal traces within the signal ... 10/20/05 - 20050235232 - Method and apparatus for designing and manufacturing electronic circuits subject to process variations Methods and apparatus are described in which, at design-time a thorough analysis and exploration is performed to represent a multi-objective “optimal” trade-off point or points, e.g. on Pareto curves, for the relevant cost (C) and constraint criteria. More formally, the trade-off points may e.g. be positions on a hyper-surface in ... 10/20/05 - 20050235231 - System and method for charge-balanced, continuous-write mask and wafer process for improved colinearity A charge-balanced, continuous-write mask and wafer process changes the magneto resistive photo-definition step to a two-mask step operation. Critical images are written on one mask layer at a very small electron beam spot size, and non-critical images are written on a second mask layer at a relatively larger electron beam ... 10/20/05 - 20050235230 - Process and design method, system and program product A method, system and program product for generating a process aid on a wafer are disclosed. A “process aid” can be any device provided on a wafer that assists in some process step, but does not ultimately make up part of a usable die. The invention implements libraries of technology ... 10/13/05 - 20050229120 - High speed transient immune differential level shifting device A level shifting device having an input side operating at a first voltage level, an output side operating at a second voltage level and a level shifting circuit which connects the input and output sides. The input circuit receives an input signal referenced to the first voltage level and provides ... 10/06/05 - 20050223344 - Power-consumption calculation method and apparatus An apparatus for calculating power consumption includes a behavioral synthesis unit for generating a clock-level description by behavioral synthesis of an algorithm description; a clock-level simulation unit for simulating a clock-level description and calculating operating ratios of storage elements and arithmetic units indicated by the clock-level description; a storage-element power ... 09/29/05 - 20050216868 - Method and system for alerting an entity to design changes impacting the manufacture of a semiconductor device in a virtual fab environment A design coordination engine coordinates design implementation among a manufacturing facility, a customer, an IP vendor, and a design group during the design phase of a semiconductor device. The design coordination engine includes a tracking module configured to track design information updates in a design database. The design coordination engine ... 09/22/05 - 20050210421 - System and method for morphable model design space definition A system, method, apparatus and product for designing, on a display device, a geometric shape is disclosed. The method comprises the steps of displaying an initial set of similarly structured model exemplars on a display device, selecting a chosen set of models from the initial set of similarly structured model ... 09/22/05 - 20050210420 - Design review output apparatus, design review support apparatus, design review system, design review output method, and design review support method A design-review-output apparatus comprising: an identification unit 14 that, based on circuit information, which correlates and contains target-object identifiers that identify target objects of a circuit, and design-review information, which contains attributes for target design-review objects for each one or more design-review items in a circuit board design, identifies target-object ... 09/01/05 - 20050193353 - Method and architecture for integrated circuit design and manufacture A system for integrated circuit (IC) design. A structural multi-project wafer (SMPW) comprises a plurality of pre-manufactured and pre-validated functional blocks. The SMPW is pre-fabricated up to a contact layer so that a user can customize and program different blocks of the SMPW to the user's requirements. An SMPW provider ... 08/25/05 - 20050188335 - Texture generating apparatus for dynamic interference checking The present invention provides an apparatus, system, and method for performing interference checking of the design in a project, component or part thereof to a designer, engineer, team of designers, or a team of engineers. In one embodiment, the present invention is comprised of a texture generating apparatus adapted to ... 08/25/05 - 20050188334 - Circuit design interface One example embodiment of an interface arrangement for retrieving circuit design data comprises a first application program callable function configured to, in response to an application programming interface (API) call to the first function that specifies a block, read design data related to the block in a first format and ... 08/18/05 - 20050183045 - Method and system for integrating cores in fpga-based system-on-chip (soc) The invention provides an interface that can facilitate integration of user specific proprietary cores and commercially available cores during customization of an FPGA-based SoC. A selected hardware or software system component used for customizing the FPGA-based SoC can be configured using parameters that can be automatically propagated and used to ... 08/18/05 - 20050183044 - Design aid apparatus, design aid method, and computer-executable program A multilayer wiring board formed by laminating a plurality of dielectrics including a specific dielectric capable of embedding components therein is separated into first and second portions that are respectively made up of sets of dielectrics on opposite sides of the specific dielectric. A first aid unit stores design information ... 08/18/05 - 20050183043 - Computer-assisted electronic component schematic linking method A computer-assisted schematic linking method for electronic components includes naming the circuits of various electronic components according to signal line naming conventions; storing in an electronic component specification data base; selecting a plurality of first electronic components from the electronic component data base to generate a first electronic component list ... 08/18/05 - 20050183042 - Customizable development and demonstration platform for structured asics The present invention is directed to a customizable development and demonstration platform for structured ASICs. In an exemplary aspect of the present invention, the present platform may include a structured ASIC which is built on a slice and which may be flexible enough for a number of possible application developments. ... 08/04/05 - 20050172244 - Method and apparatus for optimizing distributed multiplexed bus interconnects A method and apparatus for optimizing distributed multiplexed bus interconnects are described. ... 07/21/05 - 20050160383 - Combined e-beam and optical exposure semiconductor lithography Combined e-beam and optical exposure lithography for semiconductor fabrication is disclosed. E-beam direct writing to is employed to create critical dimension (CD) areas of a semiconductor design on a semiconductor wafer. Optical exposure lithography is employed to create non-CD areas of the semiconductor design on the semiconductor CD's of the ... 07/21/05 - 20050160382 - Methods to generate state space models by closed forms and transfer functions by recursive algorithms for rc interconnect and transmission line and their model reduction and simulations There is provided a set of methods with the exact accuracy to effectively calculate the n-th order state space models of RC distributed interconnect and transmission line in closed forms in time domain and transfer functions by recursive algorithms in frequency domain, where their RC components can be evenly distributed ... 07/21/05 - 20050160381 - Designing and fabrication of a semiconductor device Designing method of an electronic device subjected to a chemical mechanical polishing process in a fabrication process thereof is conducted according to the steps of: dividing a substrate surface into first sub-regions; optimizing a coverage ratio of hard-to-polish regions in the first sub-regions to fall in a first predetermined range ... 07/07/05 - 20050149884 - System and method for coevolutionary circuit design The present invention is directed to a system and method for coevolutionary circuit design. A system suitable for providing integrated circuit design may include a memory suitable for storing a first set of instructions and a second set of instructions and a processor communicatively coupled to the memory. The processor ... 07/07/05 - 20050149883 - Method, system and program product providing a configuration specification language supporting arbitrary mapping functions for configuration constructs A method is disclosed of associating a mapping function with a configuration construct of a digital design defined by one or more hardware description language (HDL) files. According to the method, in the HDL files, a configuration latch is specified within a design entity forming at least a portion of ... 06/23/05 - 20050138577 - Method, apparatus, and article of manufacture for manufacturing high frequency balanced circuits A method, apparatus and article of manufacture for manufacturing a balanced circuit obtains S-parameters for the balanced circuit and determines a delay value embedded at one of the single-ended terminals of the balanced circuit that reduces a differential to common mode conversion mixed-mode transmission S-parameter. ... 06/16/05 - 20050132306 - Characterization and reduction of variation for integrated circuits A method and system are described to reduce process variation as a result of the semiconductor processing of films in integrated circuit manufacturing processes. The described methods use process variation and electrical impact to modify the design and manufacture of integrated circuits. ... 06/09/05 - 20050125747 - System and method for populating a computer-aided design program's database with design parameters According to at least one embodiment, a method comprises generating a data file having design parameters for an electrical design, and with a computer-executable program, accessing the data file and populating a computer-aided design (CAD) program's database with the design parameters. ... ### FreshPatents.com Support |