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Error Detection/correction And Fault Detection/recovery > Pulse Or Data Error Handling > Digital Data Error Correction > Forward Error Correction By Tree Code (e.g., Convolutional) Forward Error Correction By Tree Code (e.g., Convolutional)Forward Error Correction By Tree Code (e.g., Convolutional) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/25/07 - 20070250760 - Extended convolutional codes A system and method for providing increased forward error correction by providing extended convolutional coding for packets/frames or superframes used in wireless transmission. A wireless system having an extended convolutional encoder/decoder therein, includes a wireless network, a server having an extended convolutional encoding/decoding module, one or more clients, at least ... 10/04/07 - 20070234185 - Fault tolerant decoding method and apparatus Units of forward error correction (FEC) encoded bits each represent a one-bit data value and include correctness bits that together reflect a probability that the one-bit data value represented by the unit is correct. The units of FEC encoded bits are decoded by using the correctness bits to perform soft-decision ... 07/19/07 - 20070168842 - Transmitter and system for transmitting/receiving digital broadcasting stream and method thereof A digital broadcasting transmission system processes dual transport stream (TS) including multi turbo streams. The digital broadcasting transmission system includes a turbo processor to detect a turbo stream from a dual transport stream (TS) which includes a multiplexed normal stream and a turbo stream, encoding the detected turbo stream and ... 05/31/07 - 20070124655 - Apparatus and method for a collision-free parallel turbo decoder in a software-defined radio system A reconfigurable maximum a-posteriori probability (MAP) calculation circuit for decoding binary and duo-binary code. The reconfigurable MAP calculation circuit comprises M memory banks for storing N input data samples. Each input data sample comprises systematic data, non-interleaved parity data and interleaved parity data. The N input data samples are divided ... 05/31/07 - 20070124654 - Apparatus and method for decoding a received message with a priori information An apparatus and method for receiving a message stream on a channel. A message is received on the channel. Information regarding the bits of a successfully decoded message is added to a message attributes list if the message is successfully decoded. An attempt is made to decode a subsequent message ... 05/24/07 - 20070118791 - Pipeline architecture for maximum a posteriori (map) decoders The sliding window approach to pipeline maximum a posteriori (MAP) decoder architecture is modified to decrease processing time. Once the forward metrics have been calculated for he first sliding window of the decoder, the reverse metrics for each window are calculated while the forward metrics for the next window are ... 02/16/06 - 20060036930 - Method and apparatus for fast encoding of data symbols according to half-weight codes Efficient methods for encoding and decoding Half-Weight codes are disclosed and similar high density codes are disclosed. The efficient methods require at most 3·(k−1)+h/2+1 XORs of symbols to calculate h Half-Weight symbols from k source symbols, where h is of the order of log(k). ... 09/29/05 - 20050216819 - Method and apparatus for communications using turbo like codes The present invention relates to methods, apparatuses, and systems for performing data encoding involving encoding data bits according to an outer convolutional code to produce outer encoded bits processing the outer encoded bits using an interleaver and a logical unit to produce intermediate bits, wherein the logical unit receives a ... ### FreshPatents.com Support |