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Error Detection/correction And Fault Detection/recovery > Pulse Or Data Error Handling > Memory Testing > Read-in With Read-out And Compare > Special Test Pattern (e.g., Checkerboard, Walking Ones) Special Test Pattern (e.g., Checkerboard, Walking Ones)Special Test Pattern (e.g., Checkerboard, Walking Ones) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/18/07 - 20070245182 - Semiconductor memory device A semiconductor memory device is disclosed, which includes a memory cell array including a plurality of memory cells, a built-in self-test circuit which writes test pattern data including binary 0 and binary 1 in the memory cells in units of a page to perform a test for the memory cells, ... 08/16/07 - 20070192657 - Configuring flash memory A system for configuring or testing memory may cycle a memory array while substantially concurrently performing other functional testing. In particular implementations, the system may configure, or cycle, a flash memory using a serial interface and test other functional units using the same serial interface substantially concurrently with cycling the ... 06/28/07 - 20070150779 - Lithographic apparatus and device manufacturing method Apparatus and methods for compensating for the movement of a substrate in a lithographic apparatus during a pulse of radiation include providing a pivotable mirror configured to move a patterned radiation beam incident on the substrate in substantial synchronism with the substrate. ... 06/28/07 - 20070150778 - Lithographic apparatus and device manufacturing method Apparatus and methods for compensating for the movement of a substrate in a lithographic apparatus during a pulse of radiation include providing a pivotable mirror configured to move a patterned projection beam incident on the substrate in synchronism with the substrate. ... 02/23/06 - 20060041800 - Method and apparatus for generating and detecting initialization patterns for high speed dram systems A method and apparatus for determining the characteristics of a communications channel within a high speed memory system includes generating a first signal having a known and repeating pattern and generating a second signal having a pseudo-random pattern. The first and second signals are combined to produce a combined signal. ... ### FreshPatents.com Support |