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Error Detection/correction And Fault Detection/recovery > Pulse Or Data Error Handling > Data Formatting To Improve Error Detection Correction Capability Data Formatting To Improve Error Detection Correction CapabilityData Formatting To Improve Error Detection Correction Capability patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/25/07 - 20070250742 - Systems and methods for interleaving and deinterleaving data in an ofdma-based communication system In an exemplary embodiment, a base station includes an antenna for transmitting signals on a downlink to a plurality of user devices. The base station also includes a processor, and memory in electronic communication with the processor. Interleaving instructions are stored in the memory. The interleaving instructions are executable by ... 09/20/07 - 20070220377 - Interleaving apparatus and method in communication system Provided are an interleaving apparatus and method in a communication system. The interleaving apparatus includes a determiner for determining whether a next index k to be generated is an index to be discarded, and if the next index k is the index to be discarded, generating a skip signal; an ... 08/23/07 - 20070198877 - Wireless mobile device A wireless mobile device comprising a base band receiver for providing received data to an application processor for storage in memory, wherein the application processor is arranged to provide to the base band receiver the data extracted from the memory in interleaved form for error correction. ... 08/23/07 - 20070198876 - Digital broadcasting transmission apparatus and robust stream coding method thereof A digital broadcasting transmission apparatus and robust stream coding method thereof. The digital broadcasting transmission apparatus includes a robust processor that codes a robust stream of a dual transport stream where a normal stream and the robust stream are combined. The robust processor includes a demultiplexer (DE-MUX) that separates the ... 08/16/07 - 20070192655 - Methods and apparatus for generating permutations Methods and apparatus for determining at least one permutation of a set of a K number of values are disclosed. The methods and apparatus utilize a first permutation functionality that maps an index value to another value within the set of K values according to the first outputting the mapped ... 08/09/07 - 20070186130 - Reduced size transmission data packet header format for a medical device The present invention relates to a reduced size format for transmission packet header wherein a source address is encoded together with a check code in a medical device. The packet header thus contains one single field now in place of two i.e. the check code and source address. At the ... 08/09/07 - 20070186129 - Address generation apparatus for turbo interleaver and deinterleaver in w-cdma systems There is provided an address generation apparatus for one of an interleaver and a deinterleaver in a Wideband Code Division Multiple Access (W-CDMA) system. The apparatus includes an address pair generator for generating an address pair (n, P(n)) in real-time for one of an interleaver operation and a deinterleaver operation ... 07/19/07 - 20070168769 - Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program A semiconductor device has multilevel memory cells, each cell storing at least three levels of data each. At least a first data composed of first data bits and a second data composed of second data bits are arranged in order that at least a bit of an N-order of the ... 07/19/07 - 20070168768 - Ecc coding for high speed implementation Methods and apparatus for performing error correction code (ECC) coding techniques for high-speed implementations. The ECC code word is structured to facilitate a very fast single-error-detect (SED) that allows state machines to be stopped within a single cycle when an error is detected and enables a corresponding single-error-correct (SEC) operation ... 06/28/07 - 20070150775 - Apparatus and method for controlling an interleaver/deinterleaver memory in a mobile communication system Provided is an apparatus and method for controlling an interleaver/deinterleaver memory in a mobile communication system are provided. In particular, an apparatus and method are provided which can reduce unnecessary time and power consumption by eliminating an unnecessary memory erasure. A write address generator generates write addresses. A memory stores ... 05/03/07 - 20070101210 - Intelligent table-driven interleaving The present invention comprises an interleaver that uses a reduced interleaving table to generate interleaved output data blocks from input data blocks. By iteratively applying the reduced interleaving table to bits in the input data blocks, the interleaver generates output data blocks equivalent to those that would have been generated ... 04/19/07 - 20070088992 - Phase error determination method and digital phase-locked loop system In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In ... 04/05/07 - 20070079181 - Modified linear congruence interleaver and its parameter selection method A parameter selection method and a modified linear congruence interleaver are provided. The parameter selection method of the linear congruence interleaver includes the operations of: determining a placement zone corresponding to index values generated by an algorithm; determining position values (i1, i2) of groups of data including corresponding index values ... 02/22/07 - 20070043982 - Interleaver, deinterleaver, interleaving method, and deinterleaving method for ofdm data An interleaver and interleaving method each includes two stages, and is useful in coded orthogonal frequency division multiplexed (COFDM) wireless local area networks. A first stage performs a first block permutation and a second stage performs bit order permutation to effectuate a second group permutation. A corresponding de-interleaver does just ... 02/15/07 - 20070038903 - Method and device for interleaving and method and device for de-interleaving The writing address supply part 210 supplies writing addresses for writing the bits forming bit sequences corresponding to the header H contained in a frame to be transmitted or stored and bit sequences corresponding to the data D, into the operating memory 220. The reading address supply part 230 alternately ... 02/15/07 - 20070038902 - Method and device for interleaving and method and device for de-interleaving The writing address supply part 210 supplies writing addresses for writing the bits forming bit sequences corresponding to the header H contained in a frame to be transmitted or stored and bit sequences corresponding to the data D, into the operating memory 220. The reading address supply part 230 alternately ... 01/25/07 - 20070022329 - Shape matching method for indexing and retrieving multimedia data The invention relates to a method for indexing and retrieving multimedia data. In particular the invention provides a method of comparing at least two sets of multimedia data using shape information in order to provides a dissimilarity measure between the sets. The invention finds use in retrieving images or parts ... 01/11/07 - 20070011501 - Long term data protection system and method A file to be written can be partitioned into one or more partitions. Each such input partition is identified with a hash code and a group ID. Replica(s) of an input partition can be created to ensure a certain number of identical partitions. When a file is accessed, each partition ... 12/14/06 - 20060282715 - Signal generation The invention relates to a signal generator for generating a sequence of digital values according to a reference clock signal, comprising at least one input terminal for receiving a an increment signal and an offset signal, a start value circuit adapted for determining a counter start value on the base ... 12/14/06 - 20060282714 - Controllable delay device Two delay chains having in each case n series-connected unidirectional delay elements are provided for controllably delaying electrical signals between a circuit input and at least one circuit output. Each delay element is an active circuit with a fixed transit time. The input of the first delay element of the ... 12/14/06 - 20060282713 - Efficient interleaver/de-interleaver desigh for the turbo decoder in a 3g wcdma system A device, such as an interleaver, a de-interleaver, or other devices, for interleaving or de-interleaving a signal within a wireless communication system. The device may interleave or de-interleave the signal spontaneously using a pseudo-random logic. Interleaving or de-interleaving the signal spontaneously may enable one or more features of the device ... 12/14/06 - 20060282712 - Low complexity pseudo-random interleaver An interleaver has an input multiplexer that receives a data sequence at an interleaver input and that separates the data sequence into multiple data sub-blocks. The interleaver has a linear feedback shift register that generates an input address sequence. The interleaver has adder circuits that generate output address sequences associated ... 10/26/06 - 20060242475 - Interleaver An interleaver and scheme for interleaving in which highly correlated bits are maximally separated. The scheme involves interleaving a set of bits to be delivered to a modulation system that utilizes a quantity of N carrier frequencies. A first block of N consecutive bits is assigned to each of N ... 10/19/06 - 20060236159 - Data transmitter-receiver, bidirectional data transmitting system, and data transmitting-receiving method A data obtaining portion 11 of a terminal 10 obtains positional directional information D(Tn) and a time information obtaining portion 12 obtains time information Tn. The terminal 10 stores D(Tn) and Tn in a memory portion 13 and a transmitting portion 15 transmits D(Tn) and Tn to a server 20. ... 10/19/06 - 20060236158 - Memory element for mitigating soft errors in logic In a preferred embodiment, the invention provides a method for reducing soft errors in logic. After obtaining two delayed data signals, the delayed data signals, the clock signal, and the data signal from a logic circuit are applied to a triple redundant memory element. The delay of the first delayed ... 08/24/06 - 20060190777 - Memory command unit throttle and error recovery A network device for minimizing latency and correcting errors associated with information transmitted from an external memory device. The network device includes a management unit for requesting information stored on at least one external memory device. The network device also includes a command unit for transmitting a request from the ... 08/17/06 - 20060184845 - Data encoding apparatus, data decoding apparatus and data encoding/decoding system A data encoding apparatus extracts valid data to be encoded from received data and encodes the data, and realigns the encoded data in units of a predetermined data width and outputs the data having each unit of the predetermined data width. A data decoding apparatus extracts valid data to be ... 08/17/06 - 20060184844 - Synchronous data transfer circuit, computer system and memory system A circuit synchronizes parallel data of different timing for transfer. The synchronous data transfer circuit includes a plurality of first flip-flop circuits in which the parallel data are set by a data strobe signal, a plurality of delay circuits, and a plurality of second flip-flop circuits. By configuring the second ... 08/10/06 - 20060179365 - Method and apparatus for efficient scanning and operation in a wireless system The techniques described increase efficiency and operation of a device operating in one or more communication systems. These embodiments provide a method for a device to perform selected scanning procedures of one or more communication systems based on the type of event detected by the device. One method includes detection ... 06/08/06 - 20060123276 - Information storage medium, information recording method and information processing method User information is recorded in each physical sector of an information storage medium in such a style after it is modulated according to a predetermined modulation rule. The physical sector is comprised of plural sync codes. The sync code contains a common fixed code region and variable code regions which ... 06/01/06 - 20060117230 - System and method for testing integrated circuits at operational speed using high-frequency clock converter A system tests an integrated circuit at operational speed. The system includes a high frequency clock converter that receives test clock signals at a speed lower than operational speed of the integrated circuit to be tested. The high frequency clock converter generates test clock signals for operational speed testing of ... 05/18/06 - 20060107126 - Edge selecting triggering circuit A triggering circuit asserts a trigger signal in response to edges of a digital signal conveying a repetitive pattern of edges. The triggering circuit generates first data having a value identifying a position within the pattern of a last occurring edge of the digital signal and generates second data having ... 03/02/06 - 20060048021 - Signal control circuit and device mounted therewith A signal control circuit for controlling a signal to be outputted from a signal processing circuit 11, of which a rise and a fall are repeated, includes pattern generation unit 20 for generating pattern information representing a certain pattern, and signal waveform adjusting unit (Q1, Q2, Q3, Q6) for changing ... 02/09/06 - 20060031724 - Interleaving method and apparatus, de-interleaving method and apparatus, and interleaving/de-interleaving system and apparatus An interleaving apparatus comprises a first storing unit for storing data to be transmitted and a first control unit for controlling the first storing unit so that the data to be transmitted is outputted from the first storing unit with the data to be transmitted arranged in a matrix and ... 12/01/05 - 20050268180 - Method and apparatus for recording information in concatenated manner A method of recording data as presence/absence of marks on an information recording medium includes a step of obtaining data pieces, each of which has size of one block and is made by adding error-correction-purpose data to information data, a step of attaching to each of the data pieces a ... 09/22/05 - 20050210341 - Test device A test device includes: the first reference clock generation unit for generating the first reference clock; the first test rate generation unit for generating the first test rate clock based on the first reference clock; the first driver unit for supplying the first test pattern to an electronic device based ... 09/22/05 - 20050210340 - Wireless sensor system A network of wireless sensor nodes for wireless transmission to a base station is provided. The sensor nodes can provide real time streaming of data over separate frequency links that can all be received by the base station. The base station includes a receiver for receiving at multiple frequencies, error ... 09/15/05 - 20050204210 - Decoding method, medium, and apparatus A decoding method, medium, and apparatus capable of preventing error propagation and implementing parallel processing. A decoding method includes comparing encoding information with decoding information at synchronization points for detecting a transmission error, and continuing to decode the encoded data if both the encoding and decoding information match, or continuing ... 09/15/05 - 20050204209 - Method for utilizing intelligent clock controller in digital rights management The invention relates to a method, electronic device and computer program for providing digital rights management. The electronic device comprises a first clock and an optional second clock. The electronic device may store at least one protected media object and rights associated with the media object. A time attack event ... 08/18/05 - 20050182992 - Method and apparatus for raid conversion A general RAID conversion method is described for converting between different RAID configurations. The method includes reading a unit of user data from the source devices according to the source RAID algorithm, writing the user data together with redundant data (if any) to the target devices according to the target ... ### FreshPatents.com Support |