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Error Detection/correction And Fault Detection/recovery > Data Processing System Error Or Fault Handling > Reliability And Availability > Fault Locating (i.e., Diagnosis Or Testing) > Output Recording (e.g., Signature Or Trace) Output Recording (e.g., Signature Or Trace)Output Recording (e.g., Signature Or Trace) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.11/08/07 - 20070260938 - Method, code, and apparatus for logging test results In one embodiment, a method for logging test results, has steps for: A) accessing a stream of test data associated with a tester performing tests on a number of devices under test; B) selecting items of the test data to be logged to a data store, the selecting being performed ... 11/08/07 - 20070260937 - Systems and methods for selectively logging test data There are disclosed systems and methods for selectively logging test data. In an embodiment, a system includes code to monitor test data generated by a plurality of devices and to generate statistics related to the test data; and code to in response to the statistics related to the test data, ... 11/08/07 - 20070260936 - Systems and methods for assigning identifiers to test results for devices within a group There are disclosed systems and methods for coordinating test results of devices within a group. In an embodiment, the system may include code to assign identifiers to test results of a first test execution, receive a user-specified beginning point, and assign identifiers to test results of a second test execution. ... 11/08/07 - 20070260935 - Methods, systems, and computer program products for compensating for disruption caused by trace enablement A method for compensating for disruption caused by trace enablement is provided. The method includes receiving a selected target to run a program, receiving a selected program that has been identified as having a problem, and receiving a selected trace type. The method also includes enabling a trace compensator for ... 11/01/07 - 20070255979 - Event trace conditional logging Use of configuration information to specify particular conditions under which trace events are to be logged. When accessing trace events generated by various modules, configuration data is referred to specifying condition(s) under which the trace events should be logged. If the log condition(s) are satisfied, the trace events are logged. ... 09/27/07 - 20070226545 - Methods and systems for generating and storing computer program execution trace data Methods and systems for generating and storing computer program execution trace data are disclosed. A method includes receiving a signal that enables the generation of computer program execution trace data in accordance with data stored in a register. The computer program execution trace data is generated and stored in memory. ... 09/27/07 - 20070226544 - Generation of trace elements within a data processing apparatus A data processing apparatus and method for generating trace elements is provided. The data processing apparatus comprises logic producing a series of data elements, indicative of the operation or state of all or part of the logic. Trace logic is provided for receiving indications of these data elements, and for ... 09/20/07 - 20070220362 - Generation of trace elements within a data processing apparatus A data processing apparatus and method for generating trace elements is provided. The data processing apparatus comprises a device for performing a sequence of operations including memory operations on data values having associated data addresses. For at least some of the memory operations the data address is determined relative to ... 09/20/07 - 20070220361 - Method and apparatus for guaranteeing memory bandwidth for trace data The present invention provides a way to offload trace data from a processor and store the trace data in external memory. By accumulating trace data in large buffers and sending them to a memory interface controller, the memory interface controller may write trace data to memory as the memory interface ... 09/20/07 - 20070220360 - Automated display of trace historical data The intuitive display of trace historical data in a manner that processing control transfer between processing entities is represented in the context of trace data from multiple processing entities. For each processing entity, a set of one or more trace entries are identified for that processing entity and displayed in ... 08/02/07 - 20070180334 - Multi-frequency debug network for a multiprocessor array A debug network on a multiprocessor array having multiple clock domains includes a backbone communication channel which communicates with information nodes on the channel. The information nodes store and access information about an attached processor. The nodes are also coupled to registers within the attached processor, which operate at the ... 08/02/07 - 20070180333 - External trace synchronization via periodic sampling A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core. ... 05/03/07 - 20070101201 - Method for processing dump data packets in low earth orbital satellite Provided is a method for processing dump data packets in a low earth orbital (LEO) satellite. The method includes the steps of: a) extracting table identification (ID) information from a header of high-resolution camera (HRC) dump data transmitted from the LEO satellite; b) searching a HRC dump table from a ... 04/26/07 - 20070094546 - Progressive extended compression mask for dynamic trace This invention provides trace address compression by comparing respective bytes of a current trace address with a stored prior trace address. Only the least significant bytes of the current trace address that do not match the stored prior trace address or are less significant than any section of the current ... 04/26/07 - 20070094545 - Progressive extended compression mask for dynamic trace This invention provides trace address compression by comparing respective bytes of a current trace address with a stored prior trace address. Only the least significant bytes of the current trace address that do not match the stored prior trace address or are less significant than any section of the current ... 03/29/07 - 20070074081 - Method and apparatus for adjusting profiling rates on systems with variable processor frequencies A computer implemented method, apparatus, and computer usable program code for adjusting rates at which events are generated or processed. In response to a frequency change in a processor, a frequency for the processor is identified. A rate at which samples of events generated by the processor are selected to ... 03/29/07 - 20070074080 - Modeling protocol transactions as formal languages with applications for workflow analysis A service grammar can be defined in Backus Naur Form for a protocol. The service grammar can be compiled into a service analyzer, which can identify services from a trace of messages sent using the protocol. Similarly, a workflow grammar can be defined for services implemented using the protocol (a ... 03/22/07 - 20070067680 - Device and job history display control method A device for performing a processing in response to a request received from a requester, comprises a receiving unit that receives the request or authentication information from the requestor; a processing unit that performs processing according to the request received by the receiving unit; a job history memory that stores ... 03/01/07 - 20070050682 - Processor and debugging device A processor according to the present invention is capable of executing instructions in parallel, the processor further executing a string of instructions consisting of a plurality of instructions allocated at continuous addresses as an execution unit, comprising an instruction analyzer, an instruction executor and an instruction canceling unit. The instruction ... 02/22/07 - 20070043980 - Test scenario generation program, test scenario generation apparatus, and test scenario generation method A test scenario generation program makes a computer execute a test scenario generation method that generates a test scenario for use in verification of an application involving screen change. The test scenario generation program makes the computer execute: a design information acquisition step S11 that acquires design information of the ... 02/08/07 - 20070033444 - Method and apparatus of providing devices with history information on image forming jobs A method and apparatus for providing devices with job history information on image forming jobs are provided, in which job history information corresponding to image forming jobs of the devices are generated. The job history information is transmitted to any device selected from the devices. ... 02/08/07 - 20070033443 - Unit test generalization A computer system provides a test program and one or more unit tests, such as a traditional unit test and or a parameterized unit test. The system also includes a constraint solver, a theorem prover, an implementation under test, a symbolic executor, a generalizor, and generated test cases. The generalizor ... 02/08/07 - 20070033442 - Mock object generation by symbolic execution A system for testing programs using a digital processor and programs in computer memory. A mock behavior generator identifies an interface indicated for mock behavior. The interface is identified as an input parameter of a parameterized unit test. The mock behavior generator creates a symbolic object with stubs to receive ... 01/11/07 - 20070011497 - System and method for economizing trace operations A system and method of creating trace information of an application. Trace data of the application is stored in a trace heap. Processing of stored trace data including a hard-coded string is deferred. ... 11/30/06 - 20060271828 - Semiconductor device mounting chip having tracing function A trace chip monitors a signal between a target logic chip having a data processing circuit mounted thereon and a memory chip having a memory storing data to be used by the target logic chip mounted therein, and traces an operation of the target logic chip. As the trace chip ... 11/16/06 - 20060259831 - Method and system of inserting marking values used to correlate trace data as between processor codes A method and system of inserting marker values used to correlate trace data as between processor cores. At least some of the illustrative embodiments are integrated circuit devices comprising a first processor core, a first data collection portion coupled to the first processor core and configured to gather data comprising ... 11/16/06 - 20060259830 - Real-time software diagnostic tracing Techniques for tracing the real-time operation of software for the purposes of testing, debugging, or performance analysis are disclosed. Diagnostic instrumentation for generating records containing details of software operation is incorporated in the software by inserting calls to diverse macros or inline functions. Each macro takes an argument specifying both ... 10/26/06 - 20060242470 - Trace reporting method and system A system and method for recording, storing, transferring and viewing trace data from a processor with an embedded trace macrocell. The system provides for compression of repetitive trace records using an algorithm which identifies compressible trace record streams, creates a highly compressed processed trace record stream and stores the processed ... 10/05/06 - 20060224928 - Apparatus and method to generate and save run time data A method is disclosed to generate and save run time data. The method supplies an embedded device comprising a processor which includes a processor cache, memory, a hardware trace facility comprising a plurality of data buffers, where the embedded device is capable of communicating with one or more host adapter ... 09/28/06 - 20060218449 - Memory self-test via a ring bus in a data processing apparatus A data processing apparatus is operable in a either a self-test mode or an operational mode. The apparatus comprises a plurality of functional units, at least one of the functional units being operable to perform data processing operations and at least a subset of the plurality of functional units having ... 09/28/06 - 20060218448 - Provision of debug via a separate ring bus in a data processing apparatus A data processing apparatus is provided having a plurality of functional units. At least one of the functional units is operable to perform data processing operations and at least a subset of the plurality of functional units have at least one of a respective co-processor register for storing configuration data ... 09/21/06 - 20060212761 - Data and instruction address compression An improved method, apparatus, and computer instructions for compressing trace data. An instruction stream is identified, and in response to identifying the instruction stream, the instruction addresses in the instruction stream are replaced with a stream identifier to form compressed trace data. Data addresses may be related to instructions in ... 08/17/06 - 20060184838 - Parallel software testing based on a normalized configuration A method and a system perform parallel software testing based on a normalized configuration. In some embodiments, a system includes a first hardware system having one or more hardware components to execute a first version of software. The system also includes a second hardware system having one or more hardware ... 08/17/06 - 20060184837 - Method, apparatus, and computer program product in a processor for balancing hardware trace collection among different hardware trace facilities A method, apparatus, and computer program product are disclosed in a data processing system for balancing hardware trace collection between hardware trace facilities. A first hardware trace facility is included within a first processor. The first processor includes multiple processing units coupled together utilizing a first system bus. A second ... 08/17/06 - 20060184836 - Method, apparatus, and computer program product in a processor for dynamically during runtime allocating memory for in-memory hardware tracing A method, apparatus, and computer program product are disclosed in a processor for dynamically, during runtime, allocating memory for in-memory hardware tracing. The processor is included within a data processing system. The processor includes multiple processing units that are coupled together utilizing a system bus. The processing units include a ... 08/17/06 - 20060184835 - Method, apparatus, and computer program product for synchronizing triggering of multiple hardware trace facilities using an existing system bus A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facility. The data processing system includes a ... 08/17/06 - 20060184834 - Method, apparatus, and computer program product in a processor for concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers A method, apparatus, and computer program product are disclosed for, in a processor, concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers. A hardware trace facility captures hardware trace data in a processor. The hardware trace facility ... 08/17/06 - 20060184833 - Method, apparatus, and computer program product in a processor for performing in-memory tracing using existing communication paths A method, apparatus, and computer program product are disclosed for performing in-memory hardware tracing in a processor using an existing system bus. The processor includes multiple processing units that are coupled together utilizing the system bus. The processing units include a memory controller that controls a system memory. Information is ... 08/17/06 - 20060184832 - Method and apparatus for achieving high cycle/trace compression depth by adding width A trace array with added width is provided. Each trace array entry includes a data portion and a side counter portion. When a programmable subset of trace data repeats, a side counter is incremented. When the programmable subset of the trace data stops repeating, the trace data and the side ... 08/10/06 - 20060179357 - Method and arrangement for tracking executed operations when using a computer program A method and arrangement for tracking individual operations executed in a specific computer program, where inputs made by the user are detected. Each detected input is compared with a set of operations defined in advance, which have been stored in an operation database. If a detected input matches some predefined ... 07/20/06 - 20060161818 - On-chip hardware debug support units utilizing multiple asynchronous clocks A system for interfacing a debugger, the debugger utilizing a test clock, with a system under debug, the system under debug utilizing one or more system clocks includes a test-clock unit, utilizing the test clock, connected in communication with the debugger, and one or more system-clock units, each of which ... 06/29/06 - 20060143545 - System and method for providing automatic resets A method for determining whether to provide automatic reset instructions to a machine with reset capability with respect to a fault code event, the method comprising, in a database, collecting records comprising the identification of the machine, a fault code associated therewith and the duration of a fault associated with ... 06/01/06 - 20060117229 - Tracing multiple data access instructions A microprocessor integrated circuit 104 is provided with a trace controller 120 that is responsive to trace initiating conditions to trigger commencement of tracing operation and generation of a trace data stream. In the case of a multi-word data transfer instruction LSM, the trace controller 120 is able to trigger ... 06/01/06 - 20060117228 - Method and device for determining and outputting the similarity between two data strings The present invention discloses a method and device for determining and outputting a similarity measure between two data strings each data string comprising data entities, comprising: receiving a first data string, receiving a second data string, which is characterized by determining consecutively following data entities in the first data string, ... 04/20/06 - 20060085693 - System and method for generating a chronic circuit report for use in proactive maintenance of a communication network A method for generating a chronic circuit report for use in maintaining a communication network is provided. The method comprises the steps of searching a database for information regarding circuit exceptions reported in a communication system, compiling a listing of circuits and circuit exception information, prioritizing the listing of the ... 04/06/06 - 20060075310 - Microcomputer and trace control method capable of tracing desired task A microcomputer includes a bus, a CPU coupled to the bus, a trace data generating circuit coupled to the bus to output trace data of a process executed by the CPU at an output node, a memory coupled to the output node of the trace data generating circuit to store ... 03/09/06 - 20060053346 - Chip tester for testing validity of a chipset A chip tester is mounted on a circuit board for testing validity of a chipset includes a base member that receives the chipset thereon and that has a plurality of testing contacts in electrical communication with the circuit board and, and a top cover that is mounted on the base ... 03/02/06 - 20060048015 - System integration test rig for networked overall mechatronic systems A system integration test rig for networked overall mechatronic systems includes mechanical and/or electronic components in the form of a mathematical model or real assemblies. According to the invention, the mechanical and/or electronic components are provided in the form of modules, each having its own power supply. The modules can ... 02/02/06 - 20060026468 - Crossbar switch debugging A crossbar switch having a plurality of ports that allows a debug process to be performed on the switch using one of the plurality of ports to output chip status information. The switch uses a debug block to store chip status information. ... 12/29/05 - 20050289400 - Trace analyzing apparatus, trace analyzing method, and processor A trace analyzing apparatus, which includes a trace analysis table, an instruction reconstruction unit that reconstructs and sends an execution address and an instruction code of trace information, and an object code list storage unit, reads out an object code list and trace information, captures each piece of information in ... 12/29/05 - 20050289399 - Tracer, tracer embedded processor, and method for operating the tracer A tracer includes a trace memory that is stored with trace information of the program execution status of a processor; trace information compression unit that compresses the trace information into a predetermined trace format, and stores the resulting compressed information in the trace memory piece by piece cyclically; and an ... 12/15/05 - 20050278584 - Storage area management method and system Provided are an area management table, an operation management policy, and a resource broker. In the area management table, one or more physical area IDs for identifying one or more storage area candidates selected from a plurality of physical storage areas, are associated with each application program. The operation management ... 12/08/05 - 20050273673 - Systems and methods for minimizing security logs A method and system for consolidating a computer security log includes providing a security log including information pertaining to security events on a computer system, the log including entries specifying at least information identifying a relative time each event occurred and information identifying a type of each event, determining from ... 12/08/05 - 20050273672 - Method and system for efficiently recording processor events in host bus adapters A host bus adapter (“HBA”) is provided with a programmable trace logic that can be enabled or disabled by firmware running on the HBA and if enabled can receive trace information from at least one processor, which is stored in a local memory buffer controlled by a local memory interface. ... 10/27/05 - 20050240830 - Multiprocessor system, processor device In the initialization of a multiprocessor system, device history information containing mounting position information indicating a mounting position of a CPU board supplied from a history information supplying unit is stored in a nonvolatile storage unit in the CPU board capable of storing plural pieces of device history information, so ... 09/08/05 - 20050198555 - Incorporating instruction reissue in an instruction sampling mechanism A method of sampling instructions executing in a processor which includes selecting an instruction for sampling, gathering sampling information for the instruction, determining whether the instruction reissues during execution of the instruction, and storing reissue sample information if the instruction reissues during execution of the instruction. The method also includes ... 09/01/05 - 20050193277 - Apparatus, method, and program for correcting time of event trace data A time correcting apparatus includes a data input section which inputs all event trace data generated for each event executed on computing devices and outputs the event trace data in order of occurrence time of the event data. An inter-machine communication-time-table generating section extracts transmission and reception events from the ... 09/01/05 - 20050193276 - Semiconductor ic incorporating a co-debugging function and test system A semiconductor IC capable of debugging two or more processors at the same time by means of a single debugger and a semiconductor IC test system. The semiconductor IC includes processors operating at different frequencies, a trigger circuit which causes all of the processors to be in a debugging state ... 07/28/05 - 20050166098 - Dsp bus monitoring apparatus and method A bus monitor is provided as a tool for developing, debugging and testing a system having an embedded processor. The bus monitor resides within the same chip or module as the processor, which allows connection to internal processor buses not accessible from external contacts. The monitor uses a separate circular ... 06/30/05 - 20050144534 - Method, system, and program for real-time channel adaptation Disclosed is a technique for updating a read-detect channel. A signal is processed in a read-detect channel that has one or more programmable registers. While signals continue to be processed by the read-detect channel, it is determined with a channel auxiliary processor whether to dynamically replace values of the one ... 06/23/05 - 20050138483 - Method and apparatus for compressing log record information The present invention relates to a method and apparatus for compressing a log record information provided e.g. to a monitoring system. Frequent patterns in the log information are detected and, then, redundant frequent patterns whose value or record combination is a subset of a value or record combination of another ... 06/02/05 - 20050120280 - Workflow managing method and recording medium A workflow managing method comprises the following steps. Setting at least a first terminal state, a second terminal state, and a third terminal state. Generating a first instruction, a second instruction, and a third instruction respectively corresponding to the first, second, and third terminal states. Generating a first path, a ... ### FreshPatents.com Support |