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Error Detection/correction And Fault Detection/recovery > Data Processing System Error Or Fault Handling > Reliability And Availability > Fault Recovery > By Masking Or Reconfiguration > Of Processor > Concurrent, Redundantly Operating Processors Concurrent, Redundantly Operating ProcessorsConcurrent, Redundantly Operating Processors patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/11/07 - 20070240016 - Arbitration method and system for redundant controllers, with output interlock and automatic switching capabilities An arbitration mechanism is provided for arbitrating between redundant controllers having outputs electrically connected together and provided as input to at least one device under control. The arbitration mechanism includes logic for automatically determining which controller of the redundant controllers is active controller, and a hardware output interlock for the ... 07/19/07 - 20070168711 - Computer-clustering system failback control method and system A computer-clustering system failback control method and system is proposed, which is designed for use with a computer-clustering system, such as a server-clustering system, for providing the server-clustering system with a failback control function which is characterized by the capability of performing an operating condition inspecting procedure on a once-failed ... 07/19/07 - 20070168710 - Hot standby method and apparatus An apparatus provides hot standby operation with normal and standby processors, each of which includes vital inputs electrically interconnected with the vital inputs of the other processor, vital outputs, and an application routine inputting the vital inputs and outputting the vital outputs. Communication ports communicate with communication ports of the ... 03/29/07 - 20070074073 - Detection system and method In a process for recording a data onto an optical storage medium which includes a fault correction mechanism, a detection system is preferably coupled to an optical data recorder comprising a data generating device and a data reading device. The data generating device generates the recorded data. The data reading ... 03/15/07 - 20070061618 - Method and system to execute recovery in non-homogeneous multi processor environments Disclosed are a method and system for parallel execution of recovery in a non-homogeneous multi-processor environment. The method defines criteria how to decide which recovery actions are to be performed, and on which processor. If multiple recovery actions are pending, the goal is to execute them in parallel on multiple ... 03/08/07 - 20070055907 - Self-reparable semiconductor and method thereof A self-reparable semiconductor comprises M functional units each including N sub-functional units. Corresponding ones of the N sub-functional units in each of the M functional units perform the same function. At least two of the N sub-functional units in one of the M functional units perform different functions. A first ... 03/08/07 - 20070055906 - Self-reparable semiconductor and method thereof A self-reparable semiconductor comprises first, second and spare functional units including first and second sub-functional units that cooperate to perform first and second functions. The first and second sub-functional units of the first, second and first spare functional units are functionally interchangeable, respectively. At least one of the first and ... 02/22/07 - 20070043971 - Error identifying apparatus An apparatus, including a plurality of units, each has at least one function which is executed by a software; an error detecting section which detects an error of the apparatus; a selector section which selects at least one of arbitrary unit of the units, when the error is detected by ... 02/08/07 - 20070033434 - Fault-tolerant processing path change management Change management of data processing paths by tentatively trying proposed alternative data processing path(s) without first giving up the existing processing path. If the alternative data processing path(s) does not give a more satisfactory result that the existing processing path, the existing processing path may be returned to. On the ... 01/25/07 - 20070022318 - Method and system for environmentally adaptive fault tolerant computing A method and system for adapting fault tolerant computing. The method includes the steps of measuring an environmental condition representative of an environment. An on-board processing system's sensitivity to the measured environmental condition is measured. It is determined whether to reconfigure a fault tolerance of the on-board processing system based ... 01/04/07 - 20070006025 - Sending device, receiving device, communication control device, communication system, and communication control method The system has, provided in a sending device, a generator generating transmission data including data, a data error detection code generated from the data and a safety flag indicating a degree of reliability, and transmission data; has, provided in a receiving device, a plurality of components of extracting transmission data, ... 12/28/06 - 20060294418 - System and method for automatically executing corresponding operations on multiple maps, windows, documents, and/or databases A system and method for causing a master operation that is executed on a master map, window, document, or database to also be automatically executed in its corresponding form on one or more slave maps, windows, documents, and/or databases. Embodiments of the invention can operate with masters and slaves that ... 12/14/06 - 20060282702 - Task management apparatus for control apparatus, input/output control apparatus, information control apparatus, task management method, input/output controlling method, and information controlling method Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, ... 11/16/06 - 20060259815 - Systems and methods for ensuring high availability A highly-available computer system is provided. The system includes at least two computer subsystems, each including memory, a local storage device and an embedded operating system. The system also includes a communication link between the two subsystems. Upon the initialization of the two computer subsystems, the embedded operating systems communicate ... 11/02/06 - 20060248384 - Method and apparatus for recovery from loss of lock step An apparatus, operating on an advanced multi-core processor architecture, and a corresponding method, are used to enhance recovery from loss of lock step in a multi-processor computer system. The apparatus for recovery from loss of lock step includes multiple processor units operating in the computer system, each of the processor ... 10/12/06 - 20060230309 - System for remote fault management in a wireless network This invention relates generally to network management in large telecommunications networks. A system and method capable of providing signal consolidation, replication, and correlation at a fault processor in order to allow signal information to remain visible at the fault processor even when communications between the fault processor and subordinate processors ... 10/12/06 - 20060230308 - Methods and systems for conducting processor health-checks Systems and methods for conducting processor health-checks are provided. In one embodiment, a method for evaluating the status of a processor is provided. The method includes, for example, initializing and executing an operating system, de-allocating the processor from the available pool or system resources and performing a health-check on the ... 10/12/06 - 20060230307 - Methods and systems for conducting processor health-checks Systems and methods for conducting processor health-checks are provided. In one embodiment, a method for evaluating the status of a processor is provided. The method includes, for example, initializing and executing an operating system, de-allocating the processor from the available pool or system resources and performing a health-check on the ... 10/05/06 - 20060224918 - Redundancy system having synchronization function and synchronization method for redundancy system A redundancy system that can perform synchronization even if a failure occurs to an application. According to the redundancy system of the present invention, a synchronization data memory area, a management bit map table having a flag created for each segment of the synchronization data memory area, and a management ... 09/14/06 - 20060206758 - Replicated state machine A replicated state machine includes multiple state machine replicas. In response to a request from a client, the state machine replicas can execute a service for the request in parallel. Each of the state machine replicas is provided with a request manager instance. The request manager instance includes a distributed ... 08/31/06 - 20060195720 - Amplifier fault detection circuit An amplifier (1) adapted to receive an input signal and to generate an output signal at an amplifier output (7) according to the input signal, the amplifier (1) comprising: a feedback circuit arranged to provide a feedback signal indicative of the output signal; an error signal generating circuit (12, 44) ... 08/17/06 - 20060184822 - Auxiliary mechanism to manage instruction restart and restart coming in a lookahead processor A management system that controls a restart interface in a data processing system. The management system switches control of the interface from a distributed network managed by the caches to the management system. The management system is capable of detecting errors and seizing control of the interface in order to ... 07/06/06 - 20060150006 - Securing time for identifying cause of asynchronism in fault-tolerant computer A fault-tolerant computer has a pair of duplex systems having respective CPU subsystems that are operable identically in lock-step synchronism. Each of the duplex systems has a CPU, a main storage unit, a CPU bus controller, and a DMA controller. The CPU and the main storage unit are included in ... 07/06/06 - 20060150005 - Fault tolerant computer system and interrupt control method for the same A fault tolerant (FT) computer system includes a primary system and a secondary system. The primary system includes a first CPU; a first FT control section connected with the first CPU; and a first south bridge connected electrically and operatively with the first FT control section. The secondary system includes ... 07/06/06 - 20060150004 - Fault tolerant system and controller, operation method, and operation program used in the fault tolerant system There is provided a fault tolerant system capable of adequately performing error processing, synchronization processing, and resynchronization processing for realizing a fault tolerant function in accordance with the system state. The fault tolerant system comprises at least two systems including: a CPU subsystem; an IO subsystem connected to the CPU ... 07/06/06 - 20060150003 - Fault tolerant computer system A fault tolerant (FT) computer system includes a first system; and a second system configured to operate in synchronization with the first system. Each of the first and second systems includes a CPU; and a routing controller connected with the CPU. The first system includes a first I/O device as ... 06/29/06 - 20060143510 - Fault management system in multistage copy configuration In a storage system in which a pair is configured by a remote copy, when a fault occurs in the pair, data to be lost is determined. Provided is a management computer connected to a storage system, in which the storage system includes: a primary logical volume in which data ... 06/29/06 - 20060143509 - Methods and apparatus for disabling error countermeasures in a processing system Methods and apparatus are provided for disabling error handling countermeasures in various processing contexts, such as by monitoring whether a given processing context requires error handling countermeasures; and disabling any recoverable error correction countermeasures when such countermeasures are not required. ... 06/22/06 - 20060136779 - Object-based storage device with low process load and control method thereof An object-based storage device with a low process load and a control method thereof are provided. The object-based storage device includes: a storage unit; a temporary storage unit; a transmission unit; a first control unit; and a second control unit. Particularly, the temporary storage unit and the transmission unit are ... 06/15/06 - 20060129881 - Compiling method, apparatus, and program Provides flexible control of power consumption of central processors. An apparatus has central processors, including: section for measuring temperature of each central processor; section for calculating halt percentage for each of the central processors from measured temperature of central processor, halt percentage being percentage of time in which processing by ... 06/15/06 - 20060129880 - Method and system for injecting faults into a software application A method for testing a software application (225), for example, written in the Java language is proposed. For this purpose, a factory object (230c) can be configured to operate in a production mode or in a test mode. In the test mode, the factory object instantiates a proxy object (255) ... 06/01/06 - 20060117219 - Control device Arbitrary data is read out from a main storage device, based on a permanent fault detection address that is used to detect a permanent fault on an address line. A bit error in the permanent fault detection address is detected and corrected, based on an error correcting code included in ... 05/25/06 - 20060112307 - System and method for error injection using a flexible program interface field A system and method for injecting hardware errors into a microprocessor system is described. In one embodiment, a software interface between system software and system firmware is established. Software test and debug for software error handlers may thus be supported. The software interface may support both a query mode call ... 05/18/06 - 20060107109 - Communication processing apparatus and method and program for diagnosing the same The present invention makes it possible to detect abnormality in an error detecting function early while minimizing adverse effects on transfer performance. The present invention provides a method for diagnosing a transfer data ensuring system in which a transmitting apparatus transmits transmission data provided with an error detection code and ... 05/18/06 - 20060107108 - Service clusters and method in a processing system with failover capability A platform for and method of computer processing to support processor failover are disclosed. A plurality of computer processors are connected to an internal communication network. A virtual local area communication network over the internal network is defined and established. Each computer processor in the virtual local area communication network ... 05/18/06 - 20060107107 - System and method for providing firmware recoverable lockstep protection According to at least one embodiment, a method comprises detecting loss of lockstep for a pair of processors. The method further comprises triggering, by firmware, an operating system to idle the processors, and recovering, by the firmware, lockstep between the pair of processors. After lockstep is recovered between the pair ... 05/18/06 - 20060107106 - System and method for maintaining in a multi-processor system a spare processor that is in lockstep for use in recovering from loss of lockstep for another processor According to one embodiment, a method comprises assigning a first processor of a multi-processor system a role of spare processor for at least a second processor, and responsive to detecting loss of lockstep (LOL) for any of the at least a second processor, the first processor replaces the processor for ... 05/11/06 - 20060101306 - Apparatus and method of initializing processors within a cross checked design A few inexpensive hardware facilities are incorporated in a tightly synchronized cross checked design. These facilities allow initialization software to quickly bring the two processors to the same state by rapid, repeated resets and execution of the initialization software. The resets are done in a way as to be transparent ... 04/27/06 - 20060090099 - Seu-tolerant qdi circuits The invention provides circuits that are tolerant to soft errors, such as a single event upset (SEU). The circuits may have a chain of permitted state changes. Redundant elements, including redundant literals and assignments, are designed and implemented in the circuit. The design is such that a disruption or change ... 04/20/06 - 20060085677 - Method and apparatus for seeding differences in lock-stepped processors An apparatus, and a corresponding method, are used for seeding differences in lock stepped processors, the apparatus implemented on two or more processors operating in a lock step mode. Each of the two or more processors comprise a processor-specific resource operable to seed the differences, a processor logic to execute ... 04/13/06 - 20060080574 - Redundant data storage reconfiguration In one embodiment, a method of reconfiguring a redundant data storage system is provided. A plurality of data segments are redundantly stored by a first group of storage devices, at least a quorum of storage devices of the first group each storing at least a portion of each data segment ... 04/13/06 - 20060080573 - Redundant power and data over a wired data telecommunications network A method and apparatus for redundant power and data over a wired data telecommunications network permits power to be received at a local powered device (PD) from remote power sourcing equipment (PSE) via at least one conductor at a first time and power and/or data to be obtained by the ... 02/16/06 - 20060036906 - System and method for detecting errors in a network A system and method for efficiently and accurately detecting errors in a network is provided. Devices coupled to a network are configured to determine their local network status and transmit their local network status to a centralized location. The centralized location is configured to receive the local network status from ... 01/26/06 - 20060020852 - Method and system of servicing asynchronous interrupts in multiple processors executing a user program A method and system of servicing asynchronous interrupts in multiple processors executing a user program. Some of the exemplary embodiments may be a method comprising executing a user program on a first processor and a duplicate copy of the user program on a second processor, receiving an asynchronous interrupt by ... 01/26/06 - 20060020851 - Information processing apparatus and error detecting method An information processing apparatus includes a plurality of computing units. At least one of the computing units includes a recording unit that records a status of an error occurrence in each of the computing units. The each of the computing units includes an error notifying unit that notifies the error ... 01/26/06 - 20060020850 - Latent error detection In an implementation of latent error detection, memory regions that each correspond to a different processor element of a redundant processor system are scanned for latent processing errors maintained as erroneous data. The data maintained in the memory regions is compared to detect a latent processing error in a first ... 01/05/06 - 20060005076 - Methods and systems for implementing shared disk array management functions Multiple Array Management Functions (AMFs) are connected to multiple redundancy groups over a storage area network (SAN), such as a fiber-channel based SAN. The multiple AMFs share management responsibility of the redundancy groups, each of which typically includes multiple resources spread over multiple disks. The AMFs provide concurrent access to ... 12/29/05 - 20050289390 - Failover method for a cluster computer system A high availability cluster computer system can realize exclusive control of a resource shared between computers and effect failover by resetting a currently-active system computer in case a malfunction occurs in the currently-active system computer. In case a malfunction occurs in a certain system in a cluster, another system in ... 12/22/05 - 20050283660 - Mechanism to handle events in a machine with isolated execution A platform and method for secure handling of events in an isolated execution environment. A processor executing in isolated execution “IsoX” mode may leak data when an event occurs as a result of the event being handled in a traditional manner based on the exception vector. By defining a class ... 12/22/05 - 20050283659 - Cheap paxos A distributed computing system can be operated in a fault tolerant manner using a collection of auxiliary computing devices and more main computing devices than the number of faults the system can tolerate. A quorum of all of the main computing devices can be used. In the event of a ... 12/22/05 - 20050283658 - Method, apparatus and program storage device for providing failover for high availability in an n-way shared-nothing cluster system A method, apparatus and program storage device for providing failover for continuous or near-continuous availability in an N-way logical shared-nothing cluster system is disclosed. Cluster application data space partitions are assigned to each node in the cluster and each node's or server software's internal architecture is partitioned in accordance with ... 12/15/05 - 20050278567 - Redundant processing architecture for single fault tolerance An electronic module is provided. The module includes a first logic device having at least two processors and a first comparator and a second logic device having at least one processor and a second comparator. Each of the at least two processors are coupled to each of the first and ... 12/08/05 - 20050273653 - Single fault tolerance in an architecture with redundant systems An electronic module is provided. The electronic module includes a first system and a second, redundant system. The first and second redundant systems include at least three processors having health management tasks that operate independently to perform a voting function to identify faults within the electronic module. ... 12/01/05 - 20050268163 - Microprocessor comprising signature means for detecting an attack by error injection A method for monitoring the execution of a sequence of instruction codes in an integrated circuit comprising a central processing unit provided for executing such instruction codes. Current cumulative signatures are produced using deterministic address, control or data logic signals involved in the execution of the sequence and taken off ... 11/24/05 - 20050262392 - Embedded server chassis hardware master system and method A system and method for monitoring a plurality of server processing cards of a server chassis includes selecting at least one hardware master from among a plurality of server processing cards. A hardware master control signal may be transmitted to the hardware master. A master control module coupled with the ... 11/03/05 - 20050246580 - Method, system, and program for error handling in a dual adaptor system where one adaptor is a master Provided is a method, system, and program for processing Input/Output (I/O) requests to a storage network including at least one storage device and at least two adaptors, wherein each adaptor is capable of communicating I/O requests to the at least one storage device. An error is detected in a system ... 11/03/05 - 20050246579 - Controller communications over an always-on controller interconnect A controller interconnect structure within a RAID disk array enables continuous low latency/high bandwidth communications between a plurality of controller pairs within the array. Mirror buses carry high speed mirror traffic between mirrored controllers performing mirrored memory operations. Loop buses carry inter-processor communications and other traffic between controller pairs coupled ... 11/03/05 - 20050246578 - Method and system of exchanging information between processors A method and system of exchanging information between processors. At least some of the illustrative embodiments may be a method comprising exchanging information between a plurality of processors by writing (by a first processor) a first datum to a logic device and then continuing processing of a user program by ... 10/27/05 - 20050240812 - Arbitration method and system for redundant controllers, with output interlock and automatic switching capabilities An arbitration mechanism is provided for arbitrating between redundant controllers having outputs electrically connected together and provided as input to at least one device under control. The arbitration mechanism includes logic for automatically determining which controller of the redundant controllers is active controller, and a hardware output interlock for the ... 10/27/05 - 20050240811 - Core-level processor lockstepping A device is provided which includes a first microprocessor core to generate a first output signal; a second microprocessor core to generate a second output signal; a switching fabric having a first input/output port; and lockstep logic, coupled between the first input/output port of the switching fabric and the first ... 10/13/05 - 20050229034 - Heartbeat apparatus via remote mirroring link on multi-site and method of using same The present invention is directed to a heartbeat apparatus via a remote mirroring link for a multi-site and a method for using the heartbeat apparatus. Information is registered in a configuration table, wherein the configuration table stores host ID information and volume ID information. The configuration table is configured, access ... 10/06/05 - 20050223275 - Performance data access Performance data access is described. In an embodiment, events are processed with non-synchronized processor elements of a logical processor in a redundant processor system. Performance data associated with execution of the processor events is stored in one or more accumulators corresponding to a respective processor element. The performance data from ... 10/06/05 - 20050223274 - Method and system executing user programs on non-deterministic processors A method and system of loosely lock-stepped non-deterministic processors. Some exemplary embodiments may be a processor-based method comprising executing fault tolerant copies of a user program, one copy of the user program executed in a first processor performing non-deterministic execution, and a duplicate copy of the user program executing in ... 09/22/05 - 20050210320 - Data consistency for mirroring updatable source data storage An information handling system for mirroring data, in a fashion that is similar to asynchronous mirroring, but less complex in function. Source data storage for storing and updating data is provided, with first intermediate data storage, target data storage, second intermediate data storage, and mirroring control. The mirroring control conducts ... 09/01/05 - 20050193243 - Method for managing a circuit system during mode-switching A method for switching modes of a circuit system. The circuit system includes at least a first memory device, a second memory device, and a microprocessor. The method includes utilizing the second memory device to store a program code division and utilizing the microprocessor to execute the program code division ... 08/11/05 - 20050177766 - Systems and methods for fault-tolerant processing with processor regrouping based on connectivity conditions Each processor in a distributed multi-processor environment maintains a set of connectivity condition scores. The connectivity condition scores are then passed to a pruning process with tie-breaker logic that selects certain of the processors to include in the new system configuration. The surviving processors are selected based on primary connectivity ... 07/28/05 - 20050166090 - Managing disk drive replacements on multidisk headless appliances A headless computer entity having a plurality of disk drives self-restores to a known state upon failure of either a system disk drive containing an operating system of the computer entity or failure of a data disk drive containing application data. Depending upon whether the system disk and/or data disk ... 07/28/05 - 20050166089 - Method for processing a diagnosis of a processor, information processing system and a diagnostic processing program In an information processing system including one or a plurality of processors, a diagnostic program is executed with a predetermined frequency to diagnose the processors. The diagnostic program generates one or a plurality of processes or threads at a predetermined frequency, at predetermined time intervals, for example, to diagnose the ... ### FreshPatents.com Support |