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Electrical Computers And Digital Processing Systems: Processing Architectures And Instruction Processing (e.g., Processors) > Byte-word Rearranging, Bit-field Insertion Or Extraction, String Length Detecting, Or Sequence Detecting Byte-word Rearranging, Bit-field Insertion Or Extraction, String Length Detecting, Or Sequence DetectingByte-word Rearranging, Bit-field Insertion Or Extraction, String Length Detecting, Or Sequence Detecting patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.09/14/06 - 20060206697 - System and method for trellis-based decoding A decoder comprising a demodulator operable to receive a plurality of encoded data bits and generate a demodulated output, a channel decoder coupled to the demodulator operable to receive the demodulated output and generate decoded data bits, an encoder coupled to the channel decoder operable to receive the decoded data ... 05/11/06 - 20060101258 - Microprocessor instructions for efficient bit stream extractions A method of extracting bits of a bit stream including retrieving bits from the bit stream into an accumulator, specifying a size value specifying a number of bits to extract, storing a position value into a control register, and executing a bit extraction instruction. The bit extraction instruction includes copying ... 02/02/06 - 20060026413 - Pattern matching architecture A pattern matching unit includes a selection unit to divide an input datum and one or more reference templates into input bit-fields corresponding reference bit-fields, respectively. The number of bits in the input and reference bit-fields is programmable. A distance unit is also included to determine one or more distance ... 09/08/05 - 20050198483 - Conversion apparatus and method thereof In the method of conversion, at least one of a protocol and a data format may be changed without requiring software processing. A data conversion apparatus is provided which may convert between at least one of a protocol and a data format without requiring software processing. A data processing system ... 06/23/05 - 20050138344 - Device and method for writing data in a processor to memory at unaligned location A device for writing data in a processor to memory at unaligned location. The data is stored in an internal register of the processor for writing to unaligned addresses of a memory partitioned by word boundaries into a plurality of words. A rotator is coupled to the internal register for ... 06/23/05 - 20050138343 - Processor-based structure and method for loading unaligned data A processor-based automatic alignment device and method for data movement. Data stored in a memory at a first position is partitioned by word boundaries into a first part, a second part and a third part and written to the memory at a second position. The device includes: an internal register, ... 06/23/05 - 20050138342 - Processor-based automatic alignment device and method for data movement A processor-based automatic alignment device and method for data movement. Data stored in a memory at a first position is partitioned by word boundaries into a first part, a second part and a third part and written to the memory at a second position. The device includes: an internal register, ... 06/09/05 - 20050125647 - Endianess compensation within a simd data processing system A memory system can store data in either a big endian mode or a little endian mode. Memory accessing logic 810 utilises byte invariant addressing to retrieve multiple data elements from that memory to be stored within a SIMD register 812. Data element reordering logic 808 is responsive to an ... ### FreshPatents.com Support |