REGISTER now for FREE 
|
FREE patent keyword monitoring and additional FREE benefits. REGISTER now for FREE
|
|
|
Electrical Computers And Digital Processing Systems: Processing Architectures And Instruction Processing (e.g., Processors) > Processing Control > Logic Operation Instruction Processing > Masking MaskingMasking patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.08/31/06 - 20060195681 - Test program instruction generation An architectural definition of an instruction set is parsed to identify distinct program instructions therein. These distinct program instructions are associated with operand defining data specifying the variables they require. A complete set of such distinct program instructions and their associated operand defining data is generated for the instruction set ... 02/02/06 - 20060026398 - Unpack instruction A processor executes an instruction that causes a source data field from a programmable position within a first source register to be copied to a destination register. The instruction is particularly useful for generating media-based bitstreams (e.g., audio, video). In some embodiments, a system (e.g., a communication device such as ... 02/02/06 - 20060026397 - Pack instruction A processor executes an instruction that causes a source data field from a first source register to be copied to a destination register at a programmable position within the destination register. The instruction is particularly useful for generating media-based bitstreams (e.g., audio, video). In some embodiments, a system (e.g., a ... 11/24/05 - 20050262330 - Apparatus and method for masked move to and from flags register in a processor A method and apparatus are provided for writing to a flags register in a pipeline microprocessor. Responsive to a macro instruction that directs a write to the flags register, a mask is generated using destination information for the write and privilege level information for the write. The mask is then ... 10/13/05 - 20050228974 - Apparatus and method for masked move to and from flags register in a processor A method and apparatus are provided for reading from and storing a flags register in a processor. In response to a macro instruction directing the read and store operation, such as a push flags macro instruction, a mask is generated using privilege level information (i.e., current operating privilege level) to ... 09/15/05 - 20050204117 - Inserting bits within a data word A data processing system 2 is provided which supports shift-and-insert instructions SLI, SRI which serve to shift a source data value by a specified shift amount and then insert bits from that shifted value other than the shifted-in bits into a destination value with the remaining bits within that destination ... 08/25/05 - 20050188182 - Microprocessor having a set of byte intermingling instructions A data processing system is provided with a digital signal processor that has a set of instructions for intermingling byte fields selected from a selected pair of source operands and storing the ordered result in a selected destination register. A first 32-bit operand is treated as four 8-bit fields while ... 08/11/05 - 20050177706 - Parallel subword instructions for directing results to selected subword locations of data processor result register In the context of a microprocessor and a program, the invention provides parallel subword compare instructions that store results in a selectable intra-register subword location. In a targeting approach, an instruction permits the location to be specified; alternatively, there can be plural instructions, each associated with one of the locations. ... ### FreshPatents.com Support |