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Electrical Computers And Digital Processing Systems: Processing Architectures And Instruction Processing (e.g., Processors) > Instruction Decoding (e.g., By Microinstruction, Start Address Generator, Hardwired) Instruction Decoding (e.g., By Microinstruction, Start Address Generator, Hardwired)Instruction Decoding (e.g., By Microinstruction, Start Address Generator, Hardwired) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.09/28/06 - 20060218378 - Integrated circuit device An integrated circuit device including: a CPU which executes given processing based on an instruction code; an instruction code bus used to supply an instruction code to the CPU from a memory; and an instruction code supply line used to supply an instruction code output from a coprocessor to the ... 06/01/06 - 20060117167 - Processing activity masking in a data processing system Within a data processing systems supporting conditional write processing operations, a trash register is provided such that when non-write conditions are encountered a register write is made to the trash register rather than the data register specified by the conditional write operation. Thus the power signature associated with whether or ... 03/09/06 - 20060053271 - Processor An object of the present invention is to provide a processor that can execute many computations with a small number of instruction codes. As far as multimedia processing is concerned, a plurality of computations of a same type are often executed concurrently and hence a plurality of computing units having ... 12/29/05 - 20050289324 - Trace cache bypassing A system and method of managing processor instructions provides enhanced performance. The system and method provide for decoding a first instruction into a plurality of operations with a decoder. A first copy of the operations is passed from the decoder to a build engine associated with a trace cache. The ... 12/15/05 - 20050278506 - Controller having decoding means A controller has a receiver for receiving an instruction, the instruction being an executable instruction or a wildcard instruction. A decoder is formed to output a control signal corresponding to the executable instruction responsive to an executable instruction, and to output a switch signal responsive to a received wildcard instruction. ... 06/16/05 - 20050132169 - Method and apparatus for execution flow synonyms A method and apparatus for utilizing multiple microcode flow synonyms or hardware flow synonyms for an instruction is disclosed. In one embodiment, a microcode synonym is created for execution on two or more execution units of differing types. One microcode synonym may be chosen for execution depending upon the availability ... ### FreshPatents.com Support |