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Electrical Computers And Digital Processing Systems: Processing Architectures And Instruction Processing (e.g., Processors) > Instruction Fetching > Prefetching PrefetchingPrefetching patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/05/06 - 20060224860 - Apparatus and method for supporting execution of prefetch threads A processor executes one or more prefetch threads and one or more main computing threads. Each prefetch thread executes instructions ahead of a main computing thread to retrieve data for the main computing thread, such as data that the main computing thread may use in the immediate future. Data is ... 09/21/06 - 20060212680 - Methods and apparatus for dynamic prediction by software A method, storage medium, processor instruction and processor to for specifying a value in a first portion of a conditional pre-fetch instruction associated with a branch instruction used for effectuating a branch operation, specifying a target instruction address in a second portion of the instruction, evaluating the value to determine ... 08/10/06 - 20060179277 - System and method for instruction line buffer holding a branch target buffer A system and method that maintains a relatively small Instruction Load Buffer (ILB) is maintained for scheduling instructions. Instructions are sent from Local Store (LS) to the ILB using either an inline prefetcher or a branch table buffer loader. In one embodiment, the prefetcher is a hardware-based prefetcher that fetches, ... 08/03/06 - 20060174090 - Power efficient instruction prefetch mechanism A processor includes a conditional branch instruction prediction mechanism that generates weighted branch prediction values. For weakly weighted predictions, which tend to be less accurate than strongly weighted predictions, the power associating with speculatively filling and subsequently flushing the cache is saved by halting instruction prefetching. Instruction fetching continues when ... 05/11/06 - 20060101239 - Program-controlled unit having a prefetch unit A program-controlled unit stores return addresses not only in a system stack but also in a return stack. The instructions which have already been taken into the program-controlled unit, but are not currently required, are stored in a storage device for alternative instructions. At times when the program-controlled unit is ... 12/15/05 - 20050278505 - Microprocessor architecture including zero impact predictive data pre-fetch mechanism for pipeline data memory A microprocessor architecture including a predictive pre-fetch XY memory pipeline in parallel to the processor's pipeline for processing compound instructions with enhanced processor performance through predictive prefetch techniques. Instruction operands are predictively prefetched from X and Y based on the historical use of operands in instructions that target X and ... 12/01/05 - 20050268073 - Critical section availability Availability of a critical section is determined according to a state associated with an address table entry and a speculative instruction. ... 09/29/05 - 20050216703 - Apparatus and method for decreasing the latency between an instruction cache and a pipeline processor A method and apparatus for executing instructions in a pipeline processor. The method decreases the latency between an instruction cache and a pipeline processor when bubbles occur in the processing stream due to an execution of a branch correction, or when an interrupt changes the sequence of an instruction stream. ... 08/18/05 - 20050182917 - Determining target addresses for instruction flow changing instructions in a data processing apparatus The present invention provides a data processing apparatus and method for determining a target address for an instruction flow changing instruction. The data processing apparatus comprises a processor operable to execute a stream of instructions, and a prefetch unit operable to prefetch instructions from a memory prior to sending those ... 07/14/05 - 20050154859 - Branch prediction in a data processing apparatus The present invention provides a data processing apparatus and method for predicting the execution of an instruction flow changing instruction. The data processing apparatus has a processor operable to execute instructions, and a prefetch unit operable to prefetch instructions from a memory prior to sending those instructions to the processor ... 06/23/05 - 20050138329 - Methods and apparatus to dynamically insert prefetch instructions based on garbage collector analysis and layout of objects Methods and apparatus to dynamically insert prefetch instructions are disclosed. In an example method, one or more samples associated with cache misses are identified from a performance monitoring unit in a processor system. Based on sample information associated with the one or more samples, delinquent information is generated. To dynamically ... 06/09/05 - 20050125632 - Transitioning from instruction cache to trace cache on label boundaries Various embodiments of methods and systems for implementing a microprocessor that includes a trace cache and attempts to transition fetching from instruction cache to trace cache only on label boundaries are disclosed. In one embodiment, a microprocessor may include an instruction cache, a branch prediction unit, and a trace cache. ... ### FreshPatents.com Support |