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Electrical Computers And Digital Processing Systems: Processing Architectures And Instruction Processing (e.g., Processors) > Processing Architecture > Microprocessor Or Multichip Or Multimodule Processor Having Sequential Program Control > Application Specific Application SpecificApplication Specific patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.04/06/06 - 20060075210 - Sensor-network processors using event-driven architecture Event-driven processor architectures are particularly suited for use in multiple sensor node networks and simulators of such networks. A first variation of the processor is particularly suited for use in a sensor node in a wireless sensor network. Through use of the event-driven architecture and special message and timing coprocessors, ... 08/11/05 - 20050177702 - Apparatus and method for communicating between cellular modem software and application engine software of a communications device An apparatus and method for exchanging data between cellular modem software and application engine software of a communications device is disclosed that involves providing a communications module that facilitates communications between the cellular modem software and the application engine software. From the communications module, a generic function is invoked in ... 08/04/05 - 20050172105 - Coupling a general purpose processor to an application specific instruction set processor Provides methods, systems and apparatus for coupling a general purpose processor (GPP) to an application specific instruction set processor (ASIP) in such a manner that the GPP can include execute instructions that do not normally comprise part of its instruction set architecture (ISA). The GPP is coupled to the ASIP ... 07/07/05 - 20050149694 - Java hardware accelerator using microcode engine A hardware Java accelerator is comprised of a decode stage and a microcode stage. Separating into the decode and microcode stage allows the decode stage to implement instruction level parallelism while the microcode stage allows the conversion of a single Java bytecode into multiple native instructions. A reissue buffer is ... ### FreshPatents.com Support |