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Electrical Computers And Digital Processing Systems: Processing Architectures And Instruction Processing (e.g., Processors) > Processing Architecture > Array Processor > Array Processor Operation > Single Instruction, Multiple Data (simd) Single Instruction, Multiple Data (simd)Single Instruction, Multiple Data (simd) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/19/06 - 20060236075 - Simd microprocessor and data processing method A SIMD microprocessor including m processor elements, m being a natural number that is no less than 2 is disclosed. The SIMD microprocessor includes an arithmetic part included in each processor element for processing a maximum of n data items in a single time by using n arithmetic circuits, n ... 07/06/06 - 20060149924 - Evaluation unit for single instruction, multiple data execution engine flag registers According to some embodiments, a evaluation unit may be provided for Single Instruction, Multiple Data (SIMD) execution engine flag registers. For example, a horizontal evaluation unit might perform evaluation operations across multiple vectors being processed by the SIMD execution engine. According to some embodiments, a vertical evaluation unit might perform ... 05/04/06 - 20060095714 - Clip instruction for processor A processor ISA instruction which performs a clipping operation forcing a data element to be within a specified range. A SIMD processor ISA instruction which performs a clipping operation upon each data element in a source operand vector. ... 05/04/06 - 20060095713 - Clip-and-pack instruction for processor A processor ISA instruction which performs a clipping operation forcing a data element to be within a specified range. A SIMD processor ISA instruction which performs a clipping operation upon each data element in a source operand vector. A SIMD processor ISA instruction which performs clipping upon each data elements ... 05/04/06 - 20060095712 - Simd processor having enhanced operand storage interconnects A SIMD processor includes an ALU having data interconnects facilitating the concurrent processing of overlapping data portions of at least one operand store. Such interconnects facilitate the calculation of shift-invariant convolutions, and sum of absolute differences between an operand in the operand store and another operand. ... 01/26/06 - 20060020770 - Processing unit for broadcast parallel processing A processing unit includes a control processor and a plurality of element processors having register files. At least two of the element processors pre-receive different parameters, store the parameter data in the register files, receive the same memory address and the same instruction broadcast by the control processor, read the ... 01/19/06 - 20060015702 - Method and apparatus for simd complex arithmetic Methods and apparatus for calculating Single-Instruction-Multiple-Data (SIMD) complex arithmetic. A coprocessor instruction has a format identifying a multiply and subtract instruction to generate real components for complex multiplication of first operand complex data and corresponding second operand complex data, a cross multiply and add instruction to generate imaginary components for ... 01/05/06 - 20060004985 - Vector simd processor A data processor whose level of operation parallelism is enhanced by composing floating-point inner product execution units to be compatible with single instruction multiple data (SIMD) and thereby enhancing the operation processing capability is made possible. An operating system that can significantly enhance the level of operation parallelism per instruction ... 12/22/05 - 20050283587 - Multidimensional processor architecture A processor architecture includes a number of processing elements for treating input signals. The architecture is organized according to a matrix including rows and columns, the columns of which each include at least one microprocessor block having a computational part and a set of associated processing elements that are able ... 11/17/05 - 20050257026 - Bit serial processing element for a simd array processor In an image processing system, computations on pixel data may be performed by an array of bit-serial processing elements (PEs). A bit-serial PE is implemented with minimal logic in order to provide the highest possible density of PEs constituting the array. Improvements to the PE architecture are achieved to enable ... 11/17/05 - 20050257025 - State engine for data processor Coherent accesses and updates to state shared by parallel processors, such as SIMD array processors, is made possible by the use of state elements having local memory storing the state and permitting serialisation of accesses. Operations on single or multiple items of state are perfumed by a fixed/hardwired set of ... 09/08/05 - 20050198468 - Method and apparatus for superword register value numbering A method and apparatus for superword register value numbering includes hashing an operation code and the value numbers of a plurality of sources to generate a first hash value. The method and apparatus further includes retrieving an operation value number from the first hash table based on the first hash ... 09/01/05 - 20050193185 - Processor execution unit for complex operations Methods and systems for executing SIMD instructions that efficiently implement new SIMD instructions and conventional existing SIMD MAC-type instructions, while avoiding replication of functions in order to keep the size of the logic circuit size to as low a level as can reasonably be achieved. An instruction unit executes Single ... 07/21/05 - 20050160253 - Method for managing data in an array processor and array processor carrying out this method The invention relates to a data management method in an array processor containing elementary processors (302 (i,j)) forming an array (300) of n axes such that an elementary processor (302 (i,j)) is connected to a neighboring elementary processor (302 (i′,j′)) according to each of the 2n directions (310, 312, 314, ... 06/23/05 - 20050138326 - Simd type parallel operation apparatus used for parallel operation of image signal or the like A parallel operation apparatus of a SIMD type comprises a processor element group of the SIMD type including a plurality of processor elements, wherein the respective processor elements simultaneously execute an identical operation, a data memory accessible from the respective processor elements in the processor element group, and an address ... 06/16/05 - 20050132165 - Data processing apparatus and method for performing in parallel a data processing operation on data elements A data processing apparatus and method are provided for performing in parallel a data processing operation on data elements. The data processing apparatus comprises a register data store having a plurality of registers operable to store data elements, and processing logic operable to perform data processing operations on data elements. ... 06/09/05 - 20050125631 - Data element size control within parallel lanes of processing Within a SIMD processor 2 data processing instructions are provided which specify parallel lanes of processing to be performed upon respective data elements. The data elements are permitted to vary in size whilst the number of processing lanes remain constant. Thus, the destination register size for a multiplication may be ... ### FreshPatents.com Support |