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Electrical Computers And Digital Processing Systems: Memory > Address Formation > Address Mapping (e.g., Conversion, Translation) > Virtual Addressing Virtual AddressingVirtual Addressing patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/19/06 - 20060236070 - System and method for reducing the number of translation buffer invalidates an operating system needs to issue Access bit contained in a page table entry is utilized for reducing the number of translation buffer flushes that an operating system needs to issue. A translation buffer flush occurs only when a page table entry is to become invalid and the Access bit of the page table entry is ... 06/29/06 - 20060143426 - System and method for accessing data in a memory device A memory and storage device includes a data management system for transferring data units referenced by logical addresses. The data management system maps the logical addresses to sequential virtual addresses according to the order the data units are received. The data management system also maps the sequential virtual addresses to ... 06/01/06 - 20060117162 - System and method for information handling system memory page mapping optimization Plural consecutive virtual memory pages associated with an application running on an information handling system are mapped to a physical memory page of the information handling system's physical memory, such as dual channel interleaved memory. Each physical memory page that stores plural consecutive virtual memory pages becomes an effective cache ... 05/18/06 - 20060107020 - Sharing data in a user virtual address range with a kernel virtual address range Provided are a method, system, and program for sharing data in a user virtual address range with a kernel virtual address range. A user address in a user address space and length defining a user address range referencing physical locations in a memory are received. A determination is made of ... 05/11/06 - 20060101226 - Method, system, and program for transferring data directed to virtual memory addresses to a device memory Provided are a method, system, and program for transferring data directed to virtual memory addresses to a device memory. Indicator bits are set for ranges of device memory addresses in a device accessible over an Input/Output (I/O) bus indicating whether gathering is enabled for the device memory address ranges. Transfer ... 03/23/06 - 20060064566 - Communication in partitioned computer systems One embodiment of a computer system has processors, having address spaces the processors can address directly. Each address space is directly linked to at least one other address space by memory within more than its own address space. The total size of the address spaces within the system linked together ... 03/16/06 - 20060059326 - Dynamic data structures for tracking file system free space in a flash memory device One or more secondary data structures are maintained containing mappings of logical flash memory addresses to physical flash memory addresses. Each secondary data structure has a predetermined capacity of mappings. A master data structure is also maintained containing a pointer to each of the one or more secondary data structures. ... 02/23/06 - 20060041733 - Operating-system-transparent distributed memory Various embodiments of the present invention provide distributed computing systems featuring an operating-system-transparent distributed memory that, among other things, facilitates shared-message-based inter-thread communication between intercommunicating threads executing concurrently on a single-processor computer system, concurrently and simultaneously on a multi-processor computer system, and concurrently and simultaneously on multiple, discrete computer systems. ... 02/09/06 - 20060031657 - Storage control device having restoration function to initial status, control method of storage device, and program A storage device including an initial data storage area storing initial data, an updated data storage area storing updated data corresponding to the initial data, and a designation area designating either the initial data storage area or the updated data storage area to be readout. A storage control device comprises ... 01/05/06 - 20060004984 - Virtual memory management system Method and apparatus to perform virtual memory management using a general memory access processor are described. ... 12/15/05 - 20050278501 - Method and apparatus for caching storage system A caching storage method and system that includes one or more host devices, network devices, storage devices, and logical volume management functions. An input/output (I/O) request is received from the host device that includes a logical block address. The logical block address is translated into an original storage address for ... 12/08/05 - 20050273572 - Address translator and address translation method An address translator capable of reducing system loads in address translation and an overhead in switching between operating systems. A plurality of address translation buffers classifies and stores virtual addresses and real addresses based on a plurality of operating systems which is run by a processor. For example, the address ... 12/08/05 - 20050273571 - Distributed virtual multiprocessor A distributed virtual multiprocessor having a plurality of nodes coupled to one another by a network. A first node of the distributed virtual multiprocessor page faults in response to an instruction that indicates a memory reference at a virtual address. The first node indexes a first address translation data structure ... 12/08/05 - 20050273570 - Virtual space manager for computer having a physical address extension feature A physical address extension feature maps multiple virtual memory spaces to an extended physical memory. A virtual space manager dynamically allocates pages of the physical memory to respective virtual spaces. The virtual space manager responds to a request from an application for allocation of a page of physical memory by ... 12/08/05 - 20050273569 - Data processing apparatus with parallel operating functional units A program of instruction words is executed with a VLIW data processing apparatus. The apparatus comprises a plurality of functional units capable of executing a plurality of instructions from each instruction word in parallel. The instructions from each of at least some of the instruction words are fetched from respective ... 12/01/05 - 20050268070 - Meta-address architecture for parallel, dynamically reconfigurable computing A set of S-machines, a T-machine corresponding to each S-machine, a General Purpose Interconnect Matrix (GPIM), a set of I/O T-machines, a set of I/O devices, and a master time-base unit form a system for scalable, parallel, dynamically reconfigurable computing. Each S-machine is a dynamically reconfigurable computer having a memory, ... 10/27/05 - 20050240750 - Interleaved mapping method and apparatus for accessing memory This invention provides a method for accessing memory. The method includes, generating a block index for a block of data, mapping the block index to a physical address of a memory based on the block index and a number N, wherein N is bank number of the memory, storing the ... 10/20/05 - 20050235132 - System and method for dynamic lun mapping A system for dynamic logical unit (LUN) mapping includes a host and an off-host virtualizer. The off-host virtualizer may be configured to present a virtual storage device that includes one or more regions that are initially unmapped to virtual storage, and to make the virtual storage device accessible to the ... 10/20/05 - 20050235131 - Memory controller for non-homogeneous memory system A memory controller includes a first memory interface adapted to be coupled to one or more first memory devices of a first memory type having a first set of attributes, and a second memory interface adapted to be coupled to one or more second memory devices of a second memory ... 10/13/05 - 20050228965 - Method and device for calculating addresses of a segmented program memory A method and a device for converting a virtual address of a program executed by a processor and provided by a program counter into a physical address in a program memory, the program having been stored in the memory in at least one segment of consecutive addresses. The method includes ... 10/06/05 - 20050223189 - Method and apparatus to perform memory management A method and apparatus to perform memory management are described. ... 09/29/05 - 20050216695 - Memory extension for a data processor to provide both common and separate physical memory areas for virtual memory spaces A physical address extension feature maps multiple virtual memory spaces to an extended physical memory. Performance is enhanced by mapping chunks of both common and separate physical memory to each of the virtual memory spaces to provide efficient communication of parameters to and results from well-defined or well-contained software modules ... 09/22/05 - 20050210218 - Method and apparatus for improving update performance of non-uniform access time persistent storage media A high volume storage system is described which continuously remaps where data is stored. The remapping is designed so that writing occurs on an optimum speed basis tuned to the storage system being utilized, e.g., the writes occur in substantially sequential disk storage locations to the extent possible. By remapping ... 09/15/05 - 20050204115 - Semiconductor memory device, memory controller and data recording method A read/write memory 109 is provided with a memory controller 110 so as to store address management information temporarily. A non-volatile memory access unit 106 writes user data on a non-volatile memory 111 according to a write instruction. When the user data is rewritten, an address management information controller 105 ... 09/15/05 - 20050204114 - Rapid locality selection for efficient memory allocation One embodiment disclosed relates to a method of selecting a physical memory locality in a multiprocessor system. A data structure including sets of equidistant localities is provided. A preferred locality is determined using a pointer to a locality within said data structure. Other embodiments disclosed relate to the multiprocessor computing ... 09/08/05 - 20050198465 - Data managing method for memory apparatus A block correlation table includes block addresses of unusable block portions in an irreversibly writeable memory and includes addresses of associated substitute block portions in the irreversibly writeable memory. A request for data stored at a logical address is received from a host processor. A physical address in the irreversibly ... 09/08/05 - 20050198464 - Lazy stack memory allocation in systems with virtual memory A method for mapping of logical memory regions (usually referred to as pages) of application addressable contiguous memory space to non-contiguous pages of the physical memory is provided. Each thread in an application is allocated a substantially larger amount of virtual memory, than will typically be used by the thread. ... 08/25/05 - 20050188174 - Extensible creation and editing of collections of objects A tool for creating collections of data objects is described. The tool may include a basket or list pane control in an explorer frame that includes interfaces for receiving and displaying data objects, or shortcuts to data objects, that are selected by a user to be included in a collection ... 08/25/05 - 20050188173 - Physical domain separation In one embodiment, the present invention includes a method to execute a first process in a first physical domain and execute a second process in a second physical domain. The processes may be managed such that each process cannot access physical memory of the other physical domain, but may be ... 07/14/05 - 20050154854 - Method, system, and article of manufacture for reserving memory Provided are a method, system, and article of manufacture, wherein in certain embodiments, a plurality of logical memory blocks corresponding to a memory in a computational device are allocated. An attribute is associated with at least one logical memory block, wherein the attribute indicates whether the at least one logical ... 06/30/05 - 20050144421 - Data management device and method for flash memory A data management device and a data management method for a flash memory, in which physical addresses are classified according to pages, each of which is a physical data operation unit, and a predetermined data operation is performed with respect to the classified physical addresses. The data management device and ... 06/30/05 - 20050144420 - Data processing apparatus and compiler apparatus The data processing apparatus capable of efficiently using a cache memory includes: a cache memory 28 and a memory 30 that stores an instruction or data in each area specified by a physical address; an arithmetic processing unit 22 that outputs a logical address including the physical address and process ... 06/30/05 - 20050144419 - Semiconductor memory device having advanced tag block A semiconductor memory device includes a row decoding block for decoding an inputted address to thereby generate a logical unit cell block address and a decoded word line address; a tag block for converting the logical unit cell block address into a physical unit cell block address; a decoded address ... 06/30/05 - 20050144418 - Memory controller, flash memory system, and method of controlling operation for data exchange between host system and flash memory There is disclosed a controller included in a flash memory system attachable to a memory interface of a host system. The controller performs a process for minimizing the maximum number of defective blocks to be classified into each zone, by using a plurality of replacement tables or a plurality of ... 06/30/05 - 20050144417 - Control of multiply mapped memory locations A technique to manage multiple-mapped memory and to selectively execute at least a portion of a process from either an unprotected function or a protected function. The process contains memory that is multiple-mapped to both an unprotected memory region and to a protected memory region that stores a protected function. ... ### FreshPatents.com Support |