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Electrical Computers And Digital Processing Systems: Memory > Address Formation Address FormationAddress Formation patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/12/06 - 20060230250 - Memory interface for volatile and non-volatile memory devices Accessing data stored in a memory device through an interface, with addressing data on the memory device through at least one address bus, controlling at least data flow to and from the memory device through at least one command bus, and transferring data to and from the memory through at ... 08/31/06 - 20060195675 - Association of host translations that are associated to an access control level on a pci bridge that supports virtualization A method, computer program product, and distributed data processing system that allows a system image within a multiple system image virtual server to directly expose a portion, or all, of its associated system memory to a shared PCI adapter without having to go through a trusted component, such as a ... 08/17/06 - 20060184763 - System and method for updating firmware in a non-volatile memory without using a processor A processing system connected to an apparatus includes a non-volatile memory (NVM) for storing firmware needed by the processing system; and an NVM control interface capable of writing and reading data stored in the NVM; wherein the NVM control interface reads a previous piece of data being already written into ... 04/20/06 - 20060085620 - Address aligned resource set allocation in a memory space Method and apparatus for aligning addresses of resource sets in a memory space used by a software system. The resource sets are accessed by multiple layers of a software system and are each provided with a respective alignment requirement preferably comprising a power of two. A table preferably includes entries ... 04/06/06 - 20060075205 - Creating annotations of transient computer objects A method, system and program product for annotating a transient state of a computer displayed application enables annotation of transient applications particularly web based applications. A transient application address (or key) and state information related to an application at a transient state are stored in an annotation store along with ... 03/16/06 - 20060059325 - Apparatus and method for assigning addresses to components or modules in a system A system having replaceable components, each with a MAC address provided by its manufacturer, includes a central system controller which generates predetermined MAC addresses each associated with a slot into which the components are inserted. When a component (card) is inserted into a slot, the controller checks the MAC address ... 02/16/06 - 20060036830 - Method for monitoring access to virtual memory pages Various embodiments of the present invention are directed to efficient methods for virtual-machine monitors to detect, at run time, initial attempts by guest operating systems and other higher-level software to access or execute particular instructions or values corresponding to the particular instructions, that, when accessed for execution, need to be ... 01/05/06 - 20060004980 - Address creator and arithmetic circuit A plurality of address creators are provided corresponding to a plurality of memories of ALU modules. The address creators create addresses for reading or writing data from the memories each time a connection configuration is switched. In creating addresses in the memories, the address creators enable operations to be set ... 12/29/05 - 20050289319 - Memory control apparatus and method for scheduling commands Provided are a memory control apparatus and method for controlling an order of processing memory access commands from a plurality of master devices when the master devices access a memory to improve a processing speed. The memory controller includes a command queue receiving memory access commands from at least one ... 12/15/05 - 20050278500 - Addressing type data comparison circuit The present invention relates to an addressing type data comparison circuit that uses an addressing system, which enables an external circuit to receive a standard value and a comparison value. Through the process of addressing type data comparison circuit, the addressing type data comparison circuit outputs the operation result to ... 12/01/05 - 20050268066 - High speed data bus The invention comprises data processing systems and components thereof. Such systems may include a memory controller, a plurality of memory devices, a data bus coupling the memory controller with the plurality of memory devices, and at least one bus switch located in the data bus between the memory controller and ... 09/08/05 - 20050198462 - Charge transfer complexes including an electron donor and an electron acceptor as basis of resistive memories Materials are described for producing memory cells which have a size in the nanometer range and include a CT complex located between two electrodes. The CT complex includes thiophene derivatives, pyrrole derivatives or phthalocyanines together with naphthalenetetracarboxylic acid, dianhydrides, diamides, fullerenes or perylene compounds. ... 08/25/05 - 20050188171 - Method and apparatus to prevent vulnerability to virus and worm attacks through instruction remapping A method, apparatus, and computer instructions for processing instructions by a processing unit. An instruction set is dynamically set for the processing unit using a selected instruction map. The selected instruction map is selected as one being different from a normal instruction map for the processing unit. The instructions are ... 07/28/05 - 20050166031 - Memory access register file The general idea according to the invention is to introduce a special purpose register file (34) adapted for holding memory address calculation information received from memory (50, 70) and to provide one or more dedicated interfaces (73, 74) for allowing efficient transfer of memory address calculation information in relation to ... 06/09/05 - 20050125623 - Method of efficiently handling multiple page sizes in an effective to real address translation (erat) table A method and apparatus for efficiently storing an effective address (EA) in an effective to real address translation (ERAT) table supporting multiple page sizes by adding PSI fields, based on the number of unique page sizes supported, to each ERAT entry and using one ERAT entry to store an EA ... 06/09/05 - 20050125622 - Memory device capable of supporting sequential multiple-byte reading When the memory device receives address information and byte information M, the memory device continuously provides M bytes corresponding to M addresses following an address assigned in the address information. The memory device includes: an address calculation module, an address buffer, a decoding module, a plurality of memory units and ... ### FreshPatents.com Support |