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Electrical Computers And Digital Processing Systems: Memory > Storage Accessing And Control > Hierarchical Memories > Caching > Entry Replacement Strategy > Least Recently Used Least Recently UsedLeast Recently Used patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/05/06 - 20060224830 - Performance of a cache by detecting cache lines that have been reused A method and system for improving the performance of a cache. The cache may include an array of tag entries where each tag entry includes an additional bit (“reused bit”) used to indicate whether its associated cache line has been reused, i.e., has been requested or referenced by the processor. ... 09/28/06 - 20060218352 - Cache eviction technique for reducing cache eviction traffic A technique for intelligently evicting cache lines within an inclusive cache architecture. More particularly, embodiments of the invention relate to a technique to evict cache lines within an inclusive cache hierarchy based on the cache coherency traffic generated between an upper level cache and lower level caches. ... 08/10/06 - 20060179235 - Cache mechanism and method for avoiding cast out on bad victim select and recycling victim select operation A method, apparatus, and computer for identifying selection of a bad victim during victim selection at a cache and recovering from such bad victim selection without causing the system to crash or suspend forward progress of the victim selection process. Among the bad victim selection addressed are recovery from selection ... 08/10/06 - 20060179234 - Cache member protection with partial make mru allocation A method and apparatus for enabling protection of a particular member of a cache during LRU victim selection. LRU state array includes additional “protection” bits in addition to the state bits. The protection bits serve as a pointer to identify the location of the member of the congruence class that ... 08/10/06 - 20060179233 - Method, system, and computer program product for implementing a dual-addressable cache A method, system, and computer program product for implementing a dual-addressable cache is provided. The method includes adding fields for indirect indices to each congruence class provided in a cache directory. The cache directory is indexed by primary addresses. In response to a request for a primary address based upon ... 08/10/06 - 20060179232 - Pipelining d states for mru steerage during mru/lru member allocation A method and apparatus for preventing selection of Deleted (D) members as an LRU victim during LRU victim selection. During each cache access targeting the particular congruence class, the deleted cache line is identified from information in the cache directory. A location of a deleted cache line is pipelined through ... 08/10/06 - 20060179231 - System having cache memory and method of accessing A system having an upper-level cache and a lower-level cache working in a victim mode is disclosed. The victim cache comprising a most recently used control module to identify a cache location having been most recently read as a least recently used cache location. ... 06/29/06 - 20060143400 - Replacement in non-uniform access cache structure An embodiment of the present invention is a technique to perform replacement in a non-uniform access cache structure. A cache memory stores data and associated tags in a non-uniform access manner. The cache memory has a plurality of memory banks arranged according to a distance hierarchy with respect to one ... 06/29/06 - 20060143399 - Least recently used eviction implementation Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction ... 06/29/06 - 20060143398 - Method and apparatus for least recently used (lru) software cache A data cache has a number of rows. A corresponding list of the rows is maintained, the list including a number of entries, each entry corresponding to a row and including a key uniquely identifying the row, and a count indicating an age of the row. Updating the cache involves ... 04/13/06 - 20060080510 - Apparatus and method to manage a data cache A method is disclosed to manage a data cache. The method provides a data cache comprising a plurality of tracks, where each track comprises one or more segments. The method further maintains a first LRU list comprising one or more first tracks having a low reuse potential, maintains a second ... 02/23/06 - 20060041720 - Latency-aware replacement system and method for cache memories A method for replacing cache lines in a computer system having a non-uniform set associative cache memory is disclosed. The method incorporates access latency as an additional factor into the existing ranking guidelines for replacement of a line, the higher the rank of the line the sooner that it is ... 02/16/06 - 20060036811 - Method for software controllable dynamically lockable cache line replacement system An LRU array and method for tracking the accessing of lines of an associative cache. The most recently accessed lines of the cache are identified in the table, and cache lines can be blocked from being replaced. The LRU array contains a data array having a row of data representing ... 01/05/06 - 20060004964 - Method and system of ensuring integrity of a secure mode entry sequence A method and system of ensuring integrity of a secure mode entry sequence. At least some of the exemplary embodiments may be a method comprising transferring a plurality of instructions to a microprocessor, wherein the instructions prepare the processor for entry into a secure mode of operation. The instructions comprise ... 12/29/05 - 20050289300 - Disable write back on atomic reserved line in a small cache system The present invention provides for managing an atomic facility cache write back state machine. A first write back selection is made. A reservation pointer pointing to the reserved line in the atomic facility data array is established. A next write back selection is made. An entry for the reservation point ... 12/22/05 - 20050283573 - System and method for an optimized least recently used lookup cache A method, computer program product, and a data processing system for maintaining objects in a lookup cache is provided. A primary list is populated with a first plurality of objects. The primary list is an unordered list of the first plurality of objects. A secondary list is populated with a ... 11/24/05 - 20050262306 - Hybrid-cache having static and dynamic portions System and method for a hybrid-cache. Data received from a data source is cached within a static cache as stable data. The static cache is a cache having a fixed size. Portions of the stable data within the static cache are evicted to a dynamic cache when the static cache ... 11/10/05 - 20050251628 - Method, system, and program for demoting tracks from cache Provided are a method, system, and program for destaging a track from cache to a storage device. The destaged track is retained in the cache. Verification is made of whether the storage device successfully completed writing data. Indication is made of destaged tracks eligible for removal from the cache that ... 08/04/05 - 20050172080 - Cache device, cache data management method, and computer program A cache device and a method for controlling cached data that enable efficient use of a storage area and improve the hit ratio are provided. When cache replacement is carried out in cache devices connected to each other through networks, data control is carried out so that data blocks set ... ### FreshPatents.com Support |