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Electrical Computers And Digital Processing Systems: Memory > Storage Accessing And Control > Specific Memory Composition > Solid-state Random Access Memory (ram)

Solid-state Random Access Memory (ram)

Solid-state Random Access Memory (ram) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

10/12/06 - 20060230225 - Random access interface in a serial memory device
A random access interface is provided to a non-volatile, serial memory array. An address multiplexer has an external address connection and a serial address connection. The external address may be of a non-sequential nature, depending on the accessing instruction. Boot data is loaded from the first row of the memory ...

08/24/06 - 20060190675 - Control apparatus
A control apparatus includes an RAM capable of rewriting data; a data writing unit that writes a predetermined length of data output to the RAM in an arbitrary area of the RAM on the basis of an address signal for designating an address of the RAM and an effective area ...

07/13/06 - 20060155925 - Data access in a processor
A data processor comprising: a register memory comprising an array of memory cells extending in two dimensions, the cells being located on rows in the first dimension and columns in the second dimension, each cell being addressable by means of an instruction specifying a pair of coordinates that identify the ...

07/13/06 - 20060155924 - Hardware stack having entries with a data portion and associated counter
According to some embodiments, determining a new value to be pushed onto a hardware stack having n entries is determined. Each entry in the stack may include a data portion and an associated counter. If the new value equals the data portion of the entry associated with a current top ...

06/15/06 - 20060129753 - Dynamic packing of volatile memory
A system and method for managing volatile memory which, may not simply look for a good fit in memory or store content according to rigid memory area classifications, but allocates memory to minimize the memory area requiring refresh and/or free memory areas so they may be powered down. A number ...

06/08/06 - 20060123187 - Memory controller to utilize dram write buffers
A method, an apparatus, and a computer program are provided to account for data stored in Dynamic Random Access Memory (DRAM) write buffers. There is difficulty in tracking the data stored in DRAM write buffers. To alleviate the difficulty, a cache line list is employed. The cache line list is ...

05/11/06 - 20060101195 - Layered memory architecture for deterministic finite automaton based string matching useful in network intrusion detection and prevention systems and apparatuses
The present invention provides a method and apparatus for searching multiple strings within a packet data using deterministic finite automata. The apparatus includes means for updating memory tables stored in a layered memory architecture comprising a BRAM, an SRAM and a DRAM; a mechanism to strategically store the relevant data ...

04/06/06 - 20060075184 - Synchronous\asynchronous memory device with single port memory unit
A synchronous\asynchronous memory device includes a single port memory unit for storing data according to a read clock, a configurable write buffer for storing data according to a write clock and for transferring the stored data to the single port memory unit according to the read clock, a write blocking ...

03/30/06 - 20060069853 - Software management
Methods and systems for operating computing devices are described. In one embodiment, a small amount of static RAM (SRAM) is incorporated into an automotive computing device. The SRAM is battery-backed to provide a non-volatile memory space in which critical data, e.g. the object store, can be maintained in the event ...

02/16/06 - 20060036805 - Software management systems and methods for automotive computing devices
Methods and systems for operating automotive computing devices are described. ...

01/19/06 - 20060015679 - Method and system for using dynamic random access memory as cache memory
A cache memory system and method includes a DRAM having a plurality of banks, and it also includes 2 SRAMs each having a capacity that is equal to the capacity of each bank of the DRAM. In operation, data read from a bank of the DRAM are stored in one ...

01/19/06 - 20060015678 - Virtual memory device including a bridge circuit
A virtual memory device includes a bridge circuit wherein in an integrated SOC device, a bridge circuit with less than 10% die size and a non-volatile XIP random access memory is used to connect to a high efficiency memory bridge circuit, so as to facilitate an improvement of boot-up speed ...

12/22/05 - 20050283566 - Self testing and securing ram system and method
A self-testing and correcting read only memory (RAM) device and methodology is disclosed herein. The device includes at least one array of memory to enable data storage and self-testing RAM interface for evaluating, correcting, and/or compensating for memory cell errors. The RAM device, via the self-testing RAM interface, supports interaction ...

12/08/05 - 20050273552 - Method and apparatus for reading and writing to solid-state memory
A method and apparatus for writing to solid-state memory is provided herein. In particular, a controller is provided that monitors operating parameters of each die within the system. In order to enable fast, real-time write operations, feedback from each die is analyzed and compared with a stored set of operating ...

11/24/05 - 20050262293 - Sram core cell for light-emitting display
A SRAM core cell for a light-emitting display applicable to a data driver of an organic electro-luminescence light-emitting display device includes thin film transistors as a data memory for a data driver of the light-emitting display. The SRAM core cell also includes switching transistors and data memory transistors. The switching ...

10/20/05 - 20050235098 - Semiconductor memory device, memory controller and memory access device
A semiconductor memory card 1 includes a user data area 21 and a management information area 22, in a data storing unit 2. According to a writing test command from a memory access device 6, a memory controller 3 writes data into a user data storing area and measures the ...

08/11/05 - 20050177679 - Semiconductor memory device
A memory device comprises a magneto-resistive random access memory (MRAM), a cache comprising a volatile memory, and a decoder configured to translate referenced addresses to physical addresses to access data and pass the data between the MRAM and the cache and between the cache and a controller. ...

08/04/05 - 20050172069 - Routability for memory devices
A computer system provides improved routability for memory modules. Chips are placed on the back side of the module directly behind the chips on the front side, and vias connects destination pins on the front side to the back side. Internal assignments are routed to the pins so as to ...

06/23/05 - 20050138275 - Digital signal processor
A digital signal processor is adapted to a working RAM, which is capable of storing a plurality of data in a rewritable manner and whose storage area is divided into a plurality of sub-areas that are designated by addresses in read/write operations, wherein an operation circuit performs calculations on the ...



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