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Electrical Computers And Digital Data Processing Systems: Input/output > Input/output Data Processing > Input/output Data Buffering Input/output Data BufferingInput/output Data Buffering patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/12/06 - 20060230197 - Data storage system with shared cache address space An apparatus for a node of a peer-to-peer network having a plurality of nodes comprises one or more I/O adapters; a cache component; one or more inter-node routing components; a memory mapping component for presenting to the I/O adapters a single address space mapped across a plurality of memory elements ... 10/05/06 - 20060224789 - Flash memories and processing systems including the same A memory may include first and second buffer memories and a memory core. The memory core may include memory blocks each having a plurality of pages and a page buffer for reading data from a selected memory block. A control logic may control the first and second buffer memories and ... 10/05/06 - 20060224788 - Data processing system, data processing method, computer-readable storage medium, and disk drive In a data processing system that processes serial data transferred from a processor formed as one chip and transmits the resultant data to another chip, a data output processing unit that processes serial data transferred from a single processor or a plurality of processors comprises a bank designation serial data ... 10/05/06 - 20060224787 - Program, method and apparatus for form output Queues are provided, which are a high-speed small-capacity queue disposed in a high-speed small-capacity medium inputting and outputting online form messages at high speed and a low-speed large-capacity queue disposed in a low-speed large-capacity medium inputting and outputting batch form messages at a speed slower than the high-speed small-capacity medium. ... 09/21/06 - 20060212617 - Data output method, data output apparatus and computer program product A data output apparatus checks data accumulated state in the accumulating unit at a preset check interval, and changes at least one setting among an initial accumulation amount to be used as a basis for starting to output the data accumulated in the accumulating unit, an upper accumulation limit amount ... 09/21/06 - 20060212616 - Method and system for configurable drain mechanism in two-way handshake system A method and system for configurable drain for two-way handshake system is provided and may comprise coupling a transmitting device to a drain bucket, and draining unwanted data at the transmitting device. The drain bucket may be configurably coupled to the transmitting device via a switch, where the switch may ... 08/31/06 - 20060195633 - Disk driver cluster management of time shift buffer A file allocation system for a hard disk drive includes a memory with driver logic and a processor configured with the driver logic to receive a request to allocate hard disk space of a defined size for a buffer file. In some embodiments, the processor is configured with the driver ... 08/31/06 - 20060195632 - Reliable management communications path algorithm using in-band signaling and high priority context processing Disclosed herein is a highly reliable management communication path to the CPU of a network device using in-band signaling by periodically servicing the Ethernet MAC, such as during system tick and/or watchdog timer refresh interrupts. The servicing selectively processes frames that are uniquely destined to or originating from a managing ... 08/24/06 - 20060190641 - Buffer management in packet switched fabric devices A buffer management system for cooperating with a packet based switching system is proposed. The purpose of this system is to reduce traffic congestion, ameliorate its effects, provide fairness to each data source, and to increase functionality while respecting advantageous system characteristics. Fabric output buffers include an arbitration function, a ... 08/24/06 - 20060190640 - Data transfer system and data transfer method A buffer memory temporarily stores data sequentially outputted to a data using apparatus. A memory is accessed by at least one memory access circuit via a bus. A data transfer circuit performs a data transfer from the memory to the buffer memory via the bus. The data transfer circuit performs ... 08/24/06 - 20060190639 - Automatic adjustment of time a consumer waits to access data from a queue during a waiting phase and transmission phase at the queue Provided are a method, system, and program automatic adjustment of time a consumer waits to access data from a queue during a waiting phase and transmission phase at the queue. A determination is made as to whether a queue is in a waiting phase or a transmission phase for data ... 08/24/06 - 20060190638 - Asynchronous jitter reduction technique The amount of jitter incurred when reading data written into a FIFO can be reduced by clocking the FIFO with Read Clock pulses at a frequency χ ƒn where χ is a whole integer and ƒn is the frequency at which the memory is clocked to write data. Read Addresses ... 08/10/06 - 20060179187 - Operation supporting system and operation supporting method There is provided an operation supporting apparatus including a memory portion that stores characteristics of an operation to be multiplexed, and a determination portion that determines appropriateness of multiple operations to be multiplexed on the basis of the characteristics thereof stored in the memory portion. ... 08/10/06 - 20060179186 - Method and apparatus for adaptive buffer sizing A method and apparatus for adaptive buffer sizing adjusts the size of the buffer at different levels using a “high water mark” to different levels for different system conditions. The high water mark is used by the buffer logic as an indication of when to assert the buffer “Full” flag. ... 07/20/06 - 20060161698 - Architecture for accessing an external memory Provided is an external memory accessing architecture for use with IC comprising a first bus connected to an external memory and having n-bit data width; a first buffer unit of k serially connected first buffers each having n-bit data width, a first one of the first buffers connected to the ... 07/13/06 - 20060155896 - Program verification for non-volatile memory A non-volatile memory device includes page buffers arranged in groups, each group being coupled to a corresponding data output line so that data from more than one of the page buffers in each group may be simultaneously represented on the corresponding data output line during a program verification operation. Page ... 07/13/06 - 20060155895 - Data transferring apparatus and data transferring method A data transferring apparatus receives comparison data to be compared with stored data from an external unit, searches data corresponding to the comparison data from among the stored data, and transfers the data searched to the external unit. A control unit generates comparison-condition information for searching predetermined stored data from ... 07/13/06 - 20060155894 - Asynchronous messaging in storage area network A computer system includes an asynchronous messaging-and-queuing system; and a storage area network having a storage area network controller in communication with the asynchronous messaging-and-queuing system. The storage area network controller includes control means to control a message queue on behalf of one or more queue managers, which may be ... 07/06/06 - 20060149866 - Method and apparatus for transferring data A pointer comparing unit determines whether a value of a writing pointer is identical to a value of a reading pointer. When it is determined that the value of the writing pointer is different from the value of the reading pointer, an inter-memory transfer unit reads data stored in a ... 07/06/06 - 20060149865 - Queue rendezvous Queue rendezvous services allow mutual exclusion of processing of certain message types in a generic way without unnecessarily tying up queue resources while waiting for certain conditions to be met and without requiring a queue client to implement application locks to support mutual exclusion processing rules. ... 07/06/06 - 20060149864 - Data packet queue handling method and system A data packet queue handling method and system is proposed, which is designed for use with a computer system having a data packet generating unit, a data packet transfer interface, a data packet processing unit, and a memory unit, wherein the data packet generating unit is capable of generating a ... 06/29/06 - 20060143333 - I/o hub resident cache line monitor and device register update The apparatus and method described herein are for enabling cacheable writes to I/O device registers. A cache monitor, which may be present in a controller hub, monitors accesses to cache lines in a microprocessor. The cache monitor also associates cache lines in the microprocessor with I/O device registers. When an ... 06/22/06 - 20060136619 - Data integrity processing and protection techniques Techniques to accelerate block guard processing of data by use of block guard units in a path between a source memory device and an originator of a data transfer request. The block guard unit may intercept the data transfer request and data transferred in response to the data transfer request. ... 06/22/06 - 20060136618 - System, method and storage medium for a multi-mode memory buffer device A multi-mode memory buffer device for use in various memory subsystem structures. The buffer device includes a packetized multi-transfer interface which is redriven to permit connection between a first memory assembly and cascaded memory assemblies. The buffer device also includes a memory interface adapted to connect to either a second ... 06/15/06 - 20060129716 - Data storage device and buffer control method thereof Embodiments of the invention reduce the host's wait time by controlling buffer for a data storage device. In a hard disk drive (HDD) disclosed herein, after write data from a host is stored in a write buffer, the size of a continuous free space left forward from the end position ... 06/15/06 - 20060129715 - System and method for transferring data in storage controllers A method and system for processing data by a storage controller with a buffer controller coupled to a buffer memory is provided. The method includes, evaluating incoming data block size; determining if the incoming data requires padding; and padding incoming data such that the incoming data can be processed by ... 06/15/06 - 20060129714 - Method and apparatus for transferring data A pointer comparing unit determines whether a value of a writing pointer is identical to a value of a reading pointer. When it is determined that the value of the writing pointer is different from the value of the reading pointer, an inter-memory transfer unit reads data stored in a ... 06/15/06 - 20060129713 - Pipeline architecture for content creation for the portable media player from the internet A method for transferring a media file includes receiving the media file from a computer network and writing a first portion of the media file into a first buffer. When the first buffer is full, the method further includes writing a second portion of the media file into a second ... 06/15/06 - 20060129712 - Buffer chip for a multi-rank dual inline memory module (dimm) The invention refers to a buffer chip for driving external input signals applied to a multi-rank dual inline memory module (DIMM) to a predetermined number (N) of memory chips mounted on a printed circuit board of said dual inline memory module, wherein the buffer chip comprises stacked register dies each ... 06/08/06 - 20060123161 - Methods and systems for buffering console port data in a telecommunications equipment shelf assembly A method and system for retaining serial port data is provided. Under certain conditions, such as following a system reset, the storage of current serial port data is inhibited. A determination is made whether non-volatile storage media is available. If non-volatile storage media is available, then data from the buffer ... 05/25/06 - 20060112201 - Amba slave modular bus interfaces A method of operating a circuit, comprising the steps of (A) buffering a read signal received within a plurality of first transfers to the circuit, (B) transmitting the read signal in a second transfer from the circuit, (C) buffering a first write signal received in a third transfer to the ... 05/18/06 - 20060106961 - Streaming data transfer system and repeater therefor A data transfer system allowing high-quality transfer of streaming data through a network having a relatively large delay variation in data delivery is disclosed. When transferring streaming data in packets from a server computer to a client computer through a repeater provided in the network, the repeater buffers a streaming ... 05/18/06 - 20060106960 - Deleting expired items in a queue data structure A method for deleting expired items in a queue data structure, the queue data structure comprising a sequential list of ordered data items including a queue head at one end of the sequential list and a queue tail at another end of the sequential list, wherein each data item includes ... 05/18/06 - 20060106959 - Disk driver cluster management of time shift bufer with file allocation table structure A file allocation system for a hard disk drive includes a memory with driver logic and a processor configured with the driver logic to receive a request to allocate hard disk space of a defined size for a buffer file. In some embodiments, the processor is configured with the driver ... 05/18/06 - 20060106958 - Efficient multiprocessor system and methods thereof A multiprocessor system (206) having a plurality of processors (304-306), each processor capable of processing at least one queue (404A-404N) of at least one service application, and at least one task (402A-402N) comprising at least one of the at least one queue; and wherein a first processor and a second ... 05/11/06 - 20060101172 - System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second position A method and structure for determining when a frame of information comprised of one or more buffers of data being transmitted in a network processor has completed transmission is provided. The network processor includes several control blocks, one for each data buffer, each containing control information linking one buffer to ... 05/04/06 - 20060095612 - System and method for implementing a demand paging jitter buffer algorithm An apparatus for providing storage is provided that includes a jitter buffer element. The jitter buffer element includes a primary jitter buffer storage that includes a primary low water mark and a primary high water mark. The jitter buffer element also includes a secondary jitter buffer storage that includes a ... 05/04/06 - 20060095611 - Hardware supported peripheral component memory alignment method A memory alignment system for efficient data transfer between a host system and a remote system comprises a data communications controller configured to align transmitted and received data based on formatting information received from the host system. When transmitting data from local system memory, for example over an Ethernet connection, ... 05/04/06 - 20060095610 - Moving, resizing, and memory management for producer-consumer queues Systems, methods, and software products for moving and/or resizing a producer-consumer queue in memory without stopping all activity is provided so that no data is lost or accidentally duplicated during the move. There is a software consumer and a hardware producer, such as a host channel adapter. ... 05/04/06 - 20060095609 - Methodology and apparatus for implementing write combining Write-combining in a computer system that uses a push model is set forth herein. In one embodiment, the method comprises creating one or more packets having a descriptor and the data associated with detected write transactions stored in the buffer assigned to a write-combinable range in response to a flush ... 05/04/06 - 20060095608 - Buffer utilization in a frame based communication system A method according to one embodiment may include reserving a plurality of buffers having an aggregate capacity, receiving a frame having a size less than the aggregate capacity, and releasing at least one of the plurality of buffers that is unused to store the frame. Of course, many alternatives, variations, ... 05/04/06 - 20060095607 - Pci to pci express protocol conversion In embodiments of the present invention, a PCI bus to PCE Express protocol conversion module includes a process implemented by control logic to convert streaming PCI information to PCI Express packets. In one embodiment, an agent may transfer PCI data and associated byte enables to a first queue, which may ... 04/20/06 - 20060085576 - System and method for a high-speed shift-type buffer Systems and methods for improving the performance of a multimedia processor system by dynamically evaluating the current performance of the system and, if necessary, updating the configurations of the individual processors to improve the performance of the system. One embodiment comprises a method implemented in a multiprocessor system, including evaluating ... 04/13/06 - 20060080482 - Dynamic buffer size allocation for multiplexed streaming A method and disc drive are disclosed that employ dynamic buffer size allocation for handling multiple data streams, such as time-sensitive audio/video data. The method involves allocating a certain amount of required buffer space for each data stream to be handled without an interruption in recording or playing back the ... 04/06/06 - 20060075163 - Decimation of fixed length queues Decimation of data from a fixed length queue retaining a representative sample of the old data. Exponential decimation removes every nth sample. Dithered exponential decimation offsets the exponential decimation approach by a probabilistic amount. Recursive decimation selects a portion of the queue and removes elements. ... 04/06/06 - 20060075162 - Elastic buffer An output of a first ring counter is held in a first storage circuit. Outputs of a second ring counter and the first storage circuit are input to a first AND circuit group. An output of a third ring counter and an output of the first storage circuit are input ... 04/06/06 - 20060075161 - Methd and system for using an in-line credit extender with a host bus adapter A storage area network (“SAN”) and a system is provided. The SAN includes, a host bus adapter operationally coupled with a credit extender, wherein the credit extender receives frames from a Fibre Channel network and sends the received frames to the HBA based on buffer space available in the HBA. ... 04/06/06 - 20060075160 - Method for reducing the bus load in a synchronous data bus system The present invention is related to buffering between synchronous circuits communication via a global synchronous bus, and in particular an arrangement for reducing the busload in a TDM bus system by, in a preferred embodiment, introducing a local TEM data bus and an active buffer including a CPU controlled logic ... 03/30/06 - 20060069821 - Capture of data in a computer network The invention relates to packet tracing in computer networks. Data packets 26, 27, 28 are captured when entering or exiting the network 4 or at any point within the network protocol stack 5, 6, 7, 8, 9. Buffers 22, 23, 24, 25 in computer kernel space memory 21 store the ... 03/23/06 - 20060064520 - Method and apparatus for controlling peripheral adapter interrupt frequency by estimating processor load in the peripheral adapter A method and system for controlling interrupt frequency by estimating processor load in the peripheral adapter provides adaptive interrupt latency to improve performance in a processing system. A mathematical function of the depth of one or more queues of the adapter is compared to its historical value in order to ... 03/09/06 - 20060053237 - Low latency data packet reception and processing Devices in a process control system communicate by data messages over a communication medium segment. Each device includes a communication controller that includes a data queue and a queue of received message objects. The data queue stores a plurality of messages received on the communication medium. The received message objects ... 02/09/06 - 20060031607 - Systems and methods for managing input ring buffer Systems and methods for managing input ring buffer data transfers are described. In one aspect, a set of data packets from an output ring buffer (ORB) are sent to a codec. Information associated with the data packets is provided by a device driver. The data packets are stored in the ... 01/26/06 - 20060020721 - Configurable ping-pong buffers for usb buffer descriptor tables A digital device having selectable modes for USB communications buffer management in a USB interface of the digital device. These modes may comprise (1) no ping-pong buffer support, (2) ping-pong buffer support for some endpoints, e.g., support for OUT endpoint 0 only, and (3) ping-pong buffer support for all endpoints. ... 01/19/06 - 20060015660 - System and method for controlling buffer memory overflow and underflow conditions in storage controllers A method for maintaining flow control in a buffer memory coupled to a storage controller is provided. The storage controller includes, first and second counters that are used to monitor when data is read from a buffer memory and when data is transferred from the buffer memory to the host. ... 01/19/06 - 20060015659 - System and method for transferring data using storage controllers A method and a storage controller for transferring data between a host and a storage device is provided. The storage controller includes, a transport module having a first in first out (“FIFO”) for receiving frames from a link module, wherein the FIFO uses two pointers; the first pointer points to ... 01/05/06 - 20060004934 - Flexible and error resistant data buffering and connectivity One embodiment of the invention includes a method of buffering data between an upstream system sending data to a buffer and a downstream system obtaining data from the buffer. This method may include receiving a data record containing a status flag and a position identifier, reading the status flag and ... 12/29/05 - 20050289255 - Buffer controller and management method thereof The invention provides a new linked structure for a buffer controller and management method thereof The allocation and release actions of buffer memory can be more effectively processed when the buffer controller processes data packets. The linked structure enables the link node of the first buffer register to point to ... 12/29/05 - 20050289254 - Dynamic buffer allocation method A dynamic allocation method for DMA buffers. A DMA controller is directed to move data from an input/output (I/O) device to buffers linked in a buffer ring. Next, free buffers in the buffer ring are detected when the each buffer is full. At least one new buffer is then allocated ... 12/22/05 - 20050283547 - Streaming information appliance with buffer read and write synchronization An information appliance receives streaming information and includes a buffer, a writer module, a reader module and a synchronizer. The buffer has a plurality of storage locations, a logical head, a logical tail and a valid data area between the logical head and the logical tail. The logical head and ... 11/24/05 - 20050262277 - Data transfer device and method for transferring data acquired from memory A communication data processing device according to an aspect of the invention comprises a memory storing data, a data bus transmitting data read from the memory, a plurality of buffer memories temporarily storing data from the memory via the data bus and being capable of receiving and providing data independently ... 10/27/05 - 20050240690 - Circuit arrangement having a basic function and a monitoring function A circuit arrangement includes a first circuit group for performing a basic function and a second circuit group for performing a monitoring function. A message buffer provided for buffer-storing data to be output. The message buffer is divided into regions, each region being permanently associated with one of the circuit ... 10/27/05 - 20050240689 - Smart card with selectively allocatable data buffers and associated methods An integrated circuit for a smart card may include a plurality of data buffers and a processor. In particular, the processor may selectively allocate data buffers from the plurality thereof and exchange data therewith based upon different types of data. As such, the processor may advantageously change the allocation of ... 10/20/05 - 20050235075 - Method of and device for changing an output rate This invention relates to a method and system for changing an output rate of information for a buffer (3) with a constant first output rate (R1) which receives output data from a data source (2a), where the method step comprises; halting the reception of output data from the data source ... 10/06/05 - 20050223140 - Receive buffer in a data storage system A method according to one embodiment may include receiving data in a receive buffer, the receive buffer comprising a plurality of buffers, and sending a hold command to a transmitting node currently sending data to hold transmission of additional data when a level of the data in the receive buffer ... 10/06/05 - 20050223139 - Apparatus and method to maximize buffer utilization in an i/o controller An apparatus and method for maximizing buffer utilization in an I/O controller using credit management logic contained within the I/O controller. The credit management logic keeps track of the number of memory credits available in the I/O controller and communicates to a chipset connected to the I/O controller the amount ... 09/29/05 - 20050216617 - Obtaining queue measurement data for a range of logical control unit queues I/O measurement data for channels attached to logical control unit queues is obtained related to a plurality of logical control unit queues. A store secondary queue measurement data instruction specifies a range of queues for which extended secondary measurement blocks derived from the I/O measurement data are stored at a ... 09/29/05 - 20050216616 - Inbound packet placement in host memory Provided is a method, system, and article of manufacture for inbound packet placement in host memory. A first packet for a buffer in memory is received and a descriptor is generated indicating a length of the first packet and a buffer address of the buffer. At least one subsequent packet ... 09/15/05 - 20050204079 - Data rate adjustment device and system thereof A device and a wireless communication system for converting input signals of different data rates to output signals of the same date rate are provided. The device and the wireless communication system include a plurality of task elements with priority and according to the priority, the present invention can provide ... 09/08/05 - 20050198414 - Data processor and data communication method A data processor capable of preventing the occurrence of overrun, while efficiently performing DMA transfer. An SIO of a data processor starts the transmission of transmission data only when transmission data is stored in a transmission buffer and a reception buffer has no space available for data storage. ... 08/25/05 - 20050188130 - Pushback fifo The present invention provides a pushback FIFO architecture that enables a value that has been unloaded from the FIFO to be pushed back into the FIFO at the beginning of the data stream if a determination as made that the data value should not have been unloaded from the FIFO. ... 08/25/05 - 20050188129 - Facilitating inter-dsp data communications A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data ... 08/11/05 - 20050177660 - Method and system for merged rate-smoothing buffer with burst buffer In data processing applications, a method and system for a single data buffer and a data buffer controller for merging rate-smoothing and burst buffering functionalities to process incoming data streams in integrated circuits is provided. The data buffer controller may comprise a data processor and an output controller. The incoming ... 08/11/05 - 20050177659 - Spacecake coprocessor communication The invention is based on the idea to maintain two counters for an input or output port of a FIFO. A device for writing data elements from a coprocessor into a FIFO memory is provided. Said device is embedded in a multiprocessing environment comprising at least one coprocessor, a FIFO ... 08/11/05 - 20050177658 - Data organization in a smart card The solution refers to an optimization of the memory space further to a data update in a data processing device such as a smartcard (SIM). The data to be updated comes from a remote machine (SRV) communicating with the said card. This machine stores a number of data (Sn) and ... 08/04/05 - 20050172055 - Method for facilitating read completion in a computer system supporting write posting operations A method for facilitating read completion in a computer system supporting write posting operations. A posted memory write and its associated tag both need to be buffered, where the associated tag is designated to a master of a local bus originating the posted memory write. When a read request moving ... 08/04/05 - 20050172054 - Method, system, and program for buffering work requests Disclosed is a technique for buffering work requests. It is determined that a work request is about to be placed into an in-memory structure. When the in-memory structure is not capable of storing the work request, a work request ordering identifier for the work request is stored into an overflow ... 07/28/05 - 20050165984 - Data management A system and method for managing data using an expandable data management scheme is provided, wherein the method includes assigning an object symbol to a subject being examined, wherein the object symbol is responsive to the subject, identifying a characteristic of the subject, assigning a condition symbol to the subject ... 07/28/05 - 20050165983 - System and method for processing data in kernel area by a user command Disclosed is a data processing method of a kernel area according to a command of a user in a data processing system having a kernel mode used as an operation mode of the kernel area and a user mode used as an operation mode of an user area. The data ... 07/21/05 - 20050160206 - Method and system for calculating dynamic burst length A method and a system for calculating dynamic burst length are provided. A valid data calculating module determines if the number of valid data in the buffering memory unit exceeds a preset threshold for a main memory unit bus; if yes, a main memory unit bus requesting module determines whether ... 07/14/05 - 20050154806 - Controlling data delivery Delivering data from a data input to a data output within a system includes selecting a system performance parameter to be optimized, receiving at the data input a sequence of discrete data words, determining an optimum mode of delivery of the data words to the data output so as to ... 07/14/05 - 20050154805 - Systems and methods for employing speculative fills Multi-processor systems and methods are disclosed. One embodiment may comprise a multi-processor system with a processor having a processor pipeline that executes program instructions with data from speculative data fills that are provided in response to source requests. The multi-processor system may comprise a first cache that retains cache data ... 07/07/05 - 20050149651 - Port adapter for high-bandwidth bus A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a ... 06/30/05 - 20050144342 - Receiver symbol alignment for a serial point to point link A stream of bits are received in a first integrated circuit (IC) device, where the stream represents a sequence of symbols transmitted by a second IC device over a serial point to point link that couples the two devices. First and second M-bit sections of the stream are compared to ... 06/30/05 - 20050144341 - Buffer management via non-data symbol processing for a point to point link A number of symbols are received in a first integrated circuit (IC) device, where these symbols have been transmitted by a second IC device and are received over a serial point to point link. These symbols include a non-data sequence that has been inserted into a data sequence by the ... 06/23/05 - 20050138244 - Lower bound algorithm for operation scheduling A method and program are disclosed for scheduling operations in a digital processing system. The method includes monitoring one or more operations to be scheduled, sorting the operations based on their respective deadline processing cycles for scheduling, and storing the sorted operations in a queue. The operations are scheduled by ... 06/23/05 - 20050138243 - Managing flow control buffer A count of data segments is maintained. The count includes data segments in a queue and data segments in transit between a data source and the queue. A flow of data segments from the data source is controlled, based on a value of the count. ... 06/16/05 - 20050132106 - Flow control for digital signal processing to support data stream operations A method and apparatus are described for flow control for digital signal processing to support data stream operations. According to an embodiment of the invention, a method comprises setting a buffer number to an initial value; receiving a first data packet for processing during a first part of a first ... ### FreshPatents.com Support |