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Semiconductor Device Manufacturing: Process > Chemical Etching > Vapor Phase Etching (i.e., Dry Etching) Vapor Phase Etching (i.e., Dry Etching)Vapor Phase Etching (i.e., Dry Etching) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.04/19/07 - 20070087571 - Etching bias reduction A patterning device for implementing a pattern on a substrate includes a main pattern feature and a sacrificial pattern feature. Both the main pattern feature and the sacrificial pattern feature are transferable to an overlying layer on the substrate. The sacrificial pattern feature is positioned a distance from the main ... 04/12/07 - 20070082495 - Semiconductor device having nano-pillars and method therefor A semiconductor device includes a plurality of pillars formed from a conductive material. The pillars are formed by using a plurality of nanocrystals as a hardmask for patterning the conductive material. A thickness of the conductive material determines the height of the pillars. Likewise, a width of the pillar is ... 04/05/07 - 20070077766 - Method for fabricating image sensor The present invention relates to a method of fabricating an image sensor wherein it can enhance adhesive strength between an USG layer and a SiN layer. The method of fabricating the image sensor according to the present invention includes patterning a metal pad on a circuit region of a substrate; ... 03/22/07 - 20070066075 - Semiconductor manufacturing method According to an aspect of the embodiment, there is provided a semiconductor manufacturing method comprises: purging a growth chamber including a reaction product, a treatment chamber, and a glove box hermetically surrounding the growth chamber, with an inert gas atmosphere; transferring the reaction product from the growth chamber to the ... 03/22/07 - 20070066074 - Shallow trench isolation structures and a method for forming shallow trench isolation structures A shallow trench isolation structure having a negative taper angle and a method for forming same. A silicon nitride layer formed over a semiconductor substrate is etched according to a plasma etch process to form a first opening therein having sidewalls that present a negative taper angle. The substrate is ... 03/22/07 - 20070066073 - Like integrated circuit devices with different depth The invention forms integrated circuit devices of similar structure and dissimilar depth, such as interconnects and inductors, simultaneously. The invention deposits a conformal polymer over an area on a substrate with vias and an area without vias. Simultaneously, cavities are formed in the areas with and without vias. The depth ... 03/01/07 - 20070049039 - Method for fabricating a semiconductor device Method for fabricating a semiconductor device in which a by-product of etching is deposited on a photoresist film for using as a mask. The method for fabricating a semiconductor device includes the steps of depositing a polysilicon, and a bottom anti-refection coating on an entire surface of a substrate in ... 03/01/07 - 20070049038 - Dry etching process to form a conductive layer within an opening without use of a mask during the formation of a semiconductor device A method for use in fabrication of a semiconductor device comprises forming a conformal conductive layer over a planarized surface of a dielectric layer, and within an opening formed in the dielectric layer. The opening will typically have an aspect ratio of about 4:1 or greater. An etch is performed ... 02/08/07 - 20070032087 - Damage-free ashing process and system for post low-k etch A process is provided for substrate ashing following the etching of features in a low dielectric constant (low-k) layer. The low-k layer can include ultra-low-k material, or a porous low-k material. The process may be configured to remove etch byproducts while preserving feature critical dimension. The ashing process comprises the ... 02/08/07 - 20070032086 - Mehtod of manufacturing an electronic device A method of manufacturing an electronic device is provided wherein an interconnect is made using 193 nm lithography. No deformation of the desired linewidth takes place in that during a plasma gas is used which dissociates in low-weight ions. The electronic device is particularly an integrated circuit. ... 01/25/07 - 20070020940 - Method of forming fluorinated carbon film The present invention is made to solve a problem to improve adhesion between a fluorine-containing carbon film and a foundation film. In order to achieve this object, according to the present invention, a fluorine-containing carbon film forming method of forming a fluorine-containing carbon film on a to-be-processed substrate includes: a ... 01/18/07 - 20070015369 - Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device, includes forming a lower organic insulating film, inorganic insulating film and upper organic insulating film, making a first hole which has first and second parts passing through the upper organic insulating film and the inorganic insulating film, and performing dry etching on the ... 01/11/07 - 20070010099 - Method of pattern etching a silicon-containing hard mask Disclosed herein is a method of pattern etching a layer of a silicon-containing dielectric material. The method employs a plasma source gas including CF4 to CHF3, where the volumetric ratio of CF4 to CHF3 is within the range of about 2:3 to about 3:1; more typically, about 1:1 to about ... 12/28/06 - 20060292882 - Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided. The method includes: forming an inter-layer insulation layer on a substrate; forming a hard mask layer on the inter-layer insulation layer; etching the hard mask layer using a contact mask; and etching the inter-layer insulation layer using the hard mask layer ... 12/28/06 - 20060292881 - Method of encapsulating an assembly with a low temperature silicone rubber compound A method for encapsulating an assembly with a methyl phenyl silicone rubber compound is provided. In various embodiments, the method can include exposing the assembly to a solvent, plasma etching the assembly, and producing a potting mixture, wherein the potting mixture comprises a methyl phenyl room temperature vulcanization silicone and ... 12/14/06 - 20060281322 - Epitaxial semiconductor deposition methods and structures Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between ... 11/30/06 - 20060270239 - Reverse ald A semiconductor process and apparatus includes forming first and second gate electrodes (151, 161) by forming the first gate electrode (151) over a first high-k gate dielectric (121) and forming the second gate electrode (161) over at least a second high-k gate dielectric (122) different from the first gate dielectric ... 11/09/06 - 20060252270 - Lithographic apparatus and device manufacturing method utilizing a flat panel display handler A lithographic apparatus comprises an illumination system that conditions a radiation beam, a patterning device that modulates the radiation beam, a substrate table that supports a substrate, and a projection system that projects the modulated radiation beam onto a target portion of the substrate. The lithographic apparatus further comprises a ... 11/09/06 - 20060252269 - Silicon nitride etching methods Methods of etching silicon nitride material, and more particularly, etching nitride selective to silicon dioxide or silicide, are disclosed. The methods include exposing a substrate having silicon nitride thereon to a plasma including at least one fluorohydrocarbon and a non-carbon containing fluorine source such as sulfur hexafluoride (SF6). The plasma ... 11/02/06 - 20060246732 - Method of uniformly etching refractory metals, refractory metal alloys and refractory metal silicides This invention is directed to a process for etching a semiconductor device using an etchant composition to form a predetermined etched pattern therein. The semiconductor device typically has a plurality of layers. At least one of the layers comprises a refractory metal, refractory metal alloy or refractory metal silicide. The ... 11/02/06 - 20060246731 - Semiconductor device fabrication method The present invention provides a semiconductor device fabrication method comprising the steps of: forming a metal film on a semiconductor substrate; forming a hard mask on the metal film; placing the resultant substrate in a processing chamber; reducing a pressure in the processing chamber to a predetermined degree; and feeding ... 10/05/06 - 20060223326 - Fabrication method of semiconductor device A fabrication method of a semiconductor device includes steps of performing any one of O2 ashing, organic processing, and dry etching on a surface of a GaN-based semiconductor layer, etching the surface of the GaN-based semiconductor layer in a mixed solution of acid and an oxidizing agent, and forming an ... 09/28/06 - 20060216940 - Methods of producing structures for electron beam induced resonance using plating and/or etching We describe an ultra-small structure and a method of producing the same. The structures produce visible light of varying frequency, from a single metallic layer. In one example, a row of metallic posts are etched or plated on a substrate according to a particular geometry. When a charged particle beam ... 09/21/06 - 20060211251 - Removal of copper oxides from integrated interconnects An apparatus and a method for photoreducing copper oxide layers from semiconductor wafers during the processes of forming interconnects in advanced IC manufacturing. The apparatus comprises a reaction chamber with a high intensity UV light source and a wafer holder in the chamber. The UV light source is made of ... 08/03/06 - 20060172542 - Method and apparatus to confine plasma and to enhance flow conductance The embodiments of the present invention generally relate to a method and an apparatus to confine a plasma within a processing region in a plasma processing chamber. The apparatus may include an annular ring with a gap distance with the chamber wall at between about 0.8 inch to about 1.5 ... 07/27/06 - 20060166506 - Mask material for reactive ion etching, mask and dry etching method To provide a dry etching method and the like that can precisely process regions targeted for etching of objects to be processed using reactive ion etching that uses carbon monoxide gas, to which a nitrogen-containing compound gas is added, as a reactive gas. A material containing silicon and tantalum is ... 07/13/06 - 20060154486 - Low-pressure removal of photoresist and etch residue A method is provided for plasma ashing to remove photoresist remnants and etch residues formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving a hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to ... 07/06/06 - 20060148263 - Dry etching apparatus having particle removing device and method of fabricating phase shift mask using the same A dry etching apparatus may include a dry etching chamber and a door chamber. The apparatus may further include a load lock chamber configured to connect the dry etching chamber and the door chamber in a vacuum state. A gas injector and an ionizer may be configured inside the door ... 06/29/06 - 20060141796 - Method of manufacturing semiconductor device The method includes forming an isolation film on a silicon substrate to define an active region; forming an antireflective film on an entire surface of the substrate containing the isolation film; forming a photosensitive film pattern on the antireflective film while exposing a portion of the isolation film or the ... 06/29/06 - 20060141795 - Method for fabrication semiconductor device The object of this invention is to provide a method for fabricating a semiconductor device in which the yield and productivity are improved. In the method for fabricating a semiconductor device according to the invention, a plasma etching system is prepared which includes a vacuum chamber 1, a susceptor 7 ... 06/29/06 - 20060141794 - Plasma system and method for anisotropically etching structures into a substrate A method and a plasma system are provided for anisotropically etching structures into a substrate positioned in an etching chamber, e.g., structures defined using an etching mask in a silicon substrate, using a plasma. For this purpose, the etching chamber is supplied at least intermittently with an etching gas and ... 06/22/06 - 20060134919 - Processing system and method for treating a substrate A processing system and method for chemical oxide removal (COR), wherein the processing system comprises a first treatment chamber and a second treatment chamber, wherein the first and second treatment chambers are coupled to one another. The first treatment chamber comprises a chemical treatment chamber that provides a temperature controlled ... 06/15/06 - 20060128159 - Method of removing etch residues Organic etch residues are often left within vias formed by etching through resist masks. Since the etch is designed to expose an underlying metal layer and is directional in order to produce vertical via sidewalls, the residue often incorporates metal. The present invention discloses a method of removing such etch ... 06/15/06 - 20060128158 - Micro-structure manufacturing method A method of manufacturing a micro-structure includes dry-etching a sacrificial layer provided to a silicon substrate to form structures the sacrificial layer reacting with etching gas to generate reaction products including H2O, wherein the dry-etching includes etching the sacrificial layer and removing H2O as one of the reaction products generated ... 06/01/06 - 20060115989 - Method of manufacturing a thin-film circuit substrate having penetrating structure, and protecting adhesive tape A method of manufacturing a thin-film circuit substrate, containing: (a) gouging a surface of a circuit substrate in a depth at least approximately equal to a thickness of a final product of the substrate, to form a section to be formed a penetrating section; (b) providing a protecting adhesive tape ... 05/25/06 - 20060110925 - Dry etching method and diffractive optical element A dry etching method is provided, in which dry etching is performed in such a manner that a conductor to which an insulative substrate is attached is brought in electric, intimate contact with an electrode. In the dry etching method, the insulative substrate is attached to the conductor by means ... 05/18/06 - 20060105575 - Small volume process chamber with hot inner surfaces A system and method of processing a substrate including loading a substrate into a plasma chamber and setting a pressure of the plasma chamber to a pre-determined pressure set point. Several inner surfaces that define a plasma zone are heated to a processing temperature of greater than about 200 degrees ... 05/18/06 - 20060105574 - Process for defining integrated circuits in semiconductor electronic devices A process for the definition of integrated circuits on a wafer having at least one silicon semiconductor layer includes masking the wafer with a photoresist layer. The process includes a development step of the photoresist with definition of a lithographic pattern, a hardening step of the photoresist with a plasma ... 05/18/06 - 20060105573 - Method for selective plasma etch of an oxide layer The present invention provides, in one embodiment, a method of forming an opening in a dielectric layer 150. In this embodiment, the method comprises forming a dielectric layer 150 over a target layer 130 located over a microelectronic substrate 110 and subjecting the dielectric layer 150 to a plasma etch ... 05/18/06 - 20060105572 - Via reactive ion etching process Methods of etching a dielectric layer and a cap layer over a conductor level to open a via to the conductor. The methods include the provision of tetrafluoro methane (CF4) in a photoresist strip. In addition, the methods may provide an increased amount of tetrafluoro methane (CF4) in a dielectric ... 04/27/06 - 20060089003 - Method for removing polymer as etching residue A method for removing polymer as an etching residue is described. A substrate with polymer as an etching residue thereon is provided, and a hydrogen-containing plasma is used to treat the substrate. A wet clean step is then performed to remove the polymer from the substrate. The treatment using hydrogen-containing ... 04/13/06 - 20060079093 - Method for fabricating semiconductor device using tungsten as sacrificial hard mask The present invention relates to a method for fabricating a semiconductor device using tungsten as a sacrificial hard mask material. The method includes the steps of: forming a layer on an etch target layer; forming a photoresist pattern on the layer; etching the layer by using the photoresist pattern as ... 04/06/06 - 20060073705 - Method for dividing semiconductor wafer along streets A method for dividing a semiconductor wafer along a plurality of streets, the semiconductor wafer having a face on which a plurality of rectangular regions are defined by the streets arranged in a lattice pattern, and a semiconductor device is formed in each of the rectangular regions. This method comprises ... 04/06/06 - 20060073704 - Method of forming bump that may reduce possibility of losing contact pad material A method of forming a bump may involve providing a seed layer on a contact pad of a wafer. A shielding layer and a photosensitive mask layer may be formed on the seed layer. The photosensitive mask layer may be exposed and developed to form a mask pattern. An exposed ... 03/30/06 - 20060068592 - Method for etch-stop layer etching during damascene dielectric etching with low polymerization The present invention provides a method for etching a substrate 100. The method includes conducting a first etch through a dielectric layer 130 located over an etch-stop layer 140, the dielectric layer having a photoresist layer 170 located thereover and the first etch being selective to the etch-stop layer 140. ... 03/16/06 - 20060057853 - Thermal oxidation for improved silicide formation An embodiment of the invention is a method for improving the uniformity of silicide 190 in semiconductor wafers 10. The method may include etching source/drain sidewall spacers 150, performing an oxidation of semiconductor wafer 10, and then performing a wet clean of semiconductor wafer 10. ... 03/09/06 - 20060051966 - In-situ chamber clean process to remove by-product deposits from chemical vapor etch chamber A method and apparatus for cleaning a processing chamber comprising blocking a flow of cooling fluid to a channel within a support member within a processing chamber, elevating the support member to be within about 0.1 inches of a gas distribution plate, heating the gas distribution plate, and introducing a ... 03/09/06 - 20060051965 - Methods of etching photoresist on substrates Methods of etching a carbon-rich layer on organic photoresist overlying an inorganic layer can utilize a process gas including a fluorine-containing gas, an oxygen-containing gas, and a hydrocarbon gas, and one or more optional components to generate a plasma effective to etch the carbon-rich layer with low removal of the ... 03/09/06 - 20060051964 - Method and system for etching a film stack A method and system is described for preparing a film stack, and forming a feature in the film stack using a plurality of dry etching processes. The feature formed in the film stack can include a gate structure having a critical dimension of approximately 25 nm or less. This critical ... 03/02/06 - 20060046495 - Technique for enhancing the fill capabilities in an electrochemical deposition process by edge rounding of trenches During the formation of a metal line in a low-k dielectric material, an upper portion of a trench formed in a capping layer and the low-k dielectric material is treated to provide enlarged tapering or corner rounding, thereby significantly improving the fill capabilities of subsequent metal deposition processes. In one ... 03/02/06 - 20060046494 - Method for fabricating semiconductor device The present invention relates to a method for fabricating a semiconductor device with a fine pattern even without decreasing a line width of a photoresist pattern. The method includes the steps of: forming a target etching layer on a substrate; forming a plurality of etch mask patterns with high pattern ... 02/23/06 - 20060040502 - Method for manufacturing semiconductor device A wiring material film is formed by depositing a first conductive barrier film, an aluminum film, and a second conductive barrier film on a semiconductor substrate in this order. An organic material film, a silicon oxide film and a resist film are formed on the surface of the second barrier ... 02/23/06 - 20060040501 - Integrated dual damascene rie process with organic patterning layer A dual damascene conductor structure is formed on a substrate with an exposed conductor on top covered by a buried cap, a dielectric layer (DL) and an organic layer (OL). Form trench patterning hard mask and via hard mask layers over the OL. Form a trench pattern hole through the ... 02/16/06 - 20060035467 - Method for etching mesa isolation in antimony-based compound semiconductor structures Antimony-based semiconductor devices are formed over a substrate structure (10) that includes an antimony-based buffer layer (24) and an antimony-based buffer cap (26). Multiple epitaxial layers (30-42) formed over the substrate structure (10) are dry etched to form device mesas (12) and the buffer cap (26) provides a desirably smooth ... 02/02/06 - 20060024971 - Dry etching method using polymer mask selectively formed by co gas A dry etching method comprises placing a semiconductor substrate in a reactor, the semiconductor substrate comprising a photoresist pattern formed on an etching target layer, supplying carbon monoxide gas into the reactor to selectively deposit polymer on the photoresist pattern to form a polymer layer, and etching the etching target ... 02/02/06 - 20060024970 - Method for preparing a semiconductor substrate surface for semiconductor device fabrication A method for preparing a semiconductor substrate surface (28) for semiconductor device fabrication, includes providing a semiconductor substrate (20) having a pure Ge surface layer (28) or a Ge-containing surface layer (12), such as SiGe. The semiconductor substrate (20) is cleaned using a first oxygen plasma process (14) to remove ... 02/02/06 - 20060024969 - Method for purifying silicon carbide coated structures Processes for the purification of silicon carbide structures, including silicon carbide coated silicon carbide structures, are disclosed. The processes described can reduce the amount of iron contamination in a silicon carbide structure by 100 to 1000 times. After purification, the silicon carbide structures are suitable for use in high temperature ... 01/26/06 - 20060019498 - Barc/resist via etchback process A BARC or other sacrificial fill layer etch comprises a selective etch chemistry of Ar/O2/CO. The BARC etch may be used in a via-first dual damascene method. After via (116) pattern and etch, a BARC/sacrificial fill layer (120) is deposited to fill the via (116) and coat the IMD (110). ... 01/12/06 - 20060009039 - Etching method, etching apparatus, and method for manufacturing semiconductor device In order to reliably remove, by wet etching, a compound containing a metal and silicon, e.g., a silicate (101a) containing hafnium metal, the silicate (101a) is oxidized and then the oxidized silicate (101a) is wet-etched. ... 01/05/06 - 20060003590 - Process for producing a mask on a substrate To produce a mask, a first mask layer (40) is applied to the substrate (10). During or after the deposition of the first mask layer (40), the latter is exposed to an etching step. The etching step is carried out in such a manner that the material of the first ... 12/08/05 - 20050272265 - Dual damascene integration structure and method for forming improved dual damascene integration structure Methods for forming a dual damascene dielectric structure in a porous ultra-low-k (ULK) dielectric material by using gas-cluster ion-beam processing are disclosed. These methods minimize hard-mask layers during dual damascene ULK processing and eliminate hard-masks in the final ULK dual damascene structure. Methods for gas-cluster ion-beam etching, densification, pore sealing ... 12/01/05 - 20050266691 - Carbon-doped-si oxide etch using h2 additive in fluorocarbon etch chemistry Certain embodiments include an etching method including providing an etch material, applying a gas mixture including hydrogen, forming a plasma, and etching the etch material. The etch material can include a low-k dielectric material. The gas mixture can include a hydrogen gas, a hydrogen-free fluorocarbon, and a nitrogen gas, and ... 11/24/05 - 20050260857 - Method and resulting structure for pcmo film to obtain etching rate and mask to selectively by inductively coupled plasma A high selectivity and etch rate with innovative approach of inductively coupled plasma source. Preferably, the invention includes a method using plasma chemistry that is divided into main etch step of (e.g., Cl2+HBr+C4F8) gas combination and over etch step of (e.g., HBr+Ar). The main etch step provides a faster etch ... 11/10/05 - 20050250336 - Semiconductor device and method for fabricating the same A method of fabricating a semiconductor device includes forming a film stack having a Ti film and a metal film containing Ni sequentially deposited on a surface of a substrate of a GaN based semiconductor, SiC, or sapphire, patterning the film stack to expose a portion of the surface of ... 11/03/05 - 20050245088 - Method for barc over-etch time adjust with real-time process feedback A method for determining the anti-reflective coating (or bottom anti-reflective coating) over-etch time adjust with real-time process feedback is presented. The critical dimension CDresist of the patterned photoresist is measured and a first wafer with median values chosen (101) from a lot. A first time t* is found (102) and ... 11/03/05 - 20050245087 - Wiring over substrate, semiconductor device, and methods for manufacturing thereof A wiring over a substrate capable of reducing particles between wirings and a method for manufacturing the wiring is disclosed. A wiring over a substrate capable of preventing short-circuiting between wirings due to big difference in projection and depression between wirings and a method for manufacturing the wiring is also ... 10/20/05 - 20050233592 - Method of manufacturing semiconductor device using flexible tube In a method of manufacturing a semiconductor device, a flexible tube connects at least part of a path extending from a reaction chamber to a detoxification device through a vacuum pump. The flexible tube has a tube body made of hard material, the tube body having projected parts and depressed ... 10/20/05 - 20050233591 - Techniques promoting adhesion of porous low k film to underlying barrier layer Adhesion of a porous low K film to an underlying barrier layer is improved by forming an intermediate layer lower in carbon content, and richer in silicon oxide, than the overlying porous low K film. This adhesion layer can be formed utilizing one of a number of techniques, alone or ... 10/20/05 - 20050233590 - Waferless automatic cleaning after barrier removal A method for forming features in dielectric layers and opening barrier layers for a plurality of wafers and cleaning an etch chamber after processing and removing each wafer of the plurality of wafers is provided. A wafer of the plurality of wafers is placed into the etch chamber wherein the ... 10/13/05 - 20050227495 - Method for forming isolation layer in semiconductor device The present invention relates to a method for forming an insulating layer in a semiconductor device. After a first oxide film is formed in a trench, an impurity remaining on the first oxide film in the process of etching the first oxide film using a gas containing fluorine is stripped ... 10/13/05 - 20050227494 - Processing system and method for treating a substrate A method and system for trimming a feature on a substrate is described. During a chemical treatment of the substrate, the substrate is exposed to a gaseous chemistry, such as HF/NH3, under controlled conditions including surface temperature and gas pressure. An inert gas is also introduced, and the flow rate ... 10/06/05 - 20050221617 - Inductively coupled plasma chamber attachable to a processing chamber for analysis of process gases Disclosed herein are exemplary embodiments of an improved Inductively Coupled Plasma (ICP) chamber which is externally coupleable to a processing chamber to monitor processes gases therefrom. The disclosed ICP chamber design is beneficial because it allows for the porting of reference gases for the purpose of performing actinometry, and/or allows ... 09/29/05 - 20050215062 - Method of manufacturing semiconductor device A method of manufacturing a semiconductor device involves etching a film of a metal oxide formed above a semiconductor substrate, by using an etching gas. The etching gas includes a reducing gas which is capable of reducing the metal oxide and is non-reactive with the metal, and a reactive gas ... 08/25/05 - 20050186801 - Method of manufacture of semiconductor integrated circuit In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main ... 08/18/05 - 20050181616 - Dry etching process for compound semiconductors Accordingly, this invention relates to an dry etching process for semiconductor wafers. More particularly, the present invention discloses a dry etching process including a halogen etchant (24) and a nitrogen gas (28) that selectively etches a compound semiconductor material (18) faster than the front-side metal layers (16A)(16B). Further, the dry ... 08/11/05 - 20050176258 - Pressure control method and processing device First and second pressure sensors 132 and 134 that perform pressure detection over different pressure detection ranges from each other detect the pressure within a process chamber 102 of an etching device 100. A pressure controller 144 selects optimal pressure data in correspondence to the pressure inside the process chamber ... 08/04/05 - 20050170657 - Method of forming nanostructure Provided is a method of forming a nanostructure using surface plasmon resonance (SPR). The method includes forming a photo-resist layer on a substrate, forming nanostructure materials on the photo-resist layer, photo-sensitizing the photo-resist layer by irradiating light to the substrate on which nanostructure materials are formed, developing the photosensed photo-resist ... 07/28/05 - 20050164512 - Method of manufacturing semiconductor device Disclosed is a method of manufacturing a semiconductor device. The method comprises the steps of: preparing a silicon substrate having a predetermined lower structure including a gate and a bonding area; forming an interlayer dielectric film on the top side of the substrate; forming a photosensitive film pattern, which exposes ... 07/28/05 - 20050164511 - Method and system for etching a high-k dielectric material A method for etching a high-k dielectric layer on a substrate in a plasma processing system is described. The high-k dielectric layer can, for example, comprise HfO2. The method comprises elevating the temperature of the substrate above 2000°C. (i.e., typically of order 400° C.), introducing a process gas comprising a ... 07/14/05 - 20050153563 - Selective etch of films with high dielectric constant A method for selectively etching a high dielectric constant layer over a silicon substrate is provided. The silicon substrate is placed into an etch chamber. An etchant gas is provided into the etch chamber, where the etchant gas comprises BCl3, an inert diluent, and Cl2, where the flow ratio of ... 07/07/05 - 20050148194 - Structure and manufacturing method for nitride-based light-emitting diodes A method for manufacturing GaN-based light-emitting diode (LED) is provides with the following steps of: providing a substrate; forming a GaN semiconductor epitaxy layer on the substrate, the GaN semiconductor epitaxy layer further including an n-type GaN contact layer, a light-emitting layer and a p-type GaN contact layer; forming a ... 07/07/05 - 20050148193 - Photolithographic method for forming a structure in a semiconductor substrate To form a pattern in a semiconductor substrate, a buffer layer, which is formed as a carbon layer, is produced between a photoresist layer and an antireflective layer, which is formed on the substrate. The pattern is produced in the photoresist layer by means of a lithography step, and then ... 06/30/05 - 20050142885 - Method of etching and etching apparatus A thin film formed on a substrate is etched, without generating a plasma, with an etching gas containing a β-diketone and a gas containing water and/or alcohol, thereby exposing a surface of the substrate. ... 06/30/05 - 20050142884 - Storage nodes of a semiconductor memory A semiconductor memory device is provided, including a substrate and storage nodes formed on the substrate from a silicon oxide layer, the layer having been substantially removed by wet etching the silicon oxide layer to a predetermined depth of the storage nodes and dry etching the remaining portion of the ... 06/23/05 - 20050136679 - Hydrogen free integration of high-k gate dielectrics The present invention pertains to forming a transistor in the absence of hydrogen, or in the presence of a significantly reduced amount of hydrogen. In this manner, a high-k material can be utilized to form a gate dielectric layer in the transistor and facilitate device scaling while mitigating defects that ... 06/23/05 - 20050136678 - Wet cleaning method to eliminate copper corrosion A method for cleaning semiconductor substrates includes a DI water clean operation that uses a spin speed no greater than 350 rpm. The cleaning method may include additional cleaning operations such as an organic clean, an aqueous chemical clean or a DI water/ozone clean. The cleaning method may be used ... 06/23/05 - 20050136677 - Method for making a semiconductor device that includes a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a dummy dielectric layer that is at least about 10 angstroms thick on a substrate, and forming a sacrificial layer on the dummy dielectric layer. After removing the sacrificial layer and the dummy dielectric layer to generate ... 06/16/05 - 20050130434 - Method of surface pretreatment before selective epitaxial growth A method of surface pretreatment before selective epitaxial growth is provided. A semiconductor substrate having metal-oxide-semiconductor devices formed thereon is provided, and a lightly dry etching process with a carbon-free plasma source is performed to remove a portion of the semiconductor substrate. Then, a selective epitaxial growth process is performed ... ### FreshPatents.com Support |