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Semiconductor Device Manufacturing: Process > Coating With Electrically Or Thermally Conductive Material > To Form Ohmic Contact To Semiconductive Material > Including Heat Treatment Of Conductive Layer Including Heat Treatment Of Conductive LayerIncluding Heat Treatment Of Conductive Layer patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/29/07 - 20070072417 - Method for forming wiring structure, wiring structure, method for forming semiconductor device, and display device A method for forming a wiring structure includes forming a metal layer on a substrate, and annealing the metal layer by irradiating the metal layer with light emitted from at least one flash tube, thereby growing crystalline grains of the metal layer. ... 11/02/06 - 20060246721 - Technique for forming interconnect structures with reduced electro and stress migration and/or resistivity By improving the purity of metal lines and the crystalline structure, the overall performance of metal lines, especially of highly scaled copper-based semiconductor devices, may be enhanced. The modification of the crystalline structure of the metal lines may be performed by a heat treatment generating locally restricted heating zones, which ... 10/05/06 - 20060223311 - Technique for forming interconnect structures with reduced electro and stress migration and/or resistivity By improving the purity of metal lines and the crystalline structure, the overall performance of metal lines, especially of highly scaled copper-based semiconductor devices may be enhanced. The modification of the crystalline structure of the metal lines may be performed by a heat treatment generating locally restricted heating zones, which ... 09/14/06 - 20060205210 - Production process of ceramic electronic component At least one conductive layer is formed by applying paste mainly containing metal on at least one insulating sheet. At least one sintered body is provided by firing the at least one insulating sheet having the at least one conductive layer formed thereon. The amount of the metal contained in ... 07/20/06 - 20060160358 - Method of fabricating semiconductor device including removing impurities from silicon nitride layer A method of fabricating a semiconductor device having a silicon nitride layer substantially free of impurities includes forming a silicon nitride layer on a semiconductor substrate and annealing the semiconductor substrate having the silicon nitride layer in an atmosphere of ammonia (NH3) gas to remove impurities from the silicon nitride ... 07/13/06 - 20060154479 - Baking apparatus used in photolithography process, and method for controlling critical dimension of photoresist patterns using the same A baking apparatus used in a photolithography process of a semiconductor device, and a method for controlling critical dimension of a photoresist pattern using the same. The baking apparatus comprises: a processing chamber; a chuck disposed in the processing chamber on which a semiconductor wafer can be loaded; and a ... 07/06/06 - 20060148249 - Method of eliminating boron contamination in annealed wafer A method by which a silicon wafer is prevented from increasing boron concentration near the surface and difference in the boron concentration does not arise between the surface of the annealed wafer and the silicon bulk to eliminate boron contamination in the silicon wafer caused by an annealing treatment is ... 06/15/06 - 20060128147 - Method of fabricating electrically conducting vias in a silicon wafer One or more electrically conducting vias are formed through a silicon substrate having a first surface, an opposite second surface, and a thickness between the first and second surfaces. A conductive metallic material is deposited on the first surface of the silicon substrate. For example, the metallic material may be ... 06/08/06 - 20060121731 - Semiconductor manufacturing system and method for manufacturing a semiconductor device A semiconductor manufacturing system, includes: a reaction tube housing a target object; a plurality of material gas introduction pipes, connected to an upstream side of the reaction tube, introducing a first material gas containing a compound of silicon, and a second material gas containing at least one of nitrogen gas ... 05/11/06 - 20060099806 - Method of forming electrode for compound semiconductor device Provided is a method of forming an electrode for a compound semiconductor device. The method includes forming a first electrode layer on a p-type compound semiconductor layer, and performing plasma treatment on the first electrode layer in an oxygen (O2)-containing atmosphere. ... 05/11/06 - 20060099805 - Heat treating system and heat treating method A thermal processing unit of the present invention includes: a holder that holds a plurality of substrates; a reaction container into which the holder is conveyed; a process-gas supplying mechanism that supplies a process gas into the reaction container; and a heating mechanism that heats the reaction container to conduct ... 03/09/06 - 20060051960 - Method to form relaxed sige layer with high ge content using co-implantation of silicon with boron or helium and hydrogen A method of forming a relaxed SiGe layer having a high germanium content in a semiconductor device includes preparing a silicon substrate; depositing a strained SiGe layer; implanting ions into the strained SiGe layer, wherein the ions include silicon ions and ions selected from the group of ions consisting of ... 03/02/06 - 20060046474 - Forming method of stacking structure and manufacturing method of electron source and image display apparatus using such method A method of forming a stacking structure by forming an electroconductive layer precursor pattern by an electroconductive paste made of a resin component, electroconductive fine particles, and glass fine particles, forming a dielectric layer precursor pattern by a dielectric paste made of a resin component and glass fine particles, and ... 02/02/06 - 20060024962 - Partial plate anneal plate process for deposition of conductive fill material A method of fabricating a semiconductor device is provided. An interlayer dielectric layer is formed on one or more semiconductor layers (402). One or more feature regions are formed in the interlayer dielectric layer (404). A first conductive layer is formed in at least a portion of the feature regions ... 12/08/05 - 20050272258 - Method of manufacturing a semiconductor device and semiconductor device According to one aspect of the present invention, provided is a method of manufacturing a semiconductor device, including: forming a first metal film on a substrate having a recessed portion in a surface thereof, by a plating method so as to bury the first metal film in at least part ... 12/01/05 - 20050266685 - Method and apparatus for controlling a semiconductor fabrication temperature In a method for controlling temperatures in a semiconductor manufacturing apparatus including a reaction chamber and a plurality of heating sources, a set of power ratios to be fed to the heating sources is determined for each of two or more selected temperatures. Then, a temperature of the reaction chamber ... 09/01/05 - 20050191853 - Method of manufacturing semiconductor device A semiconductor substrate is inserted into a heat treatment apparatus at a low temperature ranging from room temperature to about 50° C., and organic substances included in a metal on the semiconductor substrate are released without carbonization in an annealing process before CMP. Further, organic substances capable of preventing the ... 08/25/05 - 20050186789 - Photo-assisted method for semiconductor fabrication The present invention provides a processing system comprising a remote plasma activation region for formation of active gas species, a transparent transfer tube coupled between the remote activation region and a semiconductor processing chamber, and a source of photo-energy for maintaining activation of the active species or providing photo-energy for ... 08/25/05 - 20050186788 - System for improving thermal stability of copper damascene structure Disclosed is a system for fabricating a semiconductor device (100). An interconnect structure (110) is formed on the semiconductor device (100) and a cap (112) is deposited over the interconnect structure (110). The interconnect structure (110) is annealed with the overlying cap (112) in place. The cap (112) is then ... ### FreshPatents.com Support - Terms & Conditions |