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Semiconductor Device Manufacturing: Process > Coating With Electrically Or Thermally Conductive Material > To Form Ohmic Contact To Semiconductive Material > Plural Layered Electrode Or Conductor Plural Layered Electrode Or ConductorPlural Layered Electrode Or Conductor patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/29/07 - 20070072415 - Method for integrating a ruthenium layer with bulk copper in copper metallization A method for integrating a Ru layer with bulk Cu in semiconductor manufacturing. The method includes depositing a Ru layer onto a substrate in a chemical vapor deposition process, modifying the deposited Ru layer by oxidation, or nitridation, or a combination thereof, depositing an ultra thin Cu layer onto the ... 03/22/07 - 20070066054 - Method of forming contact layers on substrates A method is provided for manufacturing removable contact structures on the surface of a substrate to conduct electricity from a contact member to the surface during electroprocessing. The method comprises forming a conductive layer on the surface. A predetermined region of the conductive layer is selectively coated by a contact ... 10/05/06 - 20060223310 - Method for forming a barrier/seed layer for copper metallization A method for improving adhesion of Cu to a Ru layer in Cu metallization. The method includes providing a substrate in a process chamber of a deposition system, depositing a Ru layer on the substrate in a chemical vapor deposition process, and forming a Cu seed layer on the Ru ... 10/05/06 - 20060223309 - Dual-damascene process for manufacturing semiconductor devices The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to a dual-damascene process for the manufacturing of semiconductor devices. A method of forming a dual-damascene structure includes forming a via hole and filling the via hole at least partially with a first plug material. A ... 08/31/06 - 20060194431 - Technique for metal deposition by electroless plating using an activation scheme including a substrate heating process In an enhanced technique for electroless metal deposition, the substrate is heated to or above the operating temperature for the specific plating solution, while the plating solution may be maintained at a non-critical low temperature to substantially prevent spontaneous self-decomposition within the plating tool. Hence, significant advantages with respect to ... 08/24/06 - 20060189129 - Method for applying metal features onto barrier layers using ion permeable barriers The methods described are directed to processes for producing structures containing metallized features for use in microelectronic workpieces. The processes treat a barrier layer to promote the adhesion between the barrier layer and the metallized feature. Suitable means for promoting adhesion between barrier layers and metallized features include an acid ... 05/25/06 - 20060110916 - Forming an intermediate layer in interconnect joints and structures formed thereby Methods of forming a microelectronic structure are described. Those methods comprise forming a first adhesion layer on a conductive layer, forming an intermediate layer on the first adhesion layer, and forming a barrier layer on the intermediate layer, wherein the intermediate layer comprises a coefficient of thermal expansion that is ... 05/11/06 - 20060099804 - Post-polish treatment for inhibiting copper corrosion Methods (102) are presented for protecting copper structures (26) from corrosion in the fabrication of semiconductor devices (2), wherein a thin semiconductor or copper-semiconductor alloy corrosion protection layer (30) is formed on an exposed surface (26a) of a copper structure (26) prior to performance of metrology operations (206), so as ... 05/04/06 - 20060094236 - Electroless plating of metal caps for chalcogenide-based memory devices A method of forming a metal cap over a conductive interconnect in a chalcogenide-based memory device is provided and includes, forming a layer of a first conductive material over a substrate, depositing an insulating layer over the first conductive material and the substrate, forming an opening in the insulating layer ... 04/20/06 - 20060084264 - Method for applying metal features onto metallized layers using electrochemical deposition and alloy treatment The present invention is directed to a process for producing structures containing metallized features for use in microelectronic workpieces. The process treats a barrier layer to promote the adhesion between the barrier layer and the metallized feature. Suitable means for promoting adhesion between barrier layers and metallized features according to ... 04/20/06 - 20060084263 - Method of forming metal layer used in the fabrication of semiconductor device A method of forming a metal layer on the conductive region of a semiconductor device includes concurrently supplying a mixture gas including a hydrogen gas and a metal chloride compound gas, and a purge gas into a chamber having a sealed space for a predetermined time, thereby forming a first ... 04/13/06 - 20060079085 - Method for applying metal features onto metallized layers using electrochemical deposition The present invention is directed to a process for producing structures containing metallized features for use in microelectronic workpieces. The process treats a barrier layer to promote the adhesion between the barrier layer and the metallized feature. Suitable means for promoting adhesion between barrier layers and metallized features according to ... 04/13/06 - 20060079084 - Method for applying metal features onto metallized layers using electrochemical deposition and electrolytic treatment The present invention is directed to a process for producing structures containing metallized features for use in microelectronic workpieces. The process treats a barrier layer to promote the adhesion between the barrier layer and the metallized feature. Suitable means for promoting adhesion between barrier layers and metallized features according to ... 04/13/06 - 20060079083 - Method for applying metal features onto metallized layers using electrochemical deposition using acid treatment The present invention is directed to a process for producing structures containing metallized features for use in microelectronic workpieces. The process treats a barrier layer to promote the adhesion between the barrier layer and the metallized feature. Suitable means for promoting adhesion between barrier layers and metallized features according to ... 02/23/06 - 20060040493 - Iridium etching for feram applications A method of etching an iridium layer for use in a ferroelectric device includes preparing a substrate; depositing a barrier layer on the substrate; depositing an iridium layer on the barrier layer; depositing a hard mask layer on the iridium layer; depositing, patterning and developing a photoresist layer on the ... 02/02/06 - 20060024961 - Interlevel dielectric layer and metal layer sealing Methods for sealing an organic ILD layer and a metal layer after an etching step. The method includes etching through an ILD layer and leaving a remaining portion of an underlying metal layer cap, maintaining the device in an inert gas, and depositing at least a portion of a liner ... 01/26/06 - 20060019492 - Method for preventing a metal corrosion in a semiconductor device The present invention relates to a method for preventing a metal corrosion in a semiconductor device. The present method includes the steps of etching of a metal layer in a chamber, the metal layer having a photoresist pattern thereon or thereover; oxidizing a surface of the metal layer using a ... 01/05/06 - 20060003580 - Under bump metallurgy process on passivation opening A method including electrodepositing a metal layer on a contact pad of a circuit, wherein the metal layer protrudes from the contact pad and has a width dimension greater than a width dimension of the pad. A method including forming a first layer on a contact pad in a contact ... 12/29/05 - 20050287800 - Multilayer interconnection structure and method for forming the same A multilayer interconnection structure of the present invention includes first interconnection, second interconnection belonging to an interconnection layer different from an interconnection layer to which the first layer belongs, and third interconnection for connecting the first and second interconnections, the third interconnection belonging to a different interconnection layer and including ... 10/13/05 - 20050227483 - Planar metal electroprocessing The present invention relates to a process for forming a near-planar or planar layer of a conducting material, such as copper, on a surface of a workpiece using an ECMPR technique. The process preferably uses at least two separate plating solution chemistries to form a near-planar or planar copper layer ... 09/15/05 - 20050202672 - Method for manufacturing tungsten/polysilicon word line structure in vertical dram and device manufactured thereby An integrated circuit comprised of at least one semiconductor memory array and logic circuits. The memory array includes electrically conductive word lines. The logic circuits include logic transistors with electrically conductive gates. The gates of the logic transistors and the word lines are composed of polysilicon and a metal layer. ... 08/04/05 - 20050170645 - Metal plating using seed film A seed film and methods incorporating the seed film in semiconductor applications is provided. The seed film includes one or more noble metal layers, where each layer of the one or more noble metal layers is no greater than a monolayer. The seed film also includes either one or more ... 07/21/05 - 20050158992 - Cladded conductor for use in a magnetoelectronics device and method for fabricating the same A method for fabricating a cladded conductor (42) for use in a magnetoelectronics device is provided. The method includes providing a substrate (10) and forming a conductive barrier layer (12) overlying the substrate (10). A dielectric layer (16) is formed overlying the conductive barrier layer (12) and a conducting line ... 07/21/05 - 20050158991 - Metal plating using seed film A seed film and methods incorporating the seed film in semiconductor applications is provided. The seed film includes one or more noble metal layers, where each layer of the one or more noble metal layers is no greater than a monolayer. The seed film also includes either one or more ... ### FreshPatents.com Support |