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Semiconductor Device Manufacturing: Process > Coating With Electrically Or Thermally Conductive Material > To Form Ohmic Contact To Semiconductive Material > Forming Solder Contact Or Bonding Pad > Bump Electrode > Plural Conductive Layers Plural Conductive LayersPlural Conductive Layers patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/29/07 - 20070072405 - Semiconductor device and method for manufacturing the same There is provided a semiconductor device in which the junction strength of land portions and external terminals is increased, the disconnection of the external terminal is surely prevented, and the connection reliability is ensured over an extended period of time. An insulating resin layer which insulates metal wires from one ... 02/15/07 - 20070037378 - Method for forming metal pad in semiconductor device A method for manufacturing a metal pad connected to a metal line in a semiconductor device is provided. The method includes forming an interlevel dielectric (ILD) layer on a substrate; forming at least one metal line on the ILD layer; forming a metal barrier on the ILD layer and the ... 01/25/07 - 20070020913 - Method of forming solder bump with reduced surface defects A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a ... 12/28/06 - 20060292849 - Ultrathin semiconductor circuit having contact bumps and corresponding production method The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor ... 12/07/06 - 20060276024 - Process for forming an electronic device including workpieces and a conductive member therebetween A process for forming an electronic device can include providing a first workpiece including an electronic component that includes an electrode and an organic layer, and providing a second workpiece that includes a conductor. The process can also include reflowing a conductive member between the electrode and conductor. In one ... 11/16/06 - 20060258141 - Ball film for integrated circuit fabrication and testing According to one embodiment of the invention, a method of fabricating ball grid array packages includes providing a substrate, providing a ball film that includes a plurality of metal balls movably contained within respective slots of a thin film, coupling the metal balls to the substrate, and removing the thin ... 11/16/06 - 20060258140 - Integrated circuit with additional mini-pads connected by an under-bump metallization and method for production thereof A semiconductor device includes a semiconductor chip. External connection pads and further pads are disposed over a surface of the semiconductor chip. Selected ones of the further pads are electrically connected to one another so as to activate selected functions within the semiconductor chip. ... 11/09/06 - 20060252249 - Solder ball pad surface finish structure of circuit board and fabrication method thereof A solder ball pad surface finish structure of a circuit board and a method for fabricating the same are proposed. An insulative protecting layer with a plurality of openings is formed on a circuit board to expose solder ball pads on the circuit board. A conductive layer is formed on ... 10/19/06 - 20060234491 - Bumping process and bump structure A bumping process comprises forming a passivation layer having a planarized surface covering a pad on a substrate, forming a hole penetrating through the passivation layer to expose a contact surface of the pad, and forming a bump on the contact surface and planarized surface. The planarized surface will provide ... 08/31/06 - 20060194424 - Microfeature devices and methods for manufacturing microfeature devices Microfeature devices, microfeature workpieces, and methods for manufacturing microfeature devices and microfeature workpieces are disclosed herein. The microfeature workpieces have an integrated circuit, a surface, and a plurality of interconnect elements projecting from the surface and arranged in arrays on the surface. In one embodiment, a method includes forming a ... 08/24/06 - 20060189118 - Microfeature devices and methods for manufacturing microfeature devices Microfeature devices, microfeature workpieces, and methods for manufacturing microfeature devices and microfeature workpieces are disclosed herein. The microfeature workpieces have an integrated circuit, a surface, and a plurality of interconnect elements projecting from the surface and arranged in arrays on the surface. In one embodiment, a method includes forming a ... 07/06/06 - 20060148233 - Copper-containing c4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device. ... 06/22/06 - 20060134903 - Connection ball positioning method and device for integrated circuits Forming conductive bumps on an integrated circuit wafer by sucking in conductive balls into cavities of a mask, placing the mask supporting the balls on the integrated circuit wafer, temporarily attaching the mask and the wafer together, cutting the suction, and submitting the mask and wafer assembly to a thermal ... 04/27/06 - 20060088992 - Bumping process and structure thereof A bumping process is provided as following: at first, providing a wafer, then forming a first photo-resist layer on a active surface of the wafer and forming at least a first opening on the first photo-resist layer; and forming a first copper pillar in the first opening; then forming a ... 03/09/06 - 20060051954 - Bump structure of semiconductor package and method for fabricating the same A bump structure of a semiconductor package and a method for fabricating the same are provided. The bump structure is used to connect a semiconductor element to a carrier of the semiconductor package. The fabrication method primarily employs an electroplating process to form the bump structure including an under bump ... 01/26/06 - 20060019481 - Gold bump structure and fabricating method thereof A flip-chip gold bump structure and a method of fabricating thereof are disclosed. The structure includes a nickel layer formed on a gold bump formed on a chip, and a copper layer formed on the nickel layer for forming a Ni/Cu barrier layer. Because of the formation of the Ni/Cu ... 01/19/06 - 20060014371 - Method for forming an integrated semiconductor circuit arrangement Methods for forming an integrated semiconductor circuit arrangement are disclosed. In one embodiment, a semiconductor circuit with a first semiconductor circuit region and with a second semiconductor circuit region is formed in each case in a semiconductor material region. A first metallization layer is applied to the structure thus obtained. ... 01/12/06 - 20060009023 - Methods of forming electronic structures including conductive shunt layers and related structures Methods of forming an electronic structure may include forming a seed layer on an electronic substrate, and forming a conductive shunt layer on portions of the seed layer wherein portions of the seed layer are free of the conductive shunt layer. A conductive barrier layer may be formed on the ... 12/15/05 - 20050277279 - Microfeature devices and methods for manufacturing microfeature devices Microfeature devices, microfeature workpieces, and methods for manufacturing microfeature devices and microfeature workpieces are disclosed herein. The microfeature workpieces have an integrated circuit, a surface, and a plurality of interconnect elements projecting from the surface and arranged in arrays on the surface. In one embodiment, a method includes forming a ... 12/08/05 - 20050272244 - Method for manufacturing circuit element, method for manufacturing electronic element, circuit substrate, electronic device, and electro-optical apparatus The present invention aims to provide a mounting technology that prevents unnecessary consumption of materials. A method for manufacturing a circuit element includes the steps of: setting a semiconductor element on a stage so that a metal pad of the semiconductor element faces a head; changing positions of the head ... 12/01/05 - 20050266671 - Manufacturing method of semiconductor device A manufacturing method of a semiconductor device comprises: (a) setting up a paste including a resin on an electrical connection part which is electrically connected to a semiconductor substrate; (b) setting up a soldering material above the electrical connection part so as to be in contact with the paste; and ... 11/10/05 - 20050250305 - Carbon nanotube (cnt) multiplexers, circuits, and actuators Carbon nanotube (CNT) based devices include an actuator/switch that includes one or more fixed CNTs and a moveable CNT that can be urged toward or into contact with a selected fixed CNT with a magnetic field produced by a current in a control conductor. The control conductor can be formed ... 10/27/05 - 20050239277 - Interconnect and a method of manufacture therefor The present invention provides an interconnect for use in an integrated circuit, a method for manufacturing the interconnect, and a method for manufacturing an integrated circuit including the interconnect. The interconnect (100), among other elements, includes a surface conductive lead (160) located in an opening formed within a protective overcoat ... 10/20/05 - 20050233571 - Flip chip package, semiconductor package with bumps and method for manufacturing semiconductor package with bumps A semiconductor chip with bumps formed therein comprises an active surface, a plurality of bonding pads, a passivation layer, a plurality of first UBMs (under bump metallurgy), a second UBM, a plurality of first bumps, and a plurality of second bumps. The bonding pads are disposed on the active surface ... 09/29/05 - 20050215045 - Methods of forming bumps using barrier layers as etch masks and related structures Forming an electronic structure may include forming a seed layer on a substrate, and forming a mask on the seed layer. The mask may include an aperture therein exposing a portion of the seed layer, and a barrier layer may be formed on the exposed portion of the seed layer. ... 09/29/05 - 20050215044 - Method for forming photoresist layer on subsrtate and bumping process using the same A method for forming a photoresist layer on a substrate to improve the joining of the photoresist layer and the substrate is provided. For a bumping process using the method, a liquid is used to react with the photoresist layer to form a combination layer of good fluidity between the ... 09/22/05 - 20050208751 - Solder bump structure and method for forming a solder bump A solder bump structure includes a contact pad, an intermediate layer located over the contact pad, a solder bump located over the intermediate layer, and at least one metal projection extending upwardly from a surface of the intermediate layer and embedded within the solder bump. Any crack in the solder ... 09/22/05 - 20050208750 - Method of making cascaded die mountings with springs-loaded contact-bond options A cascaded die mounting device and method using spring contacts for die attachment, with or without metallic bonds between the contacts and the dies, is disclosed. One embodiment is for the direct refrigerant cooling of an inverter/converter carrying higher power levels than most of the low power circuits previously taught, ... 08/25/05 - 20050186772 - Process for producing metallic interconnects and contact surfaces on electronic components A process produces metallic interconnects and contact surfaces on electronic components using a copper-nickel-gold layer structure. The copper core of the interconnects and contact surfaces is deposited by electroplating by means of a first resist mask made from positive resist. The copper core of the interconnects and contact surfaces is ... 08/25/05 - 20050186771 - Manufacturing method for semiconductor device and semiconductor device A manufacturing method for a semiconductor device, including the steps of: forming a passivation film that covers a surface of a semiconductor substrate on which electrodes have been formed, in which an opening is formed so as to expose a predetermined electrode from among the electrodes; forming a diffusion prevention ... 08/11/05 - 20050176235 - Manufacturing method of semiconductor device A manufacturing method of a semiconductor device of this invention includes forming metal pads on a Si substrate through a first oxide film, bonding the Si substrate and a holding substrate which bolsters the Si substrate through a bonding film, forming an opening by etching the Si substrate followed by ... 07/21/05 - 20050158980 - Method of forming segmented ball limiting metallurgy The present invention discloses a novel layout and process for a device with segmented BLM for the I/Os. In a first embodiment, each BLM is split into two segments. The segments are close to each other and connected to the same overlying bump. In a second embodiment, each BLM is ... 07/21/05 - 20050158979 - Method of manufacturing semiconductor device A method of manufacturing a semiconductor device is disclosed in which a metallic deposit is stably formed on the anode side with small variation in film thickness, and plating is prevented on the cathode side without carrying out any additional processing on the cathode side. The processed anode side causes ... ### FreshPatents.com Support |