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Semiconductor Device Manufacturing: Process > Coating With Electrically Or Thermally Conductive Material > To Form Ohmic Contact To Semiconductive Material > Forming Solder Contact Or Bonding Pad > Bump Electrode Bump ElectrodeBump Electrode patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.04/19/07 - 20070087549 - Method of manufacturing a wire grid polarizer A dielectric layer 2 is formed on a region including grid-shaped convex portions 1a of a resin substrate 1 having the grid-shaped convex portions 1a with pitches of 80 nm to 120 nm on its surface, and metal wires 3 are formed on the dielectric layer 2. It is thereby ... 04/19/07 - 20070087548 - Method for forming bumps A method for forming bumps is disclosed. First, a substrate having a surface and an under bump metallurgy layer formed thereon is provided, and a portion of the under bump metallurgy layer is removed thereafter. Next, a mask having a metal layer thereon is disposed over the surface of substrate, ... 04/19/07 - 20070087547 - Wafer structure with electroless plating metal connecting layer and method for fabricating the same A wafer structure with an electroless plating metal connecting layer and a method for fabricating the same are proposed. A wafer has an active surface and an inactive surface opposite to the active surface. The active surface has a plurality of electrical connecting pads formed thereon. An insulating protective layer ... 04/19/07 - 20070087546 - Etchant and method for forming bumps A method for forming bumps is disclosed. First, a substrate having an adhesive, a barrier, and a wetting layer thereon is provided. Next, a patterned photoresist is formed on the wetting layer, in which the patterned photoresist includes at least one opening for exposing a portion of the wetting layer. ... 04/05/07 - 20070077746 - Method of manufacturing a semiconductor device including a bump forming process A method of manufacturing a semiconductor device includes an improved bump forming process. The bump forming process includes a bump forming step for forming a bump on the pad by feeding a gold wire from a capillary while moving the capillary; a sliding step of slightly moving the capillary in ... 03/22/07 - 20070066046 - Method of electrically connecting a microelectronic component A method of electrically connecting a microelectronic component having a first surface bearing a plurality of contacts. The method including the steps of forming a subassembly by juxtaposing a connection component having a support structure and a plurality of elongated posts extending substantially parallel to one another from a first ... 03/22/07 - 20070066045 - Method for manufacturing substrate with cavity A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a barrier around a predetermined area where the cavity is to be formed on a copper foil laminated master, an internal circuit formed in the copper foil laminated master; (b) coating a thermosetting material ... 03/15/07 - 20070059917 - Printed circuit board having fine pattern and manufacturing method thereof A manufacturing method for a printed circuit board having a fine pattern is disclosed, comprising: providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space ... 03/08/07 - 20070054484 - Method for fabricating semiconductor packages A method for positioning a semiconductor component is disclosed. The method includes providing the semiconductor component and a carrier, the carrier having a plurality of openings, a protruded portion being provided at each corner position of each of the openings and extended toward a center of the opening, a distance ... 03/01/07 - 20070049002 - Semiconductor device and method of packaging the same Embodiments of the invention provide a semiconductor-chip mounting body, a semiconductor device including the mounting body, and a method of packaging the semiconductor device. According to some embodiments, when a semiconductor chip is mounted on the mounting body as a flip-chip type, an encapsulation process using an encapsulation resin is ... 03/01/07 - 20070049001 - Bumping process and structure thereof A bumping process and a structure thereof are provided. The bumping process includes the following steps. Firstly, a wafer having a number of pads is provided. Next, a UBM layer is formed on the pad. Then, a conductive first photo-resist layer is coated on the wafer to cover the UBM ... 03/01/07 - 20070049000 - Method for re-forming bga of a semiconductor package A method for re-forming BGA of a semiconductor package includes the steps of, providing a semiconductor package element formed with balls grid array, at least one of diameter of the ball is larger than the others ; providing a jig formed with penetrated holes corresponding to the each of balls ... 02/22/07 - 20070042594 - Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device includes providing a base plate; mounting a plurality of semiconductor chips each having a plurality of connection pads formed on an upper surface thereof to the base plate, the plural semiconductor chips being mounted apart from each other; forming an insulating film on ... 02/22/07 - 20070042593 - Bonding pad structure and method of forming the same A bonding pad structure and fabrication method thereof. A bonding pad is substantially surrounded and insulated by a dielectric layer, wherein the bonding pad is formed of at least one first conductive layer having a wiring layer with a stripe layout and a first edge portion, a second conductive layer ... 02/15/07 - 20070037377 - Tin-silver solder bumping in electronics manufacture A process for forming a solder bump on an under bump metal structure in the manufacture of a microelectronic device comprising exposing the under bump metal structure to an electrolytic bath comprising a source of Sn2+ ions, a source of Ag+ ions, a thiourea compound and/or a quaternary ammonium surfactant; ... 02/08/07 - 20070032066 - Semiconductor device and method of fabricating the same A semiconductor wafer is thinned to a predetermined thickness by grinding the backside thereof (which is opposite to the side where a plurality of devices are formed and metal posts are further formed), and then a metal layer made of metal having a linear thermal expansion coefficient close to that ... 02/08/07 - 20070032065 - Alpha-particle-tolerant semiconductor die systems, devices, components and methods for optimizing clock rates and minimizing die size Systems and methods are disclosed herein for determining the placement of storage and non-storage cells or components, representing a semiconductor component in a design stage, on an integrated circuit die. In one embodiment, regions of a semiconductor die are analyzed with respect to the susceptibility of a region to be ... 02/01/07 - 20070026661 - Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device includes: (a) preparing a semiconductor chip having a plurality of electrodes; (b) preparing a substrate having a plurality of electrical connection portions; (c) holding the semiconductor chip by a holding tool; (d) planarizing an upper surface of the electrode of the semiconductor chip ... 01/25/07 - 20070020912 - Semiconductor element and a producing method for the same, and a semiconductor device and a producing method for the same A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an ... 01/04/07 - 20070004190 - Multi-step etch for metal bump formation The present invention uses a two step plasma etch process to create a via contact with an integral bump. After the via and bump have been plated, the semiconductor substrate is planarized to remove the excess metal, using the semiconductor substrate as a planar stop. The bulk silicon substrate surrounding ... 12/21/06 - 20060286791 - Semiconductor wafer package and manufacturing method thereof A manufacturing method of a semiconductor wafer package mainly comprises the following steps. Firstly, a semiconductor wafer having a plurality of bonding pads and a passivation layer exposing the bonding pads is provided. Next, under bump metallurgy layers are formed on each of the bonding pads respectively. Then, a mask ... 11/23/06 - 20060264023 - Die-wafer package and method of fabricating same A die-wafer package includes a singulated semiconductor die having a first plurality of bond pads on a first surface and a second plurality of bond pads on a second opposing surface thereof. Each of the first and second pluralities of bond pads includes an under-bump metallization (UBM) layer. The singulated ... 11/23/06 - 20060264022 - Semiconductor device Semiconductor component 2 of WPP structure is mounted on the main surface of the interposer substrate which forms a semiconductor device via a plurality of bump electrodes. Semiconductor component 3 of CSP structure is mounted on the main surface of an interposer substrate via a plurality of bump electrodes with ... 11/09/06 - 20060252248 - Method for fabricating electrically connecting structure of circuit board A method for fabricating an electrically connecting structure of a circuit board is proposed. An insulating protecting layer is formed on a circuit board having electrically connecting pads and has openings to expose the electrically connecting pads. A resist layer with openings corresponding to the electrically connecting pads is formed ... 11/02/06 - 20060246706 - Conductive bump structure for semiconductor device and fabrication method thereof A conductive bump structure for a semiconductor device and a method for fabricating the same are provided. A metal bump is formed on an under bump metallurgy (UBM) structure electrically connected to and formed on a connection pad of the semiconductor device, wherein the metal bump is sized smaller than ... 10/26/06 - 20060240658 - Gap control between interposer and substrate in electronic assemblies Electronic assemblies and methods for forming assemblies are described. One embodiment includes a method of forming an electronic assembly, including forming a plurality of first solder bumps on one of a substrate and an interposer. The substrate and interposer are positioned so that the first solder bumps are located between ... 10/19/06 - 20060234490 - Increased stand-off height integrated circuit assemblies, systems, and methods Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for assembling a semiconductor device by aligning a die with a substrate and interposing solder between corresponding substrate and die bond pads. A lifting force is applied to the ... 10/12/06 - 20060228878 - Semiconductor package repair method A lower-melting-point solder having a lower melting point than solder balls is used to bond the solder balls with a module substrate. The lower-melting-point solder has a melting point lower than the solder balls. A bonding temperature is at a temperature between the melting point of the lower-melting-point solder and ... 10/05/06 - 20060223299 - Fabricating process of an electrically conductive structure on a circuit board The fabricating process of an electrically conductive structure on a circuit board includes: providing a circuit board with a plurality of electrically connecting pads formed thereon; forming a first insulating layer on the circuit board, the first insulating layer covering the electrically connecting pads; forming a conductive layer on the ... 09/21/06 - 20060211233 - Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure According to an exemplary embodiment, a method for fabricating a wafer level package includes forming a polymer layer on a device wafer, where the device wafer includes at least one device wafer contact pad and a device, and where the at least one device wafer contact pad is electrically connected ... 09/21/06 - 20060211232 - Method for manufacturing gold bumps A method for manufacturing gold bumps includes providing a substrate including a patterned protective layer, which exposes at least a bonding pad, on a surface, covering a photo resist on the surface of the substrate, performing a photolithography process to pattern the photo resist for exposing a portion of the ... 09/14/06 - 20060205200 - Low capacitance solder bump interface structure A method for controlling capacitance associated with solder sphere bumps is provided. An improved structure is proposed which uses a much smaller pad on an IC with standard chip dielectric and passivation layers. An additional thick dielectric layer is then applied to the structure and a small via is opened ... 08/17/06 - 20060183313 - Semiconductor package and method for manufacturing the same A semiconductor package comprises a semiconductor chip, a lid, a plurality of traces, a compliant layer, a plurality of conductive pastes, and a plurality of solder pads. The semiconductor chip has an active surface, a backside, and a plurality of bonding pads disposed on the active surface. The lid covers ... 08/17/06 - 20060183312 - Method of forming chip-type low-k dielectric layer A substrate including a plurality of contact pads is provided. Thereafter, a photosensitive dielectric layer is formed on a surface of the substrate. Subsequently, an exposure-and-development process is preformed to partially remove the photosensitive dielectric layer so as to form a plurality of openings. The openings at least expose the ... 07/20/06 - 20060160348 - Semiconductor element with under bump metallurgy structure and fabrication method thereof A semiconductor element with under bump metallurgy (UBM) structures and a fabrication method thereof are proposed. When UBM structures are formed on signal pads and ground pads on a surface of the semiconductor element that is completely fabricated with a circuit layout, a metallic layer for defining the UBM structures ... 07/13/06 - 20060154468 - Manufacturing method of semiconductor device, semiconductor device, circuit board, electro-optic device, and electronic apparatus A method for manufacturing a semiconductor device with a bump electrode wherein the bump electrode includes a resin material as a core and at least a top surface covered with a conductive film. The method includes placing the resin material on a substrate on which an electrode terminal is formed ... 07/06/06 - 20060148232 - Method for fabricating module of semiconductor chip A method for fabricating a module of a semiconductor chip is provided. The method includes the steps of: forming a bump on a substrate provided with a pad; forming a protection layer over the bump; performing a grinding process on a rear surface of the substrate to reduce a thickness ... 06/22/06 - 20060134902 - Method for constructing contact formations According to one aspect of the invention, a method for forming contact formations is provided. A substrate may be placed in an electrolytic solution. The substrate may have an exposed conductive portion and the electrolytic solution may include a plurality of metallic ions and an accelerator. The accelerator may include ... 06/15/06 - 20060128136 - Systems and methods for solder bonding Systems and methods for solder bonding that employ an equilibrium solidification process in which the solder is solidified by dissolving and alloying metals that raise the melting point temperature of the solder. Two or more structure surfaces may be solder bonded, for example, by employing heating to melt the solder ... 06/15/06 - 20060128135 - Solder bump composition for flip chip It is an object of the present invention to provide a method for solder bump formation using a combination of eutectic and high lead solders. The present invention provides a method for improving a solder bump composition for a flip chip. ... 06/08/06 - 20060121719 - Method of manufacturing a circuit substrate and method of manufacturing an electronic parts packaging structure A method of manufacturing a circuit substrate of the present invention, includes the steps of forming an n-layered (n is an integer of 1 or more) wiring layer connected electrically to a metal plate on the metal plate, forming an electroplating layer on a connection pad portion of an uppermost ... 06/01/06 - 20060115975 - Method for attaching an integrated circuit package to a circuit board A method for attaching an IC package to a circuit board, the IC package having a plurality of electrical contacts in an arrangement having a perimeter, first positions the IC package adjacent to the circuit board. Then, electrically connects the IC package to the circuit board through the plurality of ... 05/18/06 - 20060105560 - Method for forming solder bumps of increased height A method for forming solder bumps (or solder balls after reflow) of improved height and reliability is provided. In one embodiment, a semiconductor substrate having at least one contact pad and an upper passivation layer having at least one opening formed therein exposing a portion of the contact pad is ... 05/04/06 - 20060094226 - Bumping process A bumping process is provided as following: at first, providing a wafer, then forming a first photo-resist layer on a active surface of the wafer and forming at least a first opening on the first photo-resist layer; and forming a copper pillar in the first opening; then forming a second ... 05/04/06 - 20060094225 - Methods for forming solder bumps on circuit boards This invention relates to a method for forming solder bumps on a circuit board, which is formed with a solder resist and pads thereon and the pads are exposed from the solder resist. The steps of the method mainly are: Firstly, strengthen the solder resist by ultraviolet rays and then ... 04/20/06 - 20060084259 - Manufacturing method of passivation layer on wafer and manufacturing method of bumps on wafer A manufacturing method of wafer passivation layer and manufacturing method of wafer bump. First, a wafer is provided with an active surface, which has a passivation layer and reveals a plurality of bonding pads on said passivation. Next, a redistribution layer is formed on the wafer and is electrically connected ... 04/06/06 - 20060073693 - Redistribution layer of wafer and the fabricating method thereof A wafer comprises a wafer, a conductor, a first passivation layer, a second passivation layer, a redistribution layer, and a third passivation layer. The conductor is disposed on the wafer. The first passivation layer covers the wafer, and exposes the surface of the conductor. The second passivation layer having an ... 03/23/06 - 20060063366 - Circuit-connecting material and circuit terminal connected structure and connecting method A circuit-connecting material which is interposed between circuit electrodes facing each other and electrically connects the electrodes in the pressing direction by pressing the facing electrodes against each other; the circuit-connecting material comprising as essential components (1) a curing agent capable of generating free radicals upon heating, (2) a hydroxyl-group-containing ... 03/09/06 - 20060051953 - Module assembly and method for stacked bga packages Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the substantial matching of impedance for the circuits connected ... 03/09/06 - 20060051952 - Method for fabricating conductive bump of circuit board A method for fabricating conductive bumps of a circuit board is proposed. First of all, a circuit board having a first surface and a corresponding second surface is provided. A circuit structure having a plurality of conductive pads is formed on each of the first surface and the second surface, ... 02/16/06 - 20060035453 - Method of forming a solder ball on a board and the board In the method, a conductive pad of the board is etched to a depth that is greater than 50% and less than 100% of a thickness of the conductive pad. Subsequently, a solder ball may be formed on the etched conductive pad. For example, the conductive pad may be copper. ... 02/09/06 - 20060030140 - Method of making bondable leads using positive photoresist and structures made therefrom A microelectronic component having a plurality of leads are formed at their tip end with bondable material using a process including a mask of positive photoresist material. The leads can be rendered peelable from the substrate by, for example, plasma undercutting the leads. The tip ends of the leads can ... 01/19/06 - 20060014370 - Methods for processing integrated circuit packages formed using electroplating and apparatus made therefrom An integrated circuit package is processed by electroplating the integrated circuit package. The electroplating is performed without forming plating traces on a conductive surface of a pad side of the integrated circuit package. Pad areas of the integrated circuit package are thus plated with one or more materials. An integrated ... 01/12/06 - 20060009022 - Method for forming robust solder interconnect structures by reducing effects of seed layer underetching A method for forming an interconnect structure for a semiconductor device includes defining a via in a passivation layer so as expose a top metal layer in the semiconductor device. A seed layer is formed over the passivation layer, sidewalls of the via, and the top metal layer. A barrier ... 01/05/06 - 20060003569 - Semiconductor devices with permanent polymer stencil and method for manufacturing the same Methods of manufacturing semiconductor devices using permanent or temporary polymer layers having apertures to expose contact pads and cover the active surfaces of the semiconductor devices. ... 12/29/05 - 20050287785 - Method of stacking wafers with anisotropic conductive adhesive The present invention includes a method that provides a first wafer; forms a first raised contact from a first plug on the first wafer; provides a second wafer; forms a second raised contact from a second plug on the second wafer; applies an anisotropic conductive adhesive over the first wafer; ... 12/22/05 - 20050282374 - Method of forming a thin wafer stack for a wafer level package A method of forming a stack of thin wafers provides a wafer level stack to greatly reduce process time compared to a method where individually separated chips are stacked after a wafer is sawed. A rigid planar wafer support member stabilizes and planarizes each wafer while it is thin or ... 12/08/05 - 20050272243 - Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes: (a) forming an insulating layer having a contact hole on a semiconductor section in which an element is formed; (b) forming an electrode pad on the insulating layer so that a depression or a protrusion remains at a position at which the ... 12/08/05 - 20050272242 - Formation method for conductive bump A method for forming conductive bumps is applied to a wafer. An under-bump-metallurgy structure and a first photo resist layer are subsequently formed on the wafer. The first photo resist layer, such as a dry film, is patterned to have some openings and then a second photo resist layer is ... 12/01/05 - 20050266670 - Chip bonding process A bonding process includes the following process. A bump is formed on a first electric device. A patterned insulation layer is formed on a second electric device, wherein the patterned insulation layer has a thickness between 5 μm and 400 μm, and an opening is in the patterned insulation layer ... 11/17/05 - 20050255685 - Void free solder arrangement for screen printing semiconductor wafers A process for the production of a void-free semiconductor wafer for the electronics industry, comprising the steps of: applying a coating of a solder paste to a semiconductor wafer through a photoresist film; heating and applying a vacuum to the wafer in a reflow furnace with a controlled formic acid ... 11/10/05 - 20050250304 - Method for fabricating connection regions of an integrated circuit, and integrated circuit having connection regions A method for fabricating an integrated circuit connection region includes application of a dielectric to an integrated circuit with a connection region, application of a corrodible metalization layer to the dielectric, application of a protection device to the metalization layer, and removal of the protection device in a region around ... 11/03/05 - 20050245061 - Semiconductor device and manufacturing method thereof The present invention is a semiconductor device having the semiconductor element obtained by cutting a semiconductor wafer with the electrode pad formed on one side along a scribe line, a semiconductor element protective layer on the semiconductor element which has a opening on the pad, a stress cushioning layer on ... 10/20/05 - 20050233570 - Method and apparatus for improved power routing An apparatus comprising: a die having a top metal layer, the top metal layer comprised of at least a first metal line and a second metal line; a passivation layer covering the top metal layer; a C4 bump on the passivation layer; and a first passivation opening and a second ... 10/20/05 - 20050233569 - Bump structure for a semiconductor device and method of manufacture A semiconductor device employing the bump structure includes a plurality of bump structures arrayed along a substrate in a first direction. Each bump structure has a width in the first direction greater than a pitch gap between successively arrayed bump structures, and at least one bump structure has a sidewall ... 10/13/05 - 20050227475 - Method of conductive particles dispersing A method for dispersing conductive particles is provided, which takes advantages of simplified process and lower cost. The present invention is in applying of chemical bonding between metal and thiol with electric charge, thereby makes conductive particles and chip bumps carry charges. The conductive particles are then migrated and fixed ... 10/06/05 - 20050221598 - Wafer support and release in wafer processing Methods and apparatuses for wafer support and release using sacrificial materials in wafer processing. In one embodiment, a solution of a sacrificial polymer is spray-coated on the wafer bump side to form a thin layer of the sacrificial polymer after solvent vaporization. An adhesive layer is then used to attach ... 09/22/05 - 20050208749 - Methods for forming electrical connections and resulting devices Methods for forming electrical connections between two components, as well as various embodiments of devices created according to the disclosed methods, are described. The method includes forming a depression in a land disposed on a first component, wherein the depression is shaped to receive a conductive bump extending from a ... 09/22/05 - 20050208748 - Method for forming robust solder interconnect structures by reducing effects of seed layer underetching A method for forming an interconnect structure for a semiconductor device includes defining a via in a passivation layer so as expose a top metal layer in the semiconductor device. A seed layer is formed over the passivation layer, sidewalls of the via, and the top metal layer. A barrier ... 09/08/05 - 20050196949 - Solder ball excellent in micro-adhesion preventing properties and wetting properties and method for preventing the micro-adhesion of solder balls The present invention provides a solder ball that has solved the problem of micro-adhesion and, moreover, has solved both of the problems of micro-adhesion and wetting properties, and a method for preventing the micro-adhesion of solder balls. That is, the present invention provides a solder ball obtained by solidification and ... 09/01/05 - 20050191838 - Apparatus and method for forming bump A preheat device (160) is provided to execute, before forming bumps (16) to electrode parts (15), a pre-formation temperature control for bonding promotion to promote bonding between the electrode parts and the bumps during bump formation. Metal particles of the electrode parts can be changed to an appropriate state before ... 09/01/05 - 20050191837 - Process for producing layer structures for signal distribution Structures for signal distribution are produced by applying a metallic seed layer over a semiconductor body. An insulating layer is applied over the metallic seed layer and openings in the insulating layer are produced by photolithographic patterning of the insulating layer. Each opening in the insulating layer is trapezoidal in ... 08/25/05 - 20050186770 - Methods of fabricating interconnects for semiconductor components In one aspect, the invention encompasses a method of fabricating an interconnect for a semiconductor component. A semiconductor substrate is provided, and an opening is formed which extends entirely through the substrate. A first material is deposited along sidewalls of the opening at a temperature of less than or equal ... 08/11/05 - 20050176234 - Bumping process of light emitting diode A bumping process for a light emitting diode (LED) chip is provided. Firstly, a LED chip with a plurality of electrodes is provided, then a pattern plate having a plurality of openings is disposed on the LED chip, and the electrodes are correspondingly exposed by the openings. Then, a plurality ... 08/11/05 - 20050176233 - Wafer-level chip scale package and method for fabricating and using the same A packaged semiconductor device (a wafer-level chip scale package) containing no UBM between a chip pad and an RDL pattern is described. As well, the device contains only a single non-polymeric insulation layer between the RDL pattern and the solder bump. The single non-polymeric insulation layer does not need high ... 08/04/05 - 20050170630 - Methods for reducing flip chip stress Novel methods for reducing shear stress applied to solder bumps on a flip chip. The methods are particularly applicable to reducing temperature-induced shear stress on solder bumps located adjacent to an empty space on a flip chip during high-temperature testing of the chip. According to a first embodiment, the method ... 07/07/05 - 20050148165 - Conductive pattern producing method and its applications An improved method of forming an electrode pattern on a substrate is described. The substarate is coated with a first conductive film and subjected to baking. On the first conductive film is then overlied a second conductive film which mends possible fissures of the first conductive film which, besides, would ... 06/30/05 - 20050142837 - Method for preparing arylphosphonite antioxidant A method for forming an underfill layer on a bumped wafer is disclosed. A film is provided wherein the film includes a base layer, a removable layer and the underfill layer. The film is disposed on a bump wafer and then pressing the film under heating is performed to have ... 06/30/05 - 20050142836 - Method of forming bump pad of flip chip and structure thereof Disclosed is a method of forming a bump pad of a flip chip and a structure thereof, characterized in that a resist pattern is formed through coating of a photosensitive material on an electroless copper plating layer, exposure to light and development, and then a bump pad is prepared by ... 06/09/05 - 20050124147 - Land grid array packaged device and method of forming same A method of packaging an integrated circuit die (12) includes the steps of forming an array of soft conductive balls (14) in a fixture (30) and flattening opposing sides of the balls. The flattened balls are then transferred from the fixture to a mold masking tape (36). A first side ... ### FreshPatents.com Support |