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Semiconductor Device Manufacturing: Process > Formation Of Electrically Isolated Lateral Semiconductive Structure > Recessed Oxide By Localized Oxidation (i.e., Locos)

Recessed Oxide By Localized Oxidation (i.e., Locos)

Recessed Oxide By Localized Oxidation (i.e., Locos) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

12/07/06 - 20060276002 - Integration of buried oxide layers with crystalline layers
A method of forming a buried oxide/crystalline III-V semiconductor dielectric stack is presented. The method includes providing a substrate and forming a layered structure on the substrate comprising of layers of different materials, one of the different materials is selected to be an oxidizable material to form one or more ...

11/30/06 - 20060270186 - Semiconductor device having plural bird's beaks of different sizes and manufacturing method thereof
First bird's beaks are respectively formed in first thermal oxide films at the bottom surface ends and the upper surface ends of a floating gate. In addition, second bird's beaks are formed in second thermal oxide films at the bottom surface ends of a control gate. The dimension of the ...

08/31/06 - 20060194411 - Method to fabricate completely isolated silicon regions
The construction of Shallow Trench Isolation, STI, regions is integrated in to a SIMOX fabrication process for a Silicon On Insulator, SOI, wafer. Prior to the beginning of the SOI process, a preferred nitrogen (N2) implant is applied to the silicon wafer in areas designated as active regions. The nitrogen ...

07/27/06 - 20060166460 - Use of selective oxidation to form asymmetrical oxide features during the manufacture of a semiconductor device
A sidewall oxidation process for use during the formation of a transistor such as a flash memory cell allows for improved control of a gate oxide profile. The method comprises doping transistor source and drain regions to different doping levels, then performing a transistor sidewall oxidation using a particular process ...

07/06/06 - 20060148207 - Method of dual bird's beak locos isolation
A method of dual bird's beak LOCOS may reduce a design rule for a more cost-effective logic device formation. The method may also form a LOCOS layer having a smooth bird's beak to fabricate a stable high-voltage device. The method includes steps of defining a low-voltage device area for a ...

06/08/06 - 20060121688 - Transistor mobility by adjusting stress in shallow trench isolation
A method of improving transistor carrier mobility by adjusting stress through recessing shallow trench isolation is presented. A trench is formed in a substrate. The trench is filled with a dielectric. A CMOS transistor is formed adjacent to the trench. A silicide layer is formed on the source/drain region. A ...

05/18/06 - 20060105540 - Method for manufacturing semiconductor element
A method for manufacturing a semiconductor element comprised of an SOI structure including an SOI layer comprises the steps of preparing the SOI layer having a transistor forming area and an element isolation area on a surface thereof, forming an oxidation-resistant mask layer on the surface of the SOI layer, ...

05/04/06 - 20060094205 - Method of forming isolation trench with spacer formation
A strained silicon semiconductor arrangement with a shallow trench isolation (STI) structure has a strained silicon (Si) layer formed on a silicon germanium (SiGe) layer. A trench extends through the Si layer into the SiGe layer, and sidewall spacers are employed that cover the entirety of the sidewalls within the ...

12/22/05 - 20050282354 - Semiconductor device manufacturing method
A semiconductor device manufacturing method is disclosed. The method is to form a second semiconductor layer which has less susceptibility to adopting insulative characteristics than a first semiconductor layer on the first semiconductor layer. Then, grooves which expose portions of the second and first semiconductor layers are formed to extend ...

09/22/05 - 20050208733 - Oxygen plasma treatment for a nitride surface to reduce photo footing
The present invention includes a method for preventing distortion in semiconductor fabrication. The method comprises providing a substrate comprising a film comprising silicon nitride. The substrate is treated in a vacuum of about 3.0-6.5 Torr in an atmosphere comprising oxygen plasma wherein the oxygen plasma flow rate is at least ...

06/30/05 - 20050142811 - Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device is disclosed. In a disclosed method, a high voltage device and a low voltage device are formed at the same time, before a thermal oxidization process for thickly forming a gate oxide film of a high voltage region, and a bonding structure on ...



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