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Semiconductor Device Manufacturing: Process > Formation Of Electrically Isolated Lateral Semiconductive Structure > Grooved And Refilled With Deposited Dielectric Material > And Deposition Of Polysilicon Or Noninsulative Material Into Groove And Deposition Of Polysilicon Or Noninsulative Material Into GrooveAnd Deposition Of Polysilicon Or Noninsulative Material Into Groove patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/22/07 - 20070066031 - Method of manufacturing semiconductor stucture A method of manufacturing a semiconductor structure for a substrate having electronic elements formed thereon is described. The method includes steps of forming a dielectric layer over the substrate and forming a trench in the dielectric layer. It should be noticed that a border shape of the trench is a ... 02/08/07 - 20070032038 - Method for forming recesses A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the protrusions, tilt implanting the mask ... 01/18/07 - 20070015340 - Method and structure for interfacing electronic devices Method and structure for optimizing and controlling diffusional creep at metal contact interfaces are disclosed. Embodiments of the invention accommodate height variations in adjacent contacts, decrease planarization uniformity requirements, and facilitate contact bonding at lower temperatures and pressures by employing shapes and materials that respond predictably to compressive interfacing loads. ... 10/26/06 - 20060240638 - Method for the elimination of the effects of defects on wafers A method eliminates effects of defects on wafers caused by cavities adjacent to the surface of a semiconductor (e.g., silicon) wafer. A first insulating layer is applied to the surface of the semiconductor wafer and into the cavities adjacent to the surface. The applied first insulating layer is covered with ... 10/19/06 - 20060234471 - Method for manufacturing semiconductor device A semiconductor device having an improved connecting reliability of an interconnect is presented via a simple and easy process, and further, a semiconductor device having a stable threshold voltage of a transistor that provide a stable electrical characteristic is also presented. A method for manufacturing a semiconductor device according to ... 02/23/06 - 20060040465 - Methods of forming conductive lines and methods of forming conductive contacts adjacent conductive lines This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced ... 06/30/05 - 20050142810 - Structure and method for iii-nitride device isolation Isolation of III-nitride devices may be performed with a dopant selective etch that provides a smooth profile with little crystal damage in comparison to previously used isolation techniques. The dopant selective etch may be an electro-chemical or photo-electro-chemical etch. The desired isolation area may be identified by changing the conductivity ... 06/30/05 - 20050142809 - Method for forming gate in semiconductor device Disclosed is a method for forming a gate in a semiconductor device. The method includes the steps of: sequentially forming a gate insulation layer and an inter- layer insulation layer on a substrate; patterning the inter- layer insulation layer into a predetermined configuration, thereby forming a patterned inter-layer insulation layer; ... ### FreshPatents.com Support - Terms & Conditions |