|
FREE patent keyword monitoring and additional FREE benefits. |
|
|
Semiconductor Device Manufacturing: Process > Formation Of Electrically Isolated Lateral Semiconductive Structure > Having Air-gap Dielectric (e.g., Groove, Etc.) Having Air-gap Dielectric (e.g., Groove, Etc.)Having Air-gap Dielectric (e.g., Groove, Etc.) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.11/02/06 - 20060246681 - Sacrificial benzocyclobutene/norbornene polymers for making air gap semiconductor devices A method of forming an air gap within a semiconductor structure by the steps of: (a) using a sacrificial polymer to occupy a space in a semiconductor structure; and (b) heating the semiconductor structure to decompose the sacrificial polymer leaving an air gap within the semiconductor structure, wherein the sacrificial ... 08/10/06 - 20060177990 - Methods for selective integration of airgaps and devices made by such methods A method for the production of airgaps in a semiconductor device and device produced therefrom. The formation of airgaps is accomplished, in part, by chemically and/or mechanically changing the properties of a first dielectric layer locally, such that at least part of said first dielectric layer is converted locally and ... 04/27/06 - 20060088975 - Method for fabricating semiconductor device and semiconductor device A method for fabricating a semiconductor device includes the steps of: forming a plurality of lower interconnections at intervals in a first insulating film; removing a portion of the first insulating film located between the lower interconnections, thereby forming an interconnection-to-interconnection gap; forming a second insulating film over the first ... 02/09/06 - 20060030117 - Methods for cleaning a semiconductor substrate having a recess channel region A method for cleaning a semiconductor substrate forming device isolation layers in a predetermined region of a semiconductor substrate to define active regions; etching predetermined areas of the active regions to form a recess channel region and such that sidewalls of the device isolation layers are exposed; and selectively etching ... 06/02/05 - 20050118783 - Methods of fabricating semiconductor-on-insulator (soi) substrates and semiconductor devices using sacrificial layers and void spaces, and soi substrates and devices fabricated thereby An SOI substrate is fabricated by providing a substrate having a sacrificial layer thereon, an active semiconductor layer on the sacrificial layer remote from the substrate and a supporting layer that extends along at least two sides of the active semiconductor layer and the sacrificial layer and onto the substrate, ... ### FreshPatents.com Support |