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Semiconductor Device Manufacturing: Process > Formation Of Electrically Isolated Lateral Semiconductive Structure > Having Substrate Registration Feature (e.g., Alignment Mark)

Having Substrate Registration Feature (e.g., Alignment Mark)

Having Substrate Registration Feature (e.g., Alignment Mark) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

03/22/07 - 20070066025 - Pattern forming method, computer program thereof, and semiconductor device manufacturing method using the computer program
A pattern forming method for forming a pattern of a desired size on a substrate of a semiconductor device, includes preparing a first database by allocating property data to each position in a chip when the pattern is exposed, preparing a second database by pairing a cell name of a ...

02/22/07 - 20070042561 - Semiconductor device and productioin method thereof
A semiconductor device and a production method thereof capable of reducing warps of a semiconductor wafer when packaging at a wafer level in a SiP-type semiconductor device, which is configured so that an insulating layer is formed by stacking a plurality of resin layers on a semiconductor chip formed with ...

02/15/07 - 20070037359 - Method of forming align key in well structure formation process and method of forming element isolation structure using the align key
A method of forming an align key in a well structure formation process is provided. The method includes: providing a semiconductor substrate having an align key region and a first well region and forming a first ion implantation mask on the substrate. The first ion implantation mask has a groove ...

02/01/07 - 20070026627 - Well photoresist pattern of semiconductor device and method for forming the same
Disclosed is a well photoresist pattern of a semiconductor, and the fabrication method thereof. The method includes the steps of: (a) forming a sacrificial oxide layer on a semiconductor substrate; (b) applying a primer on the sacrificial oxide layer; (c) applying a photoresist on the primer; (d) soft-baking the photoresist; ...

01/25/07 - 20070020871 - Three dimensional ic device and alignment methods of ic device substrates
Alignment methods of IC device substrates. A first IC device substrate has a first front side for defining a plurality of first IC features, a first backside opposite the first front side, and a first alignment pattern formed on the first front side or the first backside. A second IC ...

12/07/06 - 20060276000 - Semiconductor wafer marking apparatus having marking interlock system and semiconductor wafer marking method using the same
In a semiconductor wafer marking apparatus having a marking interlock system and a semiconductor wafer marking method using the same, the semiconductor wafer marking apparatus includes a laser head unit including a flowcell having a laser radiation region on an upper surface thereof and a laser source radiating laser energy ...

12/07/06 - 20060275999 - Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate formed with a plurality of first element isolation trenches having respective first opening widths and a plurality of second element isolation trenches having larger opening widths than the first opening widths, element isolation insulating films buried in the first element isolation trenches so ...

12/07/06 - 20060275998 - Optical element and method for manufacturing the same
An optical element includes a columnar section having an upper surface for light emission or light incidence, an electrode that is electrically connected to the upper surface of the columnar section, and a mark formed by using a common resist as a mask that is used for forming the electrode. ...

11/30/06 - 20060270179 - Triple alignment substrate method and structure for packaging devices
A method for aligning multiple substrates. The method includes providing a handle substrate, providing a spacer substrate, and forming a plurality of first alignment marks on a first surface of the handle substrate. The method also includes forming a plurality of self-limiting alignment marks on a first surface of the ...

11/23/06 - 20060264002 - Methods for increasing photo-alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines in ...

11/23/06 - 20060264001 - Structures with increased photo-alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines in ...

11/23/06 - 20060264000 - Methods for increasing photo-alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines in ...

10/12/06 - 20060228865 - System and method for photolithography in semiconductor manufacturing
A method for photolithography in semiconductor device manufacturing comprises defining test critical dimension target for a photolithography mask, measuring a mask critical dimension, comparing mask critical dimension to the test critical dimension target and determining a critical dimension deviation, determining a photolithography light base energy in response to the critical ...

09/14/06 - 20060205172 - Perfluoroether acyl oligothiophene compounds
Semiconductor devices are described that include a semiconductor layer that comprises a perfluoroether acyl oligothiophene compound, preferably an α,ω-bis-perfluoroether acyl oligothiophene compound. Additionally, methods of making semiconductor devices are described that include depositing a semiconductor layer that contains a perfluoroether acyl oligothiophene compound, preferably an α,ω-bis(2-perfluoroether acyl oligothiophene compound. ...

08/31/06 - 20060194407 - Application of impressed-current cathodic protection to prevent metal corrosion and oxidation
A new method is provided for the processing of metals, most notably copper, such that damage to exposed surfaces of these metals is prevented. During a step of semiconductor processing, which results in exposing a metal surface to a wet substance having a pH value, a voltage is applied to ...

08/31/06 - 20060194406 - Semiconductor wafer positioning method, and apparatus using the same
The intensity of light of a predetermined wavelength corresponding to the type of a protective tape joined to the surface of a semiconductor wafer is adjusted by a controller, and a holding stage for holding the semiconductor wafer is scanned rotationally. At this time, at a V notch portion for ...

08/24/06 - 20060189091 - Method and system for laser hard marking
A method and system for laser hard marking is provided. The laser-marking system produces a hard mark on a semiconductor wafer. The system includes a pulsed laser subsystem that produces a pulsed laser output for marking at a location on the wafer. The pulsed laser subsystem is controlled so that ...

08/17/06 - 20060183293 - Method of forming alignment mark and method of manufacturing semiconductor device
A method of forming an alignment mark for specifying an optimum exposing position includes the steps of: preparing a substrate having a semiconductor element and an insulation film covering the semiconductor element; forming a resist pattern having a first opening on the insulation film, the first opening having a first ...

07/20/06 - 20060160320 - Method of fabricating a semiconductor device
A method of fabricating a semiconductor device includes: forming an insulating film on a semiconductor body to cover a termination area surrounding a cell area; forming a mask material film to cover the cell area and the insulating film; forming a resist film to cover the mask material film; patterning ...

06/29/06 - 20060141738 - Method for measuring bonding quality of bonded substrates, metrology apparatus, and method of producing a device from a bonded substrate
In a method for measuring the bonding quality of bonded substrates, such as bonded SOI wafers, a plurality of marks are created at a first side of a top substrate after, or before, the bonding of the top substrate onto a bottom substrate. Then, the positions of the plurality of ...

06/29/06 - 20060141737 - Planar magnetic tunnel junction substrate having recessed alignment marks
A method for forming an alignment mark structure for a semiconductor device includes forming an alignment recess at a selected level of the semiconductor device substrate. A first metal layer is formed over the selected substrate level and within the alignment recess, wherein the alignment recess is formed at a ...

06/01/06 - 20060115956 - System and method using visible and infrared light to align and measure alignment patterns on multiple layers
A system and method are used to increase alignment accuracy of feature patterns through detection of alignment patterns on both a surface layer and at least one below surface layers of an object. Visible light is used to detect alignment patterns on the surface layer and infrared light is used ...

05/25/06 - 20060110890 - Cut-and-paste imprint lithographic mold and method therefor
A method (and apparatus) of replicating a pattern on a structure, includes using imprint lithography to replicate a pattern formed on a first structure onto a portion of a second structure. ...

04/13/06 - 20060079067 - Methods for aligning patterns on a substrate based on optical properties of a mask layer and related devices
A method of fabricating a semiconductor device includes forming a material layer on a substrate, forming a mask layer on the material layer, and implanting ions into the mask layer to reduce light absorption thereof. An alignment key may be formed between the material layer and the substrate, and a ...

03/23/06 - 20060063347 - Method for detecting alignment mark shielding
A method of testing a test wafer includes shielding test centers on a test wafer using shielding tabs during the deposition of a layer. The test wafer has the same size and shape of product wafers. The shielding tabs are then removed from the test wafer. A plurality of predetermined ...

03/16/06 - 20060057815 - Method of manufacturing a semiconductor device
In a method of manufacturing a high-voltage semiconductor device, a mask layer is formed on a semiconductor substrate. The mask layer is patterned to form a stepped portion of the mask layer. A photoresist pattern for defining an active region of the substrate is formed on the substrate using the ...

03/02/06 - 20060046422 - Methods for increasing photo alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines ...

12/08/05 - 20050272221 - Method of reducing alignment measurement errors between device layers
An integrated circuit in which measurement of the alignment between subsequent layers has less susceptibility to stress induced shift. A first layer of the structure has a first overlay mark. A second and/or a third layer are formed in the alignment structure and on the first layer. Portions of the ...

11/17/05 - 20050255666 - Method and structure for aligning mechanical based device to integrated circuits
A method for bonding substrates together. The method includes providing a first substrate comprising a first surface. The first substrate comprises a plurality of first chips thereon. Each of the chips has integrated circuit devices. The first substrate includes a first alignment mark on the first substrate and a second ...

11/10/05 - 20050250292 - Methods for forming backside alignment markers useable in semiconductor lithography
Disclosed herein are methods for forming photolithography alignment markers on the back side of a substrate, such as a crystalline silicon substrate used in the manufacture of semiconductor integrated circuits. According to the disclosed techniques, laser radiation is used to remove the material (e.g., silicon) from the back side of ...

11/10/05 - 20050250291 - Methods for clearing alignment markers useable in semiconductor lithography
Disclosed herein are methods for removing overlying materials on a substrate which otherwise might optically obscure an underlying photolithography alignment marker. According to the disclosed techniques, laser radiation is used to remove the material (e.g., a metal) in an area which overlies the alignment marker (e.g., formed in polysilicon). Such ...

10/06/05 - 20050221577 - Method for modifying existing micro-and nano-structures using a near-field scanning optical microscope
A method for manufacturing a microstructure, which includes at least one fine feature on an existing feature, using an NSOM laser micromachining system. A microstructure device preform is provided. A portion of its top surface is profiled with the NSOM to produce a topographical image. This profiled portion is selected ...

09/01/05 - 20050191821 - Iii-nitride device and method with variable epitaxial growth direction
A semiconductor device composed of III-nitride materials is produced with epitaxial growth that permits vertical and lateral growth geometries to improve device characteristics. The resulting device has a greater breakdown voltage due to the greater integrity of the semiconductor material structure since no ion implantation processes are used. The epitaxially ...

08/25/05 - 20050186754 - Solid-state imaging apparatus having multiple anti-reflective layers and method for fabricating the multiple anti-reflective layers
A solid-state imaging apparatus comprising multiple anti-reflective layers which can improve a smear characteristic while suppressing a dark defect and a method for fabricating the multiple anti-reflective layers are provided. The solid-state imaging apparatus includes a light receiving unit, a charge transfer unit, and multiple anti-reflective layers. The method includes ...

08/25/05 - 20050186753 - Fib exposure of alignment marks in mim technology
A new and improved method for exposing alignment marks on a substrate by locally cutting through a metal or non-metal layer or layers sequentially deposited on the substrate above the alignment marks, using focused ion beam (FIB) technology. In a preferred embodiment, a method for exposing alignment marks on a ...

08/18/05 - 20050181575 - Semiconductor structures and manufacturing methods
A method of making a semiconductor device includes forming an alignment mark in a semiconductor wafer. The alignment mark includes a fist set of parallel lines and a second set of parallel lines. The parallel lines in the first set overlie and cross the parallel lines in the second set. ...

07/07/05 - 20050148151 - Plasma display panel and manufacturing method thereof
A manufacturing method of a plasma display panel and the plasma display panel made using the manufacturing method include the align marks being maintained in a discernible state. The method for manufacturing a plasma display panel includes forming electrodes on a substrate along one direction, and forming align marks on ...

06/16/05 - 20050130386 - Method and apparatus for polishing a substrate
The present invention is to provide a method and device for polishing a glass substrate, suitable for polishing a large-sized glass substrate. The device for polishing a substrate is adapted so that a substrate is attached to a film stretched on a frame; the frame is installed on a carrier; ...

06/02/05 - 20050118781 - Substrate, method of preparing a substrate, method of measurement, lithographic apparatus, device manufacturing method and device manufactured thereby, and machine-readable storage medium
In a method according to one embodiment of the invention, a plurality of markers are printed in resist on a substrate at a range of angles relative to a crystal axis of the substrate. The markers are etched in to the substrate using an anisotropic etch process, such that after ...



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