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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Including Isolation Structure Including Isolation StructureIncluding Isolation Structure patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.11/30/06 - 20060270169 - Method for making a semiconductor device including shallow trench isolation (sti) regions with a superlattice therebetween A method for making a semiconductor device may include forming a plurality of shallow trench isolation (STI) regions in a semiconductor substrate. Further, a plurality of layers may be deposited over the substrate to define respective superlattices over the substrate between adjacent STI regions and to define respective non-monocrystalline regions ... 11/02/06 - 20060246671 - Method of fabricating a transistor having a triple channel in a memory device Disclosed is a method for fabricating a transistor of a memory device capable of preventing voids from being created when forming a low-resistant gate electrode. The method includes the steps of forming an active area by etching a semiconductor substrate, forming a field oxide layer in the semiconductor substrate and ... 10/05/06 - 20060223271 - Method for manufacturing a semiconductor device Manufacturing a semiconductor device by removing the insulation film in an alignment mark-forming region, depositing a first semiconductor layer, removing the insulation film on the semiconductor substrate after the second semiconductor layer is formed, forming a first exposing region for exposing the semiconductor substrate through the second semiconductor layer and ... 10/05/06 - 20060223270 - Method of manufacturing semiconductor device A method of manufacturing a semiconductor device including a step of forming an insulating film on a semiconductor substrate, a step of removing the insulating film selectively in a first alignment mark forming region and a silicon-on-insulator (SOI) structure forming region that are provided on the semiconductor substrate by patterning ... 10/05/06 - 20060223269 - Method of manufacturing semiconductor device A method of manufacturing a semiconductor device, comprising the steps of: preparing a semiconductor substrate having first to fourth active regions and field oxides, the third and fourth active regions sandwiching the second active region, and the field oxides isolating the first to fourth active regions; forming a protective film ... 09/07/06 - 20060199343 - Method of forming mos transistor having fully silicided metal gate electrode A method of fabricating a MOS transistor having a fully silicided metal gate electrode is provided. The method includes forming a gate sacrificial pattern and protrusion regions on the gate pattern and active regions of a semiconductor substrate. The gate sacrificial pattern and the protrusion regions then undergo a silicidation ... 05/25/06 - 20060110886 - Mosfet structure and method of fabricating the same A MOSFET structure and a method of forming it are described. The thickness of a portion of the gate dielectric layer of the MOSFET structure adjacent to the drain region is increased to form a bird's beak structure. The gate-to-drain overlap capacitance is reduced by the bird's beak structure. ... 12/22/05 - 20050282342 - Field effect transistor and fabrication method thereof A field effect transistor of the present invention includes, on a semiconductor substrate, (i) a fin section formed in a fin shape protruding from the substrate, (ii) a gate dielectric for covering a channel region section of the fin section, (iii) a gate electrode that is insulated from the channel ... 09/15/05 - 20050202641 - Radiation-hardened transistor fabricated by modified cmos process An NMOS field effect transistor (1) is made radiation hard by a pair of guard band implants (115) of limited horizontal extent, extending between the source (30A) and drain (30B) along the edge of the transistor body. and extending only to a limited extent into the field insulator and into ... 08/04/05 - 20050170592 - Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a ... ### FreshPatents.com Support |