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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Doping Of Semiconductive Channel Region Beneath Gate Insulator (e.g., Adjusting Threshold Voltage, Etc.) > After Formation Of Source Or Drain Regions And Gate Electrode

After Formation Of Source Or Drain Regions And Gate Electrode

After Formation Of Source Or Drain Regions And Gate Electrode patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

11/17/05 - 20050255658 - Flash memory cell and manufacturing method thereof
A flash memory cell including a p-type substrate, an n-type deep well, a stacked gate structure, a source region, a drain region, a p-type pocket doped region, spacers, a p-type doped region and a contact plug is provided. The n-type deep well is set up within the p-type substrate and ...



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