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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Gate Insulator Structure Constructed Of Diverse Dielectrics (e.g., Mnos, Etc.) Or Of Nonsilicon Compound Gate Insulator Structure Constructed Of Diverse Dielectrics (e.g., Mnos, Etc.) Or Of Nonsilicon CompoundGate Insulator Structure Constructed Of Diverse Dielectrics (e.g., Mnos, Etc.) Or Of Nonsilicon Compound patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/29/07 - 20070072379 - Mos transistor and manufacturing method thereof Disclosed are a MOS transistor having a low resistance ohmic contact characteristic and a manufacturing method thereof capable of improving a drive current of the MOS transistor. A gate oxide layer, a gate electrode, and a spacer are formed on a silicon substrate, and a silicon carbide layer is deposited ... 03/29/07 - 20070072378 - Method of manufacturing metal-oxide-semiconductor transistor devices A method of manufacturing a metal-oxide-semiconductor transistor device is disclosed. In the method, a silicon nitride spacer is formed and will be removed after an ion implantation process used to form a source/drain region and a salicide process used to form a metal silicide layer on the surface of the ... 03/22/07 - 20070066022 - Method of fabricating silicon nitride layer and method of fabricating semiconductor device A method of fabricating a silicon nitride layer is described. First, a substrate is provided. Then, a silicon nitride layer is formed on the substrate. The silicon nitride layer is UV-cured in an atmosphere lower than the standard atmospheric pressure. Through the UV curing treatment, the tensile stress of the ... 03/22/07 - 20070066021 - Formation of gate dielectrics with uniform nitrogen distribution The present invention provides a method for manufacturing a gate dielectric (710) that includes providing a nitrided dielectric layer (220) over a substrate (120). The nitrided dielectric layer (220) has a nonuniform concentration of nitrogen in a bulk thereof. The nitrided dielectric layer (220) is exposed to oxygen radicals (410), ... 03/08/07 - 20070054455 - Method to obtain uniform nitrogen profile in gate dielectrics The present invention provides, in one aspect, provides a method of manufacturing a microelectronics device 100 that includes depositing a first gate dielectric layer 160 over a substrate 115, subjecting the first gate dielectric layer 160 to a first nitridation process, forming a second gate dielectric layer 165 over the ... 02/22/07 - 20070042555 - Formation of uniform silicate gate dielectrics The present invention provides method of forming a gate dielectric that includes forming a metal source layer (210) comprising a metal and at least one nonmetallic element over a substrate (110). The metal source layer (210) is formed having a composition rich in the metal. A dielectric layer (310) comprising ... 02/08/07 - 20070032023 - Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors, and fabricating such devices A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest ... 01/11/07 - 20070010061 - Metal-substituted transistor gates One aspect of this disclosure relates to a method for forming an integrated circuit. According to various embodiments of the method, a plurality of transistors is formed. For each transistor, a gate dielectric is formed on a substrate, a substitutable structure is formed on the gate dielectric, and source/drain regions ... 01/11/07 - 20070010060 - Metal-substituted transistor gates One aspect of this disclosure relates to a method for forming a transistor. According to various method embodiments, a gate dielectric is formed on a substrate, a substitutable structure is formed on the gate dielectric, and source/drain regions for the transistor are formed. A desired gate material is substituted for ... 01/04/07 - 20070004154 - Dielectric structure in nonvolatile memory device and method for fabricating the same A dielectric structure in a nonvolatile memory device and a method for fabricating the same are provided. The dielectric structure includes: a first oxide layer; a first high-k dielectric film formed on the first oxide layer, wherein the first high-k dielectric film includes one selected from materials with a dielectric ... 01/04/07 - 20070004153 - Method for producing charge-trapping memory cell arrays A memory layer sequence comprising a lower confinement layer (2), a charge-trapping layer (3), and an upper confinement layer (4) is applied on the main surface of a silicon substrate (1). By a photolithography step, trenches running parallel at a distance from one another are etched to delimitate the active ... 12/28/06 - 20060292804 - Nitride semiconductor light emitting diode and fabrication method thereof The invention relates to a nitride semiconductor LED and a fabrication method thereof. In the LED, a first nitride semiconductor layer, an active region a second nitride semiconductor layer of a light emitting structure are formed in their order on a transparent substrate. A dielectric mirror layer is formed on ... 12/14/06 - 20060281265 - Selective nitridation of gate oxides A method of fabricating a semiconductor structure. The method includes forming a first feature of a first active device and a second feature of a second active device, introducing a first amount of nitrogen into the first feature of the first active device, and introducing a second amount of nitrogen ... 12/14/06 - 20060281264 - Semiconductor device and method for fabricating the same A semiconductor device includes: a semiconductor substrate; a gate insulating film formed on the semiconductor substrate and made of a high-dielectric-constant material composed of a plurality of layers stacked perpendicularly to a principal surface of the semiconductor substrate and associated with respective phases; and a gate electrode formed on the ... 12/07/06 - 20060275991 - Method of manufacturing a semiconductor integrated circuit device A method of manufacturing a semiconductor integrated circuit device comprising forming a silicon oxide film as thin as 5 nm or less on the surfaces of p type wells and n type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO ... 11/30/06 - 20060270167 - Semiconductor device having non-uniformly thick gate oxide layer for improving refresh characteristics To improve the refresh characteristics of a semiconductor device, a gate oxide layer comprising a first oxide layer and a second oxide layer are formed on the substrate. A portion of the second oxide layer is isotropically etched using a photoresist layer pattern. A gate is formed by sequentially forming ... 11/30/06 - 20060270166 - Laser spike annealing for gate dielectric materials A method of forming a semiconductor device using laser spike annealing is provided. The method includes providing a semiconductor substrate having a surface, forming a gate dielectric layer on the surface of the semiconductor substrate, laser spike annealing the gate dielectric layer, and patterning the gate dielectric layer and thus ... 11/23/06 - 20060263989 - Semiconductor device and fabrication method therefor A semiconductor device is provided which includes a semiconductor substrate (10), an ONO film (16) provided on the semiconductor substrate (10), and a bit line (14) formed in the semiconductor substrate (10) and connected to a contact (34) provided on the bit line (14), the semiconductor substrate (10) having trench ... 11/16/06 - 20060258106 - Method of forming a gate oxide film for a high voltage region of a flash memory device A method of forming a gate oxide film for high voltage region of semiconductor devices includes forming patterns on a semiconductor substrate having a high voltage region, thereby exposing only a gate oxide film formation region for high voltage, forming a metal oxidization layer on the entire surface, and performing ... 11/09/06 - 20060252211 - Atomic layer deposited nanolaminates of hfo2/zro2 films as gate dielectrics A dielectric film containing a nanolaminate with a hafnium oxide layer and a zirconium oxide layer and a method of fabricating such a dielectric film produce a reliable gate dielectric having an equivalent oxide thickness thinner than attainable using silicon oxide. ... 10/26/06 - 20060240626 - Write once read only memory employing charge trapping in insulators Structures and methods for write once read only memory employing charge trapping in insulators are provided. The write once read only memory cell includes a metal oxide semiconductor field effect transistor having a first source/drain region, a second source/drain region, a channel region between the first and the second source/drain ... 10/19/06 - 20060234457 - Non-volatile memory device and method of fabricating the same A method of fabricating an a non-volatile memory includes forming trench isolation regions in an inactive region of a semiconductor substrate, adjacent trench isolation regions defining respective protrusions having rounded edges therebetween, wherein upper surfaces of the trench isolation regions are lower than an upper surface of the semiconductor substrate ... 09/14/06 - 20060205163 - Method of fabricating a non-volatile memory A method of fabricating a non-volatile memory is provided. A tunneling dielectric layer, a charge trapping layer and a barrier dielectric layer are sequentially formed over a substrate. Then, a pad conductive layer with openings is formed over the barrier dielectric. Thereafter, the barrier dielectric layer, the charge trapping layer, ... 08/31/06 - 20060194396 - Method for depositing a metal gate on a high-k dielectric film and improving high-k dielectric film and metal gate interface, and a substrate treating system A method to improve a high-k dielectric film and metal gate interface in the fabrication of a MOSFET by depositing a metal gate on a high-k dielectric, the method includes annealing a substrate with a high-k dielectric film deposited thereon in a thermal annealing module and depositing a metal gate ... 08/03/06 - 20060172498 - Semiconductor device having high dielectric constant gate insulating layer and its manufacture method A semiconductor device manufacture method has the steps of: (a) forming an interface layer of SiO or SiON on the surface of an active region of a silicon substrate; (b) forming a high dielectric constant gate insulating film such as HfSiON having a dielectric constant higher than that of silicon ... 07/27/06 - 20060166447 - Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperature for a sufficient time to generate ... 07/27/06 - 20060166446 - Manufacturing method of semiconductor device, semiconductor manufacturing apparatus, plasma nitridation method, computer recording medium, and program An object of the present invention is to prevent an increase in film thickness and inhibit a reduction in capacity of a capacitor. In a semiconductor device having a capacitor, the capacitor includes a lower electrode, an upper electrode, and an insulating film interposed between the lower electrode and the ... 07/13/06 - 20060154425 - Semiconductor device and method for fabricating the same A semiconductor device and method for fabricating the same. The semiconductor device comprises a substrate with a gate stack thereon, wherein the gate stack comprises a high-k dielectric layer and a conductive layer sequentially overlying a portion of the substrate. An oxidation-proof layer overlies sidewalls of the gate stack. A ... 07/06/06 - 20060148180 - Atomic layer deposited hafnium tantalum oxide dielectrics A dielectric layer containing an atomic layer deposited hafnium tantalum film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. In an embodiment, a hafnium tantalum oxide film is formed by depositing hafnium and tantalum by atomic layer ... 07/06/06 - 20060148179 - Method of fabricating nitrogen-containing gate dielectric layer and semiconductor device A method of fabricating a nitrogen-containing gate dielectric layer is described. First, a gate dielectric layer is formed on a substrate by performing a dilute wet oxidation process. Then, a nitridation step is performed for doping nitrogen into the gate dielectric layer. After that, a re-oxidation step is performed for ... 06/22/06 - 20060134871 - Charge-trapping memory device and method of production Charge-trapping regions are arranged beneath lower edges of the gate electrode separate from one another. Source/drain regions are formed in self-aligned manner with respect to the charge-trapping regions by means of a doping process at low energy in order to form shallow junctions laterally extending only a small distance beneath ... 06/22/06 - 20060134870 - Transistor device and method of manufacture thereof Methods of forming CMOS devices and structures thereof. A workpiece is provided having a first region and a second region. A high k gate dielectric material is formed over the workpiece. A first gate material comprising a first metal is formed over the high k gate dielectric material. The first ... 06/08/06 - 20060121678 - Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrode A method for making a semiconductor device is described. That method comprises adding nitrogen to a silicon dioxide layer to form a nitrided silicon dioxide layer on a substrate. After forming a sacrificial layer on the nitrided silicon dioxide layer, the sacrificial layer is removed to generate a trench. A ... 05/18/06 - 20060105530 - Method for fabricating semiconductor device A method for fabricating a semiconductor device with high-k materials. A high-k dielectric layer is formed on a substrate, followed by a fluorine-containing treatment of the high-k dielectric layer, forming an interface containing Si—F bonds. ... 05/04/06 - 20060094192 - Method for treating base oxide to improve high-k material deposition A method for forming a high-K material layer in a semiconductor device fabrication process including providing a silicon semiconductor substrate or thermally growing interfacial oxide layer comprising silicon dioxide over the silicon substrate; treating with an aqueous base solution or nitridation and depositing a high-K material layer. ... 04/13/06 - 20060079058 - Method for inspecting semiconductor device A wafer is irradiated with laser light having a wavelength which is transmitted through an inside of a crystal of the wafer and does not generate an electromotive force due to photo-excitation while the laser light is scanned. When a temperature of the wafer is increased by the irradiation, a ... 03/23/06 - 20060063337 - Semiconductor device and manufacturing method thereof A method of manufacturing a semiconductor device includes forming a gate oxide layer on a substrate and forming a nitride layer on the surface of the oxide layer using nitrogen at a concentration of 9 to 11% as a plasma gas. With such scheme, the plasma nitridation method is used ... 03/23/06 - 20060063336 - Method of forming a semiconductor device having a dielectric layer with high dielectric constant A method for forming a semiconductor device (10) creates a dielectric layer (18) with high dielectric constant. An interfacial layer (14) is formed over a semiconductor substrate (12). A dielectric layer (16) is formed over the interfacial layer, wherein the dielectric layer has a high dielectric constant (K). The dielectric ... 03/16/06 - 20060057808 - Reducing oxidation under a high k gate dielectric A metal layer is formed on a dielectric layer, which is formed on a substrate. After forming a masking layer on the metal layer, the exposed sides of the dielectric layer are covered with a polymer diffusion barrier. ... 03/09/06 - 20060051925 - Atomic layer deposition of metal oxynitride layers as gate dielectrics A metal oxynitride layer formed by atomic layer deposition of a plurality of reacted monolayers, the monolayers comprising at least one each of a metal, an oxide and a nitride. The metal oxynitride layer is formed from zirconium oxynitride, hafnium oxynitride, tantalum oxynitride, or mixtures thereof. The metal oxynitride layer ... 03/09/06 - 20060051924 - Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, a trench within the first dielectric layer, and a second dielectric layer on the substrate. The second dielectric layer has a first part that is formed in the trench and ... 03/02/06 - 20060046402 - Flash cell structures and methods of formation Methods of fabrication and flash memory structures eliminate process steps while increasing capacitive coupling between floating gates and control gates of the memory cells. A thick floating gate is deposited early in the process, and a height and width of the floating gate is controlled with deposition and etching or ... 02/02/06 - 20060024893 - Method of forming a semiconductor device and structure thereof In one embodiment, a method for forming a semiconductor device is described. A semiconductor substrate has a first portion and a second portion. A first dielectric layer formed over the first portion of the semiconductor substrate and a second dielectric layer is formed over the second portion of the semiconductor ... 02/02/06 - 20060024892 - Compensating the workfunction of a metal gate transistor for abstraction by the gate dielectric layer A metal gate transistor may include a metal layer over a high dielectric constant dielectric layer. The dielectric layer abstracts electronegativity from said metal layer, altering its workfunction. The workfunction of the metal layer may be set to compensate for the dielectric layer abstraction. ... 01/26/06 - 20060019453 - Nrom flash memory with a high-permittivity gate dielectric A high permittivity gate dielectric is used in an NROM memory cell. The gate dielectric has a dielectric constant greater than silicon dioxide and is comprised of an atomic layer deposited and/or evaporated nanolaminate structure. The NROM memory cell has a substrate with doped source/drain regions. The high-k gate dielectric ... 01/26/06 - 20060019452 - Method for patterning hfo2-containing dielectric A wafer has a trench, a STI layer formed in the trench, an HfO2-containing gate dielectric covering the wafer and the STI layer, a gate electrode formed on the HfO2-containing gate dielectric, and at least a spacer formed beside the gate electrode. The wafer is preheated and a bromine-rich gas ... 01/26/06 - 20060019451 - Method for patterning hfo2-containing dielectric A wafer has a trench, a STI layer formed in the trench, an HfO2-containing gate dielectric covering the wafer and the STI layer, a gate electrode formed on the HfO2-containing gate dielectric, and at least a spacer formed beside the gate electrode. The wafer is preheated and a bromine-rich gas ... 01/12/06 - 20060008999 - Creating a dielectric layer using ald to deposit multiple components A dielectric layer is created for use with non-volatile memory and/or other devices. The dielectric layer is created using atomic layer deposition to deposit multiple components whose mole fractions change as a function of depth in the dielectric layer in order to create a rounded bottom of a conduction band ... 01/12/06 - 20060008998 - Semiconductor assemblies, methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates The invention encompasses a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the substrate. Nitrogen is formed within the silicon dioxide containing layer. Substantially all of the nitrogen within the silicon dioxide is at least 10 Å ... 01/12/06 - 20060008997 - Atomic layer deposition of interpoly oxides in a non-volatile memory device Aluminum oxide is deposited by atomic layer deposition to form a high-k dielectric for the interpoly dielectric layer of a non-volatile memory device. The increased capacitive coupling can allow a thicker oxide layer to be used between the floating gate and the control gate, resulting in improved reliability and longer ... 01/12/06 - 20060008996 - Method for fabricating semiconductor device by using radical oxidation The present invention provides a method for fabricating a semiconductor device having a dual gate dielectric structure capable of obtaining a simplified process and improving device reliability. The method includes the steps of: forming an insulation layer on a substrate; forming a nitride layer on the insulation layer; selectively etching ... 12/29/05 - 20050287746 - Facilitating removal of sacrificial layers to form replacement metal gates In a metal gate replacement process, a gate electrode stack may be formed of a germanium containing layer. In subsequent processing of the source/drains, high temperature steps may be utilized, forming a germinide on said stacks. That germinide may be removed, prior to removing the rest of the stack, using ... 12/15/05 - 20050277256 - Nanolaminates of hafnium oxide and zirconium oxide A dielectric film containing a HfO2/ZrO2 nanolaminate and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. A dielectric layer containing a HfO2/ZrO2 nanolaminate may be realized in a wide variety of electronic devices and systems. ... 12/08/05 - 20050272210 - Method for manufacturing gate electrode of semiconductor device using aluminium nitride film A method for manufacturing gate electrode of semiconductor device using an aluminium nitride film is provided, the method including cleaning a surface of a semiconductor substrate, nitriding the surface of the substrate, forming a gate dielectric film comprising an aluminium nitride film on the surface of a semiconductor substrate, depositing ... 11/03/05 - 20050245037 - Method for fabricating flash memory device A method for fabricating a flash memory device is disclosed that improves hot carrier injection efficiency by forming a gate after forming source and drain implants using a sacrificial insulating layer pattern, which includes forming a sacrificial insulating pattern layer over a flash memory channel region of a semiconductor substrate; ... 11/03/05 - 20050245036 - Reducing gate dielectric material to form a metal gate electrode extension In a metal gate replacement process, a cup-shaped gate metal oxide dielectric may have vertical portions that may be exposed to a reduction reaction. As a result of the reduction reaction, the vertical portions may be converted to metal, which adds to the existing gate electrode. In some cases, removing ... 10/20/05 - 20050233530 - Enhanced gate structure A technique for producing an enhanced gate structure having a silicon-nitride buffer. Embodiments relate to the structure and development of a gate structure having a silicon-nitride buffer layer deposited upon a dielectric layer, upon which a gate material, such as polysilicon, is deposited. ... 10/20/05 - 20050233529 - Integration of high k gate dielectric Methods are provided herein for forming electrode layers over high dielectric constant (“high k”) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is protected from reduction during a subsequent deposition of silicon-containing gate electrode. In particular, a seed deposition phase includes conditions designed for ... 10/20/05 - 20050233528 - Ono formation method An ONO formation method comprises the following procedures. First, a bottom oxide layer is formed on a silicon substrate, and then a silicon-rich nitride layer is deposited on the bottom oxide layer. Then, an oxidation process is performed to react with silicon atoms in the silicon-rich nitride layer, so as ... 10/20/05 - 20050233527 - Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, then forming a trench within the first dielectric layer. After forming a second dielectric layer on the substrate, a first metal layer is formed within the trench on a first ... 10/20/05 - 20050233526 - Semiconductor device, production method and production device thereof The task of the present invention is to enable formation of a gate insulating film structure having a good-quality interface between a silicon oxide film and silicon in an interface between a high dielectric constant thin film and a silicon substrate to provide a semiconductor device and a semiconductor manufacturing ... 10/13/05 - 20050227443 - Multi-level memory cell and fabricating method thereof A multi-level memory cell includes a substrate, an insulation layer, a silicon stripe, a first control gate, a second control gate, source/drain regions, silicon oxide/silicon nitride/silicon oxide composite layers. The insulation layer and the silicon stripe are sequentially disposed on the substrate. The first control gate and the second control ... 10/13/05 - 20050227442 - Atomic layer deposited nanolaminates of hfo2/zro2 films as gate dielectrics A dielectric film containing HfO2/ZrO2 nanolaminates and a method of fabricating such a dielectric film produce a reliable gate dielectric having an equivalent oxide thickness thinner than attainable using SiO2. A gate dielectric is formed by atomic layer deposition of HfO2 using a HfI4 precursor followed by the formation of ... 10/13/05 - 20050227441 - Method of forming a tantalum-containing gate electrode structure A method for forming a tantalum-containing gate electrode structure by providing a substrate having a high-k dielectric layer thereon in a process chamber and forming a tantalum-containing layer on the high-k dielectric layer in a thermal chemical vapor deposition process by exposing the substrate to a process gas containing TAIMATA ... 10/06/05 - 20050221564 - System and method for mitigating oxide growth in a gate dielectric Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer ... 09/29/05 - 20050215015 - Dielectric layer forming method and devices formed therewith Embodiments in accordance with the present invention provide alternative materials, and methods of forming such materials, that are effective as dielectric layers. Such embodiments include forming metal-containing dielectric layers over a silicon-containing substrate where a metal-containing layer is first formed and that treated to form a dielectric layer. Dielectric layers ... 09/15/05 - 20050202640 - Gate technology for strained surface channel and strained buried channel mosfet devices A method of fabricating a semiconductor device including providing a semiconductor heterostructure, the heterostructure having a relaxed Si1-xGex layer on a substrate, a strained channel layer on the relaxed Si1-xGex layer, and a Si1-yGey layer; removing the Si1-yGey layer; and providing a dielectric layer. The dielectric layer includes a gate ... 09/08/05 - 20050196927 - Process for integration of a high dielectric constant gate insulator layer in a cmos device A CMOS device structure, and a method of fabricating the CMOS device, featuring a gate insulator layer comprised of a high k metal oxide layer, has been developed. The process features formation of recessed, heavily doped source/drain regions, and of vertical, polysilicon LDD spacers, prior to deposition of the high ... 09/08/05 - 20050196926 - Strained silicon-channel mosfet using a damascene gate process The present invention provides a method using a damascene-gate process to improve the transport properties of FETs through strain Si. Changes in mobility and FET characteristics are deliberately made in a Si or silicon-on-insulator (SOI) structure through the introduction of local strain in the channel region, without introducing strain in ... 07/28/05 - 20050164457 - Non-volatile memory devices and methods of fabricating the same Non-volatile memory devices and fabrication methods thereof are provided. The device includes a plurality of isolation layers formed at a semiconductor device, a plurality of stacked gates crossing over an active region between the isolation layers, and an oxidation barrier layer covering the stacked gate. Each of the stacked gates ... 07/14/05 - 20050153514 - Method of manufacturing dielectric layer in non-volatile memory cell A method for manufacturing a dielectric layer structure for a non-volatile memory cell is provided. A method includes forming a first dielectric layer for tunneling on a semiconductor substrate, a second dielectric layer on the first dielectric layer to store charges, nitrogenizing surface of the second dielectric layer, and forming ... 07/14/05 - 20050153513 - Method of forming a dielectric layer for a non-volatile memory cell and method of forming a non-volatile memory cell having the dielectric layer A method of forming a dielectric layer for a non-volatile memory cell is disclosed. According to the method, a dielectric layer is formed by successively forming a lower oxide layer, a nitride layer and an upper oxide layer on a semiconductor substrate. The lower and upper oxide layers are formed ... 06/30/05 - 20050142770 - Method for forming gate oxide layer in semiconductor device A method for forming gate oxide layers of a semiconductor device including defining a first, a second, and a third device region by forming device isolation regions on a semiconductor substrate. The method also includes forming a sacrificing dielectric layer on the substrate, removing the sacrificing dielectric layer on the ... 06/30/05 - 20050142769 - Semiconductor device and method for manufacturing the same Disclosed is a semiconductor device comprising a Ge semiconductor area, and an insulating film area, formed in direct contact with the Ge semiconductor area, containing metal, germanium, and oxygen. ... 06/16/05 - 20050130377 - Method for processing a semiconductor device comprising a silicon-oxy-nitride dielectric layer The present invention provides a method for processing a semiconductor device wherein a dielectric layer is partially converted into a silicon-oxy-nitride by incorporation of nitrogen atoms into the dielectric layer, which comprises a silicon oxide. Before the introduction of the nitrogen atoms into the dielectric layer, the dielectric layer is ... 06/09/05 - 20050124121 - Anneal of high-k dielectric using nh3 and an oxidizer The present invention pertains to annealing a high dielectric constant (high-k) material in a manner that substantially reduces or eliminates disadvantages and problems heretofore associated with the same. In particular, the high-k material is annealed in an ambient having a single chemistry of nitrogen and hydrogen, such as ammonia (NH3), ... ### FreshPatents.com Support |