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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Utilizing Compound Semiconductor Utilizing Compound SemiconductorUtilizing Compound Semiconductor patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.04/05/07 - 20070077714 - Method for fabricating a semiconductor device A method of fabricating a HI-nitride power semiconductor device that includes growing a transition layer over a substrate using at least two distinct and different growth methods. ... 03/29/07 - 20070072377 - Process of making a iii-v compound semiconductor heterostructure mosfet A method of forming a compound semiconductor device comprises forming a gate insulator layer overlying a compound semiconductor substrate, defining an active device region within the compound semiconductor substrate, forming ohmic contacts to the compound semiconductor substrate proximate opposite sides of the active device region, and forming a gate metal ... 03/22/07 - 20070066020 - Iii-nitride current control device and method of manufacture A III-nitride device includes a recessed electrode to produce a nominally off, or an enhancement mode, device. By providing a recessed electrode, a conduction channel formed at the interface of two III-nitride materials is interrupted when the electrode contact is inactive to prevent current flow in the device. The electrode ... 03/01/07 - 20070048948 - Apparatus and method for non-contact assessment of a constituent in semiconductor substrates Methods and apparatus for assessing a constituent in a semiconductor substrate. Several embodiments of the invention are directed toward non-contact methods and systems for identifying an atom specie of a dopant implanted into the semiconductor substrate using techniques that do not mechanically contact the substrate with electrical leads or other ... 01/25/07 - 20070020860 - Method for making semiconductor device including a strained superlattice and overlying stress layer and related methods A method for making a semiconductor device may include forming a superlattice layer including a plurality of stacked groups of layers, and forming a stress layer above the strained superlattice layer to induce a strain therein. Each group of layers of the superlattice layer may include a plurality of stacked ... 12/14/06 - 20060281263 - Semiconductor devices and method of manufacturing them With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an ... 11/02/06 - 20060246670 - Schottky device and method of forming A Schottky device having a plurality of unit cells, each having a Schottky contact portion, surrounded by a termination structure that causes depletion regions to form in a vertical and horizontal direction, relative to a surface of the device, during a reverse bias voltage condition. ... 07/20/06 - 20060160314 - Substrate having silicon germanium material and stressed silicon nitride layer A method of fabricating a semiconductor device includes providing a region having doped silicon region on a substrate, and forming a silicon germanium material adjacent to the region on the substrate. A stressed silicon nitride layer is formed over at least a portion of the doped silicon region on the ... 06/22/06 - 20060134869 - Systems and methods for rectifying and detecting signals A first device has a surface and includes a plurality of at largest micrometer-scale geometry structures extending along its surface. The structures have a first portion and a second portion. A plurality of at largest micrometer-scale geometry conductors are coupled to the first portion of respective structures. A converter converts ... 04/27/06 - 20060088966 - Semiconductor device having a smooth epi layer and a method for its manufacture Provided are a semiconductor device and a method for manufacturing such a device by varying the pressure used to form silicon-germanium (SiGe) layers on a substrate such that a first layer is formed at a substantially higher pressure than a second layer that is formed on the first layer. ... 04/13/06 - 20060079056 - Semiconductor structures having a strained silicon layer on a silicon-germanium layer and related fabrication methods A semiconductor structure including a SiGe layer and a method of fabricating the same are provided. The structure includes a silicon layer heavily doped with impurities. A SiGe layer is disposed on the silicon layer. A strained silicon layer is disposed on the SiGe layer. The impurities may be boron. ... 03/30/06 - 20060068553 - Method for forming a semiconductor device having a strained channel and a heterojunction source/drain A semiconductor device (10) is formed by positioning a gate (22) overlying a semiconductor layer (16) of preferably silicon. A semiconductor material (26) of, for example only, SiGe or Ge, is formed adjacent the gate over the semiconductor layer and over source/drain regions. A thermal process diffuses the stressor material ... 03/09/06 - 20060051923 - Method for fabricating field rings A method for fabricating a semiconductor and at least one second semiconductor zone of a semiconductor component having a semiconductor body having a first semiconductor zone. At least one field zone arranged in an edge region of the semiconductor body is reduced in size by means of an etching method. ... 12/15/05 - 20050277255 - Compound semiconductor device and manufacturing method thereof A pad electrode of a high electron mobility transistor is formed solely of a pad metal layer without providing a gate metal layer. A high concentration impurity region is provided below the pad electrode, and the pad electrode is directly contacted to a substrate. Predetermined isolation is ensured by the ... 11/03/05 - 20050245035 - Method for producing low defect density strained -si channel mosfets A silicon strained channel MOSFET device and method for forming the same the method providing improved wafer throughput and low defect density including the steps of providing a silicon substrate; epitaxially growing a first silicon layer using at least one deposition precursor selected from the group consisting of disilane, trisilane, ... 11/03/05 - 20050245034 - Semiconductor device and its manufacturing method A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high voltage resistancehigh blocking voltage and high channel mobility is manufactured by opting the heat treatment method used following the gate oxidation. The method of manufacturing ... 10/27/05 - 20050239255 - Formation of lattice-tuning semiconductor substrates In order to reduce dislocation pile-ups in a virtual substrate, a buffer layer 32 is provided, between an underlying Si substrate 34 and an uppermost constant composition SiGe layer 36, which comprises alternating graded SiGe layers 38 and uniform SiGe layers 40. During the deposition of each of the graded ... 09/08/05 - 20050196925 - Method of forming stress-relaxed sige buffer layer Provided is a method of forming a stress-relaxed SiGe buffer layer on a silicon substrate using a reduced pressure chemical vapor deposition (RPCVD) technique. The method includes: forming a graded composition layer having a predetermined germanium composition gradient on a silicon substrate; forming and thermally annealing a first constant composition ... 06/30/05 - 20050142768 - Controlled faceting of source/drain regions Numerous embodiments of a method for highly selective faceting of the S/D regions in a CMOS device are described. In one embodiment, source/drain regions are formed on a substrate. The source/drain regions are wet etched to form faceted regions. A silicon germanium layer is formed on the faceted regions of ... ### FreshPatents.com Support |