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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Vertical Channel > Gate Electrode In Trench Or Recess In Semiconductor Substrate Gate Electrode In Trench Or Recess In Semiconductor SubstrateGate Electrode In Trench Or Recess In Semiconductor Substrate patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.04/05/07 - 20070077713 - Semiconductor device having recessed gate electrode and method of fabricating the same In a semiconductor device having a recessed gate electrode and a method of fabricating the same, a channel trench is formed in a semiconductor substrate by etching the semiconductor substrate. A first semiconductor layer is formed on the semiconductor substrate that fills the channel trench. A second semiconductor layer is ... 03/29/07 - 20070072375 - Method for manufacturing semiconductor device a method for manufacturing a semiconductor device comprises the steps of forming a gate trench in a semiconductor substrate, forming a gate insulation film in an inner wall of the gate trench, filling a gate electrode material into at least an inside of the gate trench, forming a gate electrode ... 03/15/07 - 20070059887 - Method for producing a trench transistor and trench transistor A method is disclosed for producing a trench transistor which has at least two trenches with in each case a field electrode arranged therein and a gate electrode arranged therein. In the method, it is provided to implement the trenches with different trench widths and then to produce the field ... 02/22/07 - 20070042552 - Method for fabricating a semiconductor device A process for fabricating a power semiconductor device is disclosed. ... 02/22/07 - 20070042551 - Method of manufacturing a trench transistor having a heavy body region A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the ... 02/22/07 - 20070042550 - Method for fabricating a semiconductor structure having selective dopant regions A method for fabricating a semiconductor structure having selective dopant regions in a semiconductor substrate having trenches formed therein I disclosed. In one embodiment, by a dopant source of an auxiliary structure, parts of the semiconductor structure which lie within the trenches are doped by means of a drive-in. In ... 01/25/07 - 20070020857 - Process for forming an electronic device including discontinuous storage elements A process for forming an electronic device can include forming a first trench within a substrate, wherein the trench includes a wall and a bottom and extends from a primary surface of the substrate. The process can also include forming discontinuous storage elements and forming a first gate electrode within ... 01/25/07 - 20070020856 - Process for forming an electronic device including discontinuous storage elements forming a first gate electrode within the trench after forming the discontinuous storage elements. At least one discontinuous storage element lies along the wall of the trench at an elevation between an upper surface of the first gate electrode and a primary surface of the substrate. The process can also ... 11/16/06 - 20060258105 - Mos field plate trench transistor device A MOS field plate trench transistor device is disclosed. In one embodiment, in order to obtain a lowest possible on resistance, in the case of a MOS field plate trench transistor device having a body contact hole, it is proposed to form the avalanche breakdown region preferably in an end ... 09/28/06 - 20060216896 - Semiconductor device and method for manufacturing same The present semiconductor device comprises pillar layers formed on a semiconductor substrate, the pillar layers comprising a first semiconductor pillar layer of a first conductivity type and a second semiconductor pillar layer of a second conductivity type which both have a strip cross section and are alternately formed on the ... 09/28/06 - 20060216895 - Power semiconductor device having buried gate bus and process for fabricating the same A power semiconductor device includes a substrate, a gate oxide layer, a gate bus layer, an inter-layer dielectric layer and a metal bus layer. The substrate has a trench structure therein. The gate oxide layer is formed on surfaces of the substrate and the trench structure. The gate bus layer ... 09/28/06 - 20060216894 - Methods of forming recessed access devices associated with semiconductor constructions The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the ... 08/24/06 - 20060189082 - Standby current reduction over a process window with a trimmable well bias An integrated circuit device including a plurality of MOSFETs of similar type and geometry is formed on a substrate with an ohmic contact, and an adjustable voltage source on the die utilizing clearable fuses is coupled between the ohmic contact and the sources of the MOSFETs. After die processing, a ... 08/17/06 - 20060183286 - Transistor having enlarged contact surface area and manufacturing method therefor In a transistor in which a contact surface area between a contact and a source/drain region is enlarged and a method of manufacturing the same, a lower insulating layer is formed on a substrate. Then, a semiconductor layer is formed on the lower insulating layer and selectively recessed to form ... 08/10/06 - 20060177983 - Method for forming a notched gate Methods for forming notched gates and semiconductor devices utilizing the notched gates are provided. The methods utilize the formation of a dummy gate on a substrate. The dummy gate is etched to form notches in the dummy gate, and sidewall spacers are formed on the sidewalls of the notched dummy ... 08/03/06 - 20060172494 - Method for the production of a semiconductor component To produce such a semiconductor component, at least one trench (2), which completely encompasses at least one part area of the front side and then is filled with an insulation (4) is etched into a silicon substrate (1). In the further course of the method, the entire area of the ... 07/20/06 - 20060160310 - Semiconductor device and method for fabricating the same After forming a first semiconductor region of a first conductivity type in a semiconductor substrate, a trench reaching a given portion of the first semiconductor region is formed in the semiconductor substrate. Then, after forming a gate insulating film on an inner wall of the trench, a second semiconductor region ... 07/06/06 - 20060148178 - Method for producing a vertical transistor The present invention relates to a method for producing a vertical transistor, and to a vertical transistor. A sacrificial gate oxide and a sacrificial gate electrode are used during the production of the vertical transistor to makes it possible to considerably reduce or entirely avoid negative effects that normally result ... 06/29/06 - 20060141712 - Method for manufacturing pmosfet A method for manufacturing a PMOSFET uses a trench-type gate structure only in a PMOSFET region of a peripheral circuit, except for a cell, to overcome the shortcomings of a MOSFET caused by reduction in design rule, realize stable threshold voltage, and improve the characteristics and reliability of a PMOSFET ... 06/22/06 - 20060134867 - Technique for forming the deep doped columns in superjunction A method of manufacturing a semiconductor device is disclosed and starts with a semiconductor substrate having a heavily doped N region at the bottom main surface and having a lightly doped N region at the top main surface. There are a plurality of trenches in the substrate, with each trench ... 05/25/06 - 20060110884 - Method of manufacturing a transistor and a method of forming a memory device A method of manufacturing a transistor. In one embodiment, the method includes forming a gate electrode by defining a gate groove in the substrate. A plate-like portion is defined in each of the isolation trenches at a position adjacent to the groove so that the two plate-like portions will be ... 05/11/06 - 20060099762 - Method for manufacturing mosfet device in peripheral region Disclosed is a method for manufacturing a MOSFET device in a peripheral region capable of avoiding degradation of electrical characteristics of the MOSFET device in the peripheral region. The method stabilizes the characteristics of the MOSFET device in the peripheral region by forming a MOSFET device selectively having a recess ... 03/23/06 - 20060063335 - Semiconductor device A technique for improving a ruggedness of a transistor against breakdown is provided. In a transistor of the present invention, a height of filling regions is higher than that of buried regions, so that a withstanding voltage of the filling regions is higher than that of the buried regions. Therefore, ... 03/02/06 - 20060046397 - Method for manufacturing trench mosfet A method of manufacturing a trench MOSFET with high cell density is disclosed. The method introduces a sidewall oxide spacer for narrowing the opening of the trench structure, thereby decreasing the cell pitch of the memory units. Moreover, the source structure is formed automatically by means of an extra contact ... 03/02/06 - 20060046396 - Wafer holding mechanism A wafer holding mechanism for holding a wafer of the type used in the manufacture of semiconductor devices is herein described. The mechanism has a first plate having a number of offsets that define at least one lip that extends radially inward of the offsets. A second plate is positioned ... 02/16/06 - 20060035434 - Longitudinal misfet manufacturing method, longitudinal misfet, semiconductor storage device manufacturing method, and semiconductor storage device A semiconductor memory device includes a vertical MISFET having a source region, a channel forming region, a drain region, and a gate electrode formed on a sidewall of the channel forming region via a gate insulating film. In manufacturing the semiconductor memory device, the vertical MISFET in which leakage current ... 02/02/06 - 20060024891 - Method of manufacture of a trench-gate semiconductor device A method of making a trench MOSFET includes forming a layer of porous silicon (26) at the bottom of a trench and then oxidizing the layer of porous silicon (26) to form a plug (30) at the bottom of the trench. This forms a thick oxide plug at the bottom ... 01/26/06 - 20060019448 - Termination for trench mis device having implanted drain-drift region A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. Preferably, the drain-drift region is formed at least in ... 01/26/06 - 20060019447 - Process for the self-aligning production of a transistor with a u-shaped gate The present invention provides a process for producing a gate element for a transistor, in which a substrate (101) is provided, an insulation layer (104) and a sacrificial layer (105) are deposited on the substrate (101), the sacrificial layer (105) is patterned and a spacing layer (107) is deposited on ... 01/19/06 - 20060014349 - Planarized and silicided trench contact Power MOSFETs and fabrication processes for power MOSFETs use a continuous conductive gate structure within trenches to avoid problems arising from device topology caused when a gate bus extends above a substrate surface. The gate bus trench and/or gate structures in the device trenches can contain a metal/silicide to reduce ... 01/12/06 - 20060008994 - Semiconductor device and method of manufacturing the same A semiconductor device and a method of manufacturing the same is disclosed. A trench is formed in an active region of a semiconductor substrate. A doped layer is formed on the inner walls of the trench. The trench is filled up with a first semiconductor layer. A gate insulating layer ... 12/29/05 - 20050287744 - Semiconductor device A semiconductor device has a plurality of pillars formed by filling a poly-silicon via an insulating layer in a plurality of trenches arranged substantially in parallel at certain intervals, n+-semiconductor regions and p+-semiconductor regions which are formed between partial pillars among the plurality of pillars and alternately formed along a ... 12/01/05 - 20050266642 - Semiconductor device and a method of fabricating the same A power MOSFET comprises: a semiconductor substrate 21 of a first conduction type; a drain layer 22 of the first conduction type and formed on a surface layer of the substrate; a gate insulating film 25 formed in a partial region on the drain layer 22; a gate electrode 26 ... 12/01/05 - 20050266641 - Method of forming films in a trench A method of forming films in a trench is applied to the manufacturing process of a power MOS device. In one embodiment, the method comprises providing a semiconductor substrate, forming a trench in the semiconductor substrate, forming a first dielectric layer on sidewalls of the trench, forming a second dielectric ... 11/10/05 - 20050250284 - Method for fabricating semiconductor device with recessed channel region Disclosed is a method for fabricating a semiconductor device with a plurality of recessed channel regions. This method includes the steps of: forming a plurality of device isolation layers in a substrate; forming a hard mask nitride layer, a hard mask oxide layer and a hard mask polysilicon layer on ... 10/27/05 - 20050239254 - Quasi-plannar and finfet-like transistors on bulk silicon The types of quasi-planar CMOS and FinFET-like transistor devices on a bulk silicon substrate are disclosed. A first device has a doped and recessed channel formed in a shallow trench sidewall. A second device has a doped, recessed channel and has a plurality of edge-fins juxtaposed on an edge of ... 10/27/05 - 20050239253 - Integrated circuit structure with improved ldmos design A semiconductor integrated circuit including an LDMOS device structure comprises a semiconductor layer with a pair of spaced-apart field effect gate structures over an upper surface of the semiconductor layer. First and second spaced-apart source regions of a first conductivity type are formed in a portion of the layer between ... 09/29/05 - 20050215013 - Trench semiconductor device having gate oxide layer with mulitiple thicknesses and processes of fabricating the same The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the trench. Several processes for manufacturing such devices are described. In one group of processes ... 09/29/05 - 20050215012 - Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the trench. Several processes for manufacturing such devices are described. In one group of processes ... 09/29/05 - 20050215011 - Termination for trench mis device having implanted drain-drift region A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. Preferably, the drain-drift region is formed at least in ... 09/22/05 - 20050208724 - Trench power mosfet fabrication using inside/outside spacers A fabrication process for a trench type power semiconductor device includes forming inside spacers over a semiconductor surface. Using the spacers as masks, trenches with gates are formed in the semiconductor body. After removing the spacers, source implants are formed in the semiconductor body along the trench edges and are ... 09/15/05 - 20050202637 - Recessed termination for trench schottky device without junction curvature A trench type Schottky device has a guard ring diffusion of constant depth between the outermost of an active trench and an outer surrounding termination trench. The junction curvature of the guard ring diffusion is suppressed or cut out by the trenches. ... 09/01/05 - 20050191810 - Semiconductor device and method of manufacturing the same There is provided a semiconductor device comprising a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type formed on the first semiconductor layer, the second conductivity type being different from the first conductivity type, a third semiconductor layer of the first conductivity ... 08/25/05 - 20050186740 - Vertical transistor structure for use in semiconductor device and method of forming the same According to some embodiments, a structure of vertical transistor includes gate electrodes distanced by a predetermined interval in an active region, formed in a vertical shape to have a predetermined depth from a top surface of a semiconductor substrate. A gate insulation layer is formed between one side wall of ... 08/18/05 - 20050181564 - Method for manufacturing a superjunction device with wide mesas A method of manufacturing a semiconductor device includes providing semiconductor substrate having trenches and mesas. At least one mesa has first and second sidewalls. The method includes angularly implanting a dopant of a second conductivity into the first sidewall, and angularly implanting a dopant of a second conductivity into the ... 08/04/05 - 20050170587 - Power mosfet semiconductor device and method of manufacturing the same A semiconductor device includes a semiconductor substrate of a first conductivity type, on which a semiconductor layer having a trench extending in the depth direction toward the semiconductor substrate is formed. A first region of the first conductivity type is formed in the depth direction along one side of the ... 07/28/05 - 20050164455 - Method of manufacturing a semiconductor device In a method of manufacturing a semiconductor device including independent gate patterns separated from each other, an active region is defined by forming a field region on a substrate. A gate oxide layer and a polysilicon layer are formed on the substrate. A preliminary gate pattern is formed by partially ... 06/09/05 - 20050124118 - Structure and method of fabricating a transistor having a trench gate An integrated circuit transistor is fabricated with a trench gate having nonconductive sidewalls. The transistor is surrounded by an isolation trench filled with a nonconductive material. The sidewalls of the gate trench are formed of the nonconductive material and are substantially free of unetched substrate material. As a result, the ... ### FreshPatents.com Support |