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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Having Additional Gate Electrode Surrounded By Dielectric (i.e., Floating Gate) > Tunneling Insulator Tunneling InsulatorTunneling Insulator patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.04/12/07 - 20070082447 - Apparatus and method for a non-volatile memory structure comprising a multi-layer silicon-rich, silicon nitride trapping layer A non-volatile memory structure comprises a trapping layer that includes a plurality of silicon-rich, silicon nitride layers. Each of the plurality of silicon-rich, silicon nitride layers can trap charge and thereby increase the density of memory structures formed using the methods described herein. In one aspect, the plurality of silicon-rich, ... 04/12/07 - 20070082446 - Methods for fabricating non-volatile memory cell array A method is provided for fabricating stacked non-volatile memory cells. A semiconductor wafer is provided having a plurality of diffusion regions forming buried bit lines. A charge-trapping layer and a conductive layer are deposited on the surface of the semiconductor wafer. Using a mask layer on top of the conductive ... 03/15/07 - 20070059884 - Method of manufacturing flash memory device The invention provides a method of manufacturing a flash memory device. Nitride film spacers are formed on sidewalls of protruded isolation films. A recess is formed in a semiconductor substrate by a self-aligned etch process using the nitride film spacers as masks. It is therefore possible to form a uniform ... 02/08/07 - 20070032017 - Nonvolatile memory devices and methods of fabricating the same Methods of fabricating a nonvolatile memory device include forming a trench mask pattern on a semiconductor substrate including a first region and a second region. Substrate trenches defining active regions are formed in the semiconductor substrate in the first region and the second region using the trench mask pattern as ... 02/01/07 - 20070026612 - Method of fabricating flash memory device having self-aligned floating gate A method of fabricating a flash memory device having a self-aligned floating gate (SAFG) wherein a floating gate is formed by a SAFG process. After a dielectric layer is formed, the dielectric layer of a test pattern region is stripped and a control gate is formed so that the control ... 01/04/07 - 20070004148 - Multi-level cell of flash memory device An embodiment of the present invention relates to a flash memory device with an improved data retention characteristic. A height of a floating gate is set lower than that of the conventional floating gate, or an overlap width between the floating gate and isolation structures is set narrower than those ... 12/28/06 - 20060292802 - Semiconductor device and method for forming the same There are provided a memory transistor having a select transistor with asymmetric gate electrode structure and an inverted T-shaped floating gates and a method for forming the same. A gate electrode of the select transistor adjacent to a memory transistor has substantially an inverted T-shaped figure, whereas the gate electrode ... 12/14/06 - 20060281262 - Integrated semiconductor nonvolatile storage device An object of the present invention is to provide an integrated semiconductor nonvolatile storage device that can be read at high speed and reprogrammed an increased number of times. In the case of conventional nonvolatile semiconductor storage devices having a split-gate structure, there is a tradeoff between the read current ... 12/14/06 - 20060281261 - Method of manufacturing a floating gate of a flash memory device A method of forming a floating gate of a flash memory device wherein a hard mask nitride film is stripped using two or more etching steps. Accordingly, a seam can be prevented when depositing a floating gate polysilicon film. Furthermore, the floating gate polysilicon film may be blanket-etched to make ... 12/14/06 - 20060281260 - Methods of operating p-channel non-volatile memory devices Methods of operating non-volatile memory devices are described. The memory devices comprise memory cells having an n-type semiconductor substrate and p-type source and drain regions disposed below a surface of the substrate and separated by a channel region. A tunneling dielectric layer is disposed above the channel region. A charge ... 12/14/06 - 20060281259 - Semiconductor device and method of fabricating the same A semiconductor device includes a substrate having a pair of first diffused regions, and a gate including an oxide film provided on the substrate, and a charge storage layer provided on the oxide film, the charge storage layer being an electrical insulator capable of storing charges in bit areas. The ... 12/14/06 - 20060281258 - Magnetic tunnel junction device and writing/reading method for said device The device successively comprises a first electrode (12), a magnetic reference layer (1), a tunnel barrier (3), a magnetic storage layer (4) and a second electrode (13). At least one first thermal barrier is arranged between the storage layer (4) and the second electrode (13) and is formed by a ... 12/07/06 - 20060275987 - Method of forming stack layer and method of manufacturing electronic device having the same A method of forming a stacked structure in an electronic device, where a photoresist for performing multi-patterning processes is used. Also, a method of manufacturing a FED in which different structures can be multi-patterned by using a single photoresist mask. The photoresist has a solubility to a solvent by heat-treatment ... 11/16/06 - 20060258102 - Flash memory device and method of fabricating the same A flash memory device includes control gates that are formed to completely surround the top and sides of floating gates. The control gates are located between the floating gates that are adjacent in the word line direction as well as the floating gates that are adjacent in the bit line ... 11/09/06 - 20060252209 - Semiconductor memory integrated circuit and its manufacturing method A method of manufacturing a semiconductor memory integrated circuit intended to improve properties and reliability of its peripheral circuit includes the step of forming a tunnel oxide film (21a) in the cell array region, gate oxide film (21b) for a high-voltage circuit and gate oxide film (21c) for a low-voltage ... 10/19/06 - 20060234453 - Non-volatile memory and fabrication method thereof A non-volatile memory cell is provided. The non-volatile memory includes a substrate, a gate stacked layer, an isolation layer and a conductive layer. The gate stacked layer includes a tunneling layer, a charge trapping layer, a barrier layer and a control gate layer sequentially stacked over the substrate, and the ... 09/28/06 - 20060216893 - Manufacturing method of a flash memory cell A manufacturing method of a flash memory cell is provided. The flash memory cell includes a first conductive type substrate, a stacked gate structure, a first conductive type source/drain region, a metal silicide layer, an inter-layer dielectric layer and a contact plug. The first conductive type substrate has a second ... 09/21/06 - 20060211205 - Method of manufacturing a memory device having improved erasing characteristics In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide layer on a semiconductor substrate; annealing the semiconductor substrate including the tunneling oxide layer, the charge storing layer, and the blocking ... 09/07/06 - 20060199337 - Thin film transistor A thin film transistor includes a substrate, a polysilicon layer, a patterned gate dielectric layer, a gate layer, a channel region, a source region, a drain region, and a LDD region. The polysilicon layer is positioned over the substrate. The patterned gate dielectric layer is positioned over the polysilicon layer. ... 07/13/06 - 20060154420 - Method of manufacturing flash memory device Provided is a method of manufacturing a flash memory device. In accordance with the present invention, an undoped polysilicon layer is formed over a semiconductor substrate where a floating gate and a dielectric layer are formed. By performing N2 plasma process with respect to the undoped polysilicon layer, a heavily ... 07/06/06 - 20060148176 - Method of manufacturing a gate in a flash memory device A method of manufacturing a gate in a flash memory device. The method includes forming a stacking structure including a tunnel oxide layer, a floating gate, a dielectric layer, and a control gate on a semiconductor substrate. The further includes removing a remaining portion of the tunnel oxide layer exposed ... 07/06/06 - 20060148175 - Method of manufacturing a flash memory device A method of manufacturing a semiconductor device includes forming a polysilicon layer on a trench isolation layer and a tunnel oxide layer formed on a semiconductor substrate, and doping the polysilicon layer with germanium or argon. The doped polysilicon layer is patterned to form a floating gate electrode layer pattern. ... 06/29/06 - 20060141711 - Method of manufacturing flash memory device The present invention relates to a method of manufacturing flash memory devices. According to the present invention, an inter-gate insulating film formed between a floating gate and a control gate is formed to have an NONON structure, thus removing the interface of polysilicon and an oxide film. It is thus ... 06/08/06 - 20060121675 - Nonvolatile memory device and method of manufacturing the same A nonvolatile memory device is provided which includes a floating gate having a lower portion formed in a trench defined in a surface of a substrate and an upper portion protruding above the surface of the substrate from the lower portion. A gate insulating layer is formed along an inner ... 04/27/06 - 20060088965 - Method of fabricating flash memory device A method of fabricating a flash memory device is disclosed where a trench formation process and a wall oxide film formation process are performed separately depending on a pattern density, and wall oxide films are formed with different thicknesses. Accordingly, an increase in a thickness of the wall oxide films ... 04/13/06 - 20060079054 - Non-volatile memory device and methods of forming the same A non-volatile memory device includes a control gate electrode disposed on a substrate with a first insulation layer interposed therebetween and a floating gate disposed in a hole exposing substrate through the control gate electrode and the first insulation layer. A second insulation layer is interposed between the floating gate ... 01/12/06 - 20060008992 - Semiconductor integrated circuit device and a method of manufacturing the same The memory cell transistor includes, in a first well region, a pair of memory electrodes, one of which serves as source electrode and the other serves as drain electrode and a channel region interposed between the pair of memory electrodes. There is, on a channel region, a first gate electrode ... 01/05/06 - 20060003531 - Non-volatile memory and method of manufacturing floating gate A method of manufacturing a floating gate is provided. The method includes the steps of forming a tunneling layer on a substrate, and forming a film layer containing a semiconductor component on the tunneling layer. The film layer consists of a semiconductor film or nano-dots. ... 11/17/05 - 20050255654 - Methods of forming non-volatile memory devices having floating gate electrodes Methods of forming non-volatile memory devices include the steps of forming a semiconductor substrate having first and second floating gate electrodes thereon and an electrically insulating region extending between the first and second floating gate electrodes. A step is then performed to etch back the electrically insulating region to expose ... 10/20/05 - 20050233524 - Method for manufacturing flash memory device and flash memory device The present invention relates to a method for manufacturing a flash memory device and a flash memory device manufactured by the same. In the present invention, an annealing process of a tunnel insulating film is performed at a relatively low temperature to optimize the threshold voltage of a NHVN transistor. ... 10/20/05 - 20050233523 - Method of manufacturing non-volatile memory cell A method of manufacturing a non-volatile memory cell includes forming a first dielectric layer on a substrate. A second dielectric layer having a trench is formed on the first dielectric layer. Thereafter, a pair of charge storage spacers is formed on sidewalls of the trench. A third dielectric layer is ... 09/15/05 - 20050202633 - Method of manufacturing nonvolatile memory cell The present invention relates to a method of manufacturing a nonvolatile memory cell. The present invention uses tungsten (W) as an upper layer of a control gate electrode in order to integrate the memory cell and performs an ion implantation process for forming a source region and a drain region ... 06/30/05 - 20050142765 - Method for manufacturing flash memory device The present invention relates to a method for manufacturing a flash memory device. A polysilicon layer for a floating gate has a stack structure of a doped polysilicon layer and an undoped polysilicon layer, whereby the polysilicon layer is prevented from being oxidized at the interface of the polysilicon layer ... 06/30/05 - 20050142764 - Method for manufacturing semiconductor device The present invention discloses a method for manufacturing a semiconductor device which forms a thick gate oxide film in a high voltage region and a thin tunnel oxide film in a cell region. The method for manufacturing the semiconductor device reduces a process time and improves uniformity of the gate ... 06/16/05 - 20050130376 - Method for manufacturing flash device The present invention relates to a method for manufacturing a flash device. After a gate electrode for a flash device is formed, an EFH of an isolation film is reduced through a predetermined etch process. It is therefore possible to reduce the step of a barrier film for protecting an ... ### FreshPatents.com Support |