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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Complementary Insulated Gate Field Effect Transistors (i.e., Cmos) > Including Isolation Structure > Dielectric Isolation Formed By Grooving And Refilling With Dielectric Material > Having Well Structure Of Opposite Conductivity Type Having Well Structure Of Opposite Conductivity TypeHaving Well Structure Of Opposite Conductivity Type patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.11/16/06 - 20060258079 - Thin film phase-change memory A memory cell comprises a chalcogenide random access memory (CRAM) cell and a CMOS circuit. The CMOS circuit accesses the CRAM cell. The CRAM cell has a cross-sectional area that is determined by a thin film process (e.g., a chalcogenide deposition thin film process) and by an iso-etching process. If ... 09/14/06 - 20060205138 - Method to selectively form sige p type electrode and polysilicon n type electrode through planarization A method for forming selective P type and N type gates is described. A first gate oxide layer is grown overlying a semiconductor substrate. A polysilicon layer is deposited overlying the first gate oxide layer. The polysilicon layer is patterned to form first NMOS gates. A second gate oxide layer ... 02/23/06 - 20060040441 - Method of forming an integrated circuit employable with a power converter A method of forming an integrated circuit employable with a power converter. In one embodiment, the method of forming the integrated circuit includes forming a transistor employable as a switch of a power train of the power converter by forming a gate over a semiconductor substrate. The method of forming ... ### FreshPatents.com Support |