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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Complementary Insulated Gate Field Effect Transistors (i.e., Cmos) > Including Isolation Structure > Dielectric Isolation Formed By Grooving And Refilling With Dielectric Material > With Epitaxial Semiconductor Layer Formation With Epitaxial Semiconductor Layer FormationWith Epitaxial Semiconductor Layer Formation patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.02/15/07 - 20070037341 - Method and structure for shallow trench isolation during integrated circuit device manufacture A method suitable for use during fabrication of a semiconductor device such as a dynamic random access memory or a flash programmable read-only memory comprises etching through silicon nitride and pad oxide layers and into a semiconductor wafer to form a trench into the wafer. A shallow trench isolation (STI) ... 07/13/06 - 20060154414 - Sensor for detecting compounds A chemical sensor having a sol-gel material affixable to a predetermined surface, and an indicator within the sol-gel, for detecting and signaling the presence of at least one chemical is provided. Also provided is an indicator for detecting and indicating a presence of at least one chemical. The indicator includes ... 07/06/06 - 20060148166 - Assembly comprising functional devices and method of making same Methods and apparatuses for an electronic assembly. A material is selectively printed on a web substrate at one or more selected areas. The web substrate includes a plurality of functional components having integrated circuits. A local printing system equipped with a print head that dispenses the selected material is used ... 07/06/06 - 20060148165 - Crystallization apparatus and method of amorphous silicon A silicon crystallization system includes a beam generator generating a laser beam, first and second optical units for controlling the laser beam from the beam generator; and a stage for mounting a panel including an amorphous silicon layer to be polycrystallized by the laser beam from the optical units. The ... 06/29/06 - 20060141694 - Semiconductor device and method for fabricating the same A semiconductor device and a method for fabricating the same are provided. The method includes: forming a plurality of protruded patterns smaller than gate structures by selectively removing predetermined portions of a substrate; and forming the gate structures over the protruded patterns. The semiconductor device includes: a plurality of protruded ... 06/29/06 - 20060141693 - Semiconductor multilayer interconnection forming method In a method for forming a wiring using a dual damascene process in which a multilayer wiring structure is formed by embedding a first etching space formed in an interlayer insulating layer and a second etching space which communicates thereto with a conductor material, a number of steps may be ... 06/22/06 - 20060134851 - Method of forming a semiconductor laser chip having a marker A method of manufacturing a semiconductor laser chip has following steps. First, a semiconductor substrate including an active layer and a block layer is provided. An electrode line pattern and a marker are formed on the semiconductor substrate. The semiconductor substrate is etched to form a W channel. Then, an ... 05/11/06 - 20060099759 - Pattern formation method and pattern formation apparatus, method for manufacturing device, electro-optical device, electronic device, and method for manufacturing active matrix substrate A pattern formation method for forming a film pattern upon a substrate, including the steps of: forming banks in a predetermined pattern upon the substrate; disposing liquid drops of a functional liquid at the end portions of groove portions which are defined between the banks; and after having disposed the ... 05/11/06 - 20060099758 - Iridium oxide nanotubes and method for forming same A method is provided for forming iridium oxide (IrOx) nanotubes. The method comprises: providing a substrate; introducing a (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor; introducing oxygen as a precursor reaction gas; establishing a final pressure in the range of 1 to 50 Torr; establishing a substrate, or chamber temperature in the range of 200 ... 04/13/06 - 20060079048 - Method of making prestructure for mems systems A method of making an interferometric modulator element includes forming at least two posts, such as posts formed from spin-on glass, on a substrate. In alternate embodiments, the posts may be formed after certain layers of the modulator element have been deposited on the substrate. An interferometric modulator element includes ... 03/23/06 - 20060063323 - High-speed rfid circuit placement method and device A high-speed process includes removing chips or interposers from a carrier web having a first pitch and transferring the chips or interposers to electrical components, such as RFID antenna structures, on a moving web having a second pitch. According to one method, a transfer drum transfers chips or interposers to ... 02/02/06 - 20060024880 - System and method for micro-electromechanical operation of an interferometric modulator An interferometric modulator is formed by a stationary layer and a mirror facing the stationary layer. The mirror is movable between the undriven and driven positions. Landing pads, bumps or spring clips are formed on at least one of the stationary layer and the mirror. The landing pads, bumps or ... 01/26/06 - 20060019441 - Process for fabricating non-volatile memory by tilt-angle ion implantation A process for fabricating non-volatile memory by tilt-angle ion implantation comprises essentially the steps of implanting sideling within a nitride dielectric layer heterogeneous elements such as, for example, Ge, Si, N2, O2, and the like, for forming traps capable of capturing more electrons within the nitride dielectric layer such that ... 01/19/06 - 20060014341 - Method for fabricating a gate mask of a semiconductor device A nitride layer of the gate mask for the semiconductor device is deposited at a temperature higher than 750 deg. C. so as to release hydrogen from the nitride layer. Alternatively, a nitride layer of the gate mask for the semiconductor device is deposited in a gas atmosphere with use ... 01/12/06 - 20060008972 - Method of forming trench isolation in the fabrication of integrated circuitry This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry includes flowing ... 01/05/06 - 20060003520 - Method for forming semiconductor device with modified channel compressive stress A method for forming a semiconductor device provides for forming a gate region on top of a substrate. Gate sidewall liners are formed on opposed sides of the gate region, the sidewall liners having a vertical part contacting sidewalls of the gate region and a horizontal part contacting the substrate. ... 01/05/06 - 20060003519 - Method for fabricating cmos image sensor A method for fabricating a CMOS image sensor is disclosed, to decrease a dark current, which includes the steps of forming a photodiode area in a semiconductor substrate; forming a plurality of gates including a first gate on the semiconductor substrate, wherein the first gate has one side aligned to ... 01/05/06 - 20060003518 - Method for fabricating field-effect transistor structures with gate electrodes with a metal layer Provided is a method for fabricating gate electrode structures each having at least one individual polysilicon layer and a metal layer. A polysilicon layer is provided and patterned prior to the application of the gate metal. Trenches between the resulting gate structures are filled, and the polysilicon is drawn back ... 12/29/05 - 20050287733 - Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry are described. In one embodiment, active areas are formed over a substrate, with one of the active areas having a width of less than one micron, and with some of ... 12/22/05 - 20050282331 - Substrate and method of forming substrate for fluid ejection device A method of forming an opening through a substrate having a first side and a second side opposite the first side includes forming spaced etch stops in the first side of the substrate, etching into the substrate from the second side toward the first side to the spaced etch stops, ... 12/22/05 - 20050282330 - Method for making a semiconductor device including a superlattice having at least one group of substantially undoped layers A method for making a semiconductor device may include forming a superlattice including a plurality of stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer ... 12/15/05 - 20050277245 - Method for forming bump on electrode pad with use of double-layered film A process for forming bumps on electrode pads for a wiring board including a substrate and a plurality of electrode pads. The process (a) forms a laminated two-layer film on the wiring board and forms a pattern of apertures at positions corresponding to the electrode pads, the laminated two-layer film ... 12/08/05 - 20050272197 - Semiconductor device A semiconductor device having a dynamically-reconfigurable circuit mounted thereon for maintaining software compatibility independently of the arrangement of the dynamically-reconfigurable circuit is provided. Simultaneously with execution of software, the semiconductor device automatically generates data for reconfiguring the dynamically-reconfigurable circuit and driver software for operating the dynamic circuit, and replaces an ... 10/13/05 - 20050227429 - Electronic component mounting method and apparatus and ultrasondic bonding head A component mounting apparatus includes a component feeder (20) that feeds a component (2) with its bump electrodes facing down, a mounting head (5) that mounts the component onto a substrate (3), a supporting base (8) that secures the substrate, and a positioning device (6, 7) that aligns the component ... 10/13/05 - 20050227428 - Process for manufacturing mems The invention concerns a process for manufacturing a Micro-Electro-Mechanical-System (MEMS) comprising the use of a sacrificial layer, the process being characterized by the fact that the sacrificial layer is made of silicon. The invention also concerns MEMS devices such as SG-MOSEFT, MEMS switches or MEMS tunable capacitors which may be ... 09/29/05 - 20050215002 - Method of forming select lines for nand memory devices Methods and apparatus are provided. A NAND memory array has a select line coupled to each of a plurality of NAND strings of memory cells of the memory array. The select line has a select gate at each intersection of one of the plurality of NAND strings and the select ... 07/14/05 - 20050153504 - Method for manufacturing nonvolatile semiconductor memory device In a manufacturing method of a nonvolatile semiconductor memory device including a variable resistive element having a variable resistor made of a perovskite-type metal oxide film, the variable resistor is formed at a temperature which is lower than the melting point of a metal wire layer that has been formed ... ### FreshPatents.com Support |