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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Complementary Insulated Gate Field Effect Transistors (i.e., Cmos) > Gate Insulator Structure Constructed Of Diverse Dielectrics (e.g., Mnos, Etc.) Or Of Nonsilicon Compound Gate Insulator Structure Constructed Of Diverse Dielectrics (e.g., Mnos, Etc.) Or Of Nonsilicon CompoundGate Insulator Structure Constructed Of Diverse Dielectrics (e.g., Mnos, Etc.) Or Of Nonsilicon Compound patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/22/07 - 20070066008 - Method of fabricating non-volatile memory A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the ... 03/22/07 - 20070066007 - Method to obtain fully silicided gate electrodes The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises depositing a protective layer (510) over a spacer material (415) located over gate electrodes (250) and a doped region (255) located between the gate electrodes (250), removing a portion of the spacer material ... 03/01/07 - 20070048926 - Lanthanum aluminum oxynitride dielectric films Electronic apparatus and methods of forming the electronic apparatus include a lanthanum aluminum oxynitride film on a substrate for use in a variety of electronic systems. The lanthanum aluminum oxynitride film may be structured as one or more monolayers. The lanthanum aluminum oxynitride film may be formed by atomic layer ... 01/25/07 - 20070020841 - Method of manufacturing gate structure and method of manufacturing semiconductor device including the same In a method for manufacturing a semiconductor device, a silicon oxide layer is formed on a substrate. The silicon oxide layer is treated with a solution comprising ozone. Then, a conductive layer is formed on the silicon oxide layer treated with the solution. ... 12/07/06 - 20060275977 - Selective implementation of barrier layers to achieve threshold voltage control in cmos device fabrication with high k dielectrics A method of forming a CMOS structure, and the device produced therefrom, having improved threshold voltage and flatband voltage stability. The inventive method includes the steps of providing a semiconductor substrate having an nFET region and a pFET region; forming a dielectric stack atop the semiconductor substrate comprising an insulating ... 12/07/06 - 20060275976 - Non-volatile memory and fabrication method thereof A fabrication method for a non-volatile memory is provided. To fabricate the non-volatile memory, a plurality of first trenches and second trenches are formed in a substrate, wherein the second trenches are disposed above the first trenches and cross over the first trenches. Then, a tunneling layer and a charge ... 12/07/06 - 20060275975 - Nitridated gate dielectric layer A metal-oxide-semiconductor field-effect transistors (MOSFET) with a gate structure having a deuterated layer is provided. In accordance with embodiments of the present invention, a transistor comprises the deuterated layer formed over a gate dielectric layer. A gate electrode is formed over the deuterated layer. The deuterated layer prevents or reduces ... 11/23/06 - 20060263965 - Methods of fabricating integrated circuitry The invention includes methods of fabricating integrated circuitry and semiconductor processing polymer residue removing solutions. In one implementation, a method of fabricating integrated circuitry includes forming a conductive metal line over a semiconductor substrate. The conductive line is exposed to a solution comprising an inorganic acid, hydrogen peroxide and a ... 11/16/06 - 20060258078 - Atomic layer deposition of high-k metal oxides The present invention relates to the atomic layer deposition (“ALD”) of high k dielectric layers of metal oxides containing Group 4 metals, including hafnium oxide, zirconium oxide, and titanium oxide. More particularly, the present invention relates to the ALD formation of Group 4 metal oxide films using an metal alkyl ... 11/02/06 - 20060246651 - Semiconductor cmos devices and methods with nmos high-k dielectric present in core region that mitigate damage to dielectric materials The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. An I/O dielectric layer is formed in core and I/O regions of a semiconductor device (506). The I/O dielectric layer is removed (508) from the core region of the device. ... 10/26/06 - 20060240612 - Non-volatile memory devices with charge storage insulators and methods of fabricating such devices A non-volatile memory device comprises a cell region defined at a substrate and a plurality of device isolation layers formed in the cell region to define a plurality of active regions. A charge storage insulator covers substantially the entire top surface of the cell region. A plurality of gate lines ... 10/19/06 - 20060234436 - Method of forming a semiconductor device having a high-k dielectric A metal oxide is formed over a high quality oxide which has been deposited over a substrate. An anneal drives a reaction to form a metal oxysilicon nitride layer which is then used as a part of a gate stack. The novel integration scheme allows for improved scalablity of devices ... 09/07/06 - 20060199327 - Method for manufacturing semiconductor elemental device A base substrate is first prepared, and a high dielectric amorphous film composed of a high permittivity material is formed over the base substrate. Next, an amorphous silicon film is formed over the high dielectric amorphous film with an amorphization temperature of the high permittivity material as a deposition temperature. ... 08/24/06 - 20060189065 - Method of manufacturing metal-oxide-semiconductor transistor A method of manufacturing a metal-oxide-semiconductor transistor is provided. A substrate having a gate structure thereon is provided. A source/drain extension region is formed in the substrate on each side of the gate structure. Thereafter, a carbon-containing material layer is formed over the substrate and then the carbon-containing material layer ... 07/27/06 - 20060166430 - Conductive memory stack with non-uniform width A conductive memory stack is provided. The memory stack includes a bottom electrode, a top electrode and a multi-resistive state element that is sandwiched between the electrodes. The bottom electrode can be described as having a top face with a first surface area, the top electrode has a bottom face ... 07/06/06 - 20060148164 - Method of fabricating fin field-effect transistors A method of fabricating a fin field-effect transistor that may enable a reduction in the number of process steps, by forming the fin structure by etching away a predetermined thickness of an element isolation layer. The method includes steps of sequentially forming a first insulating layer and a second insulating ... 07/06/06 - 20060148163 - Method of forming gate insulation layers of different characteristics The present invention describes a method for forming different types of gate insulation layers, wherein the formation of one type of gate insulation layer is highly decoupled from the formation of the other type of gate insulation layer. Thus, in some embodiments, critical oxidation processes may finely be tuned on ... 06/22/06 - 20060134849 - Methods of manufacturing a thin film including zirconium titanium oxide and methods of manufacturing a gate structure, a capacitor and a flash memory device including the same A method of forming a thin film including zirconium titanium oxide including introducing a reactant including a mixture of a zirconium precursor and a titanium precursor onto a substrate, and introducing an oxidizing agent onto the substrate to form a solid material including zirconium titanium oxide on the substrate is ... 06/22/06 - 20060134848 - Method of manufacturing a semiconductor device with mos transistors comprising gate electrodes formed in a packet of metal layers deposited upon one another Method of manufacturing a semiconductor device comprising MOS transistors having gate electrodes (15, 16) formed in a number of metal layers (8, 9, 13; 8, 12, 13) deposited upon one another. In this method, active silicon regions (4, 5) provided with a layer of a gate dielectric (7) and field-isolation ... 06/15/06 - 20060128091 - Device having enhanced stress state and related methods The present invention provides a semiconductor device having dual nitride liners, which provide an increased transverse stress state for at least one FET and methods for the manufacture of such a device. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device ... 06/08/06 - 20060121668 - Method for making a semiconductor device having a high-k gate dielectric and a titanium carbide gate electrode A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected temperature. The reactor is operated for a sufficient time, and pulse times ... 04/20/06 - 20060084220 - Differentially nitrided gate dielectrics in cmos fabrication process A semiconductor fabrication process includes forming a first plasma nitrided oxide (PNO) gate dielectric overlying a first region of a semiconductor substrate. A second PNO gate dielectric is formed overlying a second region of the substrate. The nitrogen concentration of the second PNO differs from the nitrogen concentration of the ... 03/23/06 - 20060063322 - Transistor with high dielectric constant gate and method for forming the same A semiconductor device provides a gate structure that includes a conductive portion and a high-k dielectric material formed beneath and along sides of the conductive material. An additional gate dielectric material such as a gate oxide may be used in addition to the high-k dielectric material. The method for forming ... 03/09/06 - 20060051915 - Semiconductor device and manufacturing method thereof A structure of a MIS transistor for realizing a CMOS circuit capable of simultaneously achieving the high ON current and the low power consumption is provided. Each of the gate insulators of an n channel MIS transistor and a p channel MIS transistor is composed of a hafnium oxide (HfO2) ... 03/02/06 - 20060046375 - Isfets fabrication method Methods for fabricating ion sensitive field effect transistors (ISFETs) with SnO2 extended gates. A SnO2 detection film is formed on a substrate by sol-gel technology to serve as an extended gate. The SnO2 detection film is electrically connected to a conductive wire, and an insulating layer is formed on the ... 02/02/06 - 20060024879 - Selectively strained mosfets to improve drive current A MOSFET device pair with improved drive current and a method for producing the same to selectively introduce strain into a respective N-type and P-type MOSFET device channel region, the method including forming a compressive stressed nitride layer on over the P-type MOSFET device and a tensile stressed nitride layer ... 01/12/06 - 20060008969 - Method of forming dielectric film A method of forming a dielectric film by an organic metal CVD method, comprising the step of supplying an organic metal compound into a treating container having a substrate to be treated held therein to form the dielectric film on the substrate, wherein the dielectric film forming step comprises the ... 01/05/06 - 20060003517 - Atomic layer deposited zr-sn-ti-o films using tii4 A dielectric film containing Zr—Sn—Ti—O formed by atomic layer deposition using a TiI4 precursor and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Depositing titanium and oxygen onto a substrate surface by atomic layer deposition ... 12/22/05 - 20050282329 - Cmos transistors with dual high-k gate dielectric and methods of manufacture thereof CMOS devices with transistors having different gate dielectric materials and methods of manufacture thereof are disclosed. A CMOS device is formed on a workpiece having a first region and a second region. A first gate dielectric material is deposited over the second region. A first gate material is deposited over ... 12/08/05 - 20050272196 - Method of depositing a higher permittivity dielectric film A method of depositing a high permittivity dielectric film on a doped silicon or silicon compound layer of a wafer. The method includes a first step of nitriding a specific element (A) such as hafnium Hf to form a nitride film (AxNy) on the silicon layer, wherein the specific element ... 12/01/05 - 20050266631 - Semiconductor device fabricating method Compression stress applying portions 20 of SiGe film are formed in the source/drain regions of the p-MOSA region 30a. Then, impurities are implanted in the p-MOS region 30a and the n-MOS region 30b to form shallow junction regions 22a, 22b and deep junction regions 23a, 23b. The impurity in the ... 11/17/05 - 20050255647 - Vertical nrom having a storage density of 1 bit per 1f2 The multiple bit, vertical memory cell includes a vertical metal oxide semiconductor field effect transistor (MOSFET) extending horizontally outward from a substrate. The MOSFET has a first source/drain region, a second source/drain region, a channel region between the first and the second source/drain regions, and a gate separated from the ... 11/10/05 - 20050250279 - Methods of forming semiconductor devices having buried oxide patterns and devices related thereto Methods for forming semiconductor devices are provided. A semiconductor substrate is etched such that the semiconductor substrate defines a trench and a preliminary active pattern. The trench has a floor and a sidewall. An insulating layer is provided on the floor and the sidewall of the trench and a spacer ... 07/28/05 - 20050164442 - Method of manufacturing a nonvolatile semiconductor memory device An AND flash memory of the type wherein a memory cell is constituted of n-type semiconductor regions (a source and a drain) formed in a p-type well of a semiconductor substrate and three gates (including a floating gate, a control gate and a selective gate) is manufactured. In the manufacture, ... 07/21/05 - 20050158940 - Process of forming high-k gate dielectric layer for metal oxide semiconductor transistor A process of forming a high-k gate dielectric layer is applied in forming semiconductor devices such as metal oxide semiconductor transistor or memory devices. A metal layer such as Hf or Zr is formed on a substrate. The substrate is then dipped in an acidic solution such as a nitric ... 07/07/05 - 20050148138 - Method of manufacturing semiconductor device A method of manufacturing a semiconductor device that has a high-breakdown-voltage transistor, a low-voltage driving transistor and a MONOS type memory transistor includes a step of forming a stack film that includes at least an oxide silicon layer and a nitride silicon layer over a high-breakdown-voltage transistor forming region where ... 07/07/05 - 20050148137 - Nonplanar transistors with metal gate electrodes A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor ... 07/07/05 - 20050148136 - Cmos device with metal and silicide gate electrodes and a method for making it A semiconductor device and a method for forming it are described. The semiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate. ... 06/23/05 - 20050136586 - Method of making a non-volatile memory using a plasma oxidized high-k charge-trapping layer A method of fabricating a non-volatile memory device includes preparing a substrate; depositing a layer of HfO2 by atomic layer deposition; annealing the substrate and HfO2 layer in situ; exposing the HfO2 layer to a plasma discharge, thereby forming a charge-trapping layer; depositing a gate structure; and completing the memory ... 06/16/05 - 20050130365 - Method of manufacturing semi conductor device A fabrication method of a semiconductor device which has on the same semiconductor layer a transistor with a different high voltage gate as well as a high voltage drain and an MNOS memory transistor. ... 06/16/05 - 20050130364 - Structure and method for ultra-small grain size polysilicon A method of forming a semiconductor structure (and the resulting structure), includes providing a nitride layer between a silicon-containing layer and a polysilicon layer. ... 06/02/05 - 20050118759 - Method for manufacturing a semiconductor device A method for manufacturing the semiconductor device of which a transistor and a MNOS type memory transistor, each of which has a different gate withstand voltage and drain withstand voltage, are included in the same semiconductor layer. ... ### FreshPatents.com Support |