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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Complementary Insulated Gate Field Effect Transistors (i.e., Cmos) > And Additional Electrical Device > Including Bipolar Transistor (i.e., Bicmos) > Including Isolation Structure Including Isolation StructureIncluding Isolation Structure patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/22/07 - 20070066005 - Semiconductor device and method of fabricating the same According to the present invention, there is a provided a semiconductor device fabrication method having, forming a mask material in a surface portion of a semiconductor substrate, and forming a step having a projection by using the mask material; forming a dielectric film on the semiconductor substrate so as to ... 12/14/06 - 20060281243 - Through chip connection A method of forming an electrically conductive path through a portion of a semiconductor material, wherein the semiconductor material abuts a substrate and wherein the semiconductor material comprises multiple electronic devices, involves forming an annular trench in the portion, forming an island of semiconductor material within the annular trench, filling ... 11/30/06 - 20060270138 - Transistors having a recessed channel region and methods of fabricating the same A transistor includes a substrate and a device isolation layer that is formed on the substrate to define an active region. A gate pattern crosses over the active region. A gate insulation layer is interposed between the gate pattern and the active region. Source and drain regions are formed in ... 09/14/06 - 20060205135 - Silicon rich barrier layers for integrated circuit devices Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and ... 03/30/06 - 20060068542 - Isolation trench perimeter implant for threshold voltage control A method of forming isolation trenches in a semiconductor fabrication process to reduce transistor channel edge effect currents includes forming a masking structure overlying a substrate to expose a first area of the substrate. Spacers are formed on sidewalls of the masking structure. The spacers cover a perimeter region of ... ### FreshPatents.com Support |