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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.) > Complementary Insulated Gate Field Effect Transistors (i.e., Cmos) > And Additional Electrical Device > Including Bipolar Transistor (i.e., Bicmos) Including Bipolar Transistor (i.e., Bicmos)Including Bipolar Transistor (i.e., Bicmos) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.03/29/07 - 20070072356 - Method for reducing positive charges accumulated on chips during ion implantation In the plasma etching process of the integrated circuit, a portion of the charges from the plasma accumulates on the semiconductor device through the conductive portion of the integrated circuit so as to damage the device. The phenomenon mentioned above is so called antenna effect. In order to decreased the ... 01/04/07 - 20070004121 - Electronic assembly and method for producing an electronic assembly A method for producing an electronic assembly and an electronic assembly which has been correspondingly produced are specified. In this case, CMOS structures are formed in a semiconductor substrate to form a circuit and, after the CMOS structures have been formed, at least one electrical conductor is introduced, in a ... 12/28/06 - 20060292785 - Cu-metalized compound semiconductor device The present invention is a compound semiconductor device characterized in that it is Cu-metalized to improved the reliability of the device and to greatly reduce the cost of production. ... 11/16/06 - 20060258077 - Formation of deep trench airgaps and related applications A method for forming deep trench or via airgaps in a semiconductor substrate is disclosed comprising the steps of patterning a hole in the substrate, partly fill said hole with a sacrificial material (e.g. poly-Si), depositing spacers on the sidewalls of the unfilled part of the hole (e.g. TEOS) to ... 10/05/06 - 20060223258 - Method of fabricating a semiconductor device having cmos transistors and a bipolar transistor To reduce electric current concentration and electric field concentration in junction parts even in the case of miniaturization, and to achieve triggering at low voltage, an ESD protection apparatus is installed between an input terminal of a semiconductor integrated circuit chip and a CMOS transistor. The ESD protection apparatus includes ... 10/05/06 - 20060223257 - Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of ... 08/31/06 - 20060194384 - Semiconductor device with multiple semiconductor layers A semiconductor device structure uses two semiconductor layers to separately optimize N and P channel transistor carrier mobility. The conduction characteristic for determining this is a combination of material type of the semiconductor, crystal plane, orientation, and strain. Hole mobility is improved in P channel transistors when the conduction characteristic ... 08/10/06 - 20060177976 - Mos transistor forming method A method for forming, in a single-crystal semiconductor substrate of a first conductivity type, doped surface regions of the second conductivity type and deeper doped regions of the first conductivity type underlying the surface regions, including the step of negatively biasing the substrate placed in the vicinity of a plasma ... 06/15/06 - 20060128089 - Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method The invention relates to the manufacture of a semiconductor device (10) with a semiconductor body (1) and a substrate (2) and comprising at least one semiconductor element (3), which semiconductor device is equipped with at least one connection region (4) and a superjacent strip-shaped connection conductor (5) which is connected ... 06/15/06 - 20060128088 - Vertical integrated component, component arrangement and method for production of a vertical integrated component The invention relates to a vertical integrated component, a component arrangement and a method for production of a vertical integrated component. The vertical integrated component has a first electrical conducting layer, a mid layer, partly embodied from dielectric material on the first electrical conducting layer, a second electrical conducting layer ... 06/08/06 - 20060121667 - Method of fabricating sige bi-cmos device Provided is a method of fabricating a silicon germanium (SiGe) Bi-CMOS device. In the fabrication method, the source and drain of the CMOS device is formed using a silicon germanium (SiGe) heterojunction, instead of silicon, thereby preventing a leakage current resulting from a parasitic bipolar operation. Further, since the source ... 05/11/06 - 20060099757 - Method of fabricating a bipolar junction transistor A method for fabricating a bipolar junction transistor on a wafer is disclosed. The wafer has a N-type doped area and a plurality of isolated structures. A protection layer is formed on the wafer and portions of the protection layer are then removed to expose portions of the doped area. ... 05/04/06 - 20060094183 - Cmos gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure By predoping of a layer of deposited semiconductor gate material by incorporating dopants during the deposition process, a high uniformity of the dopant distribution may be achieved in the gate electrodes of CMOS devices subsequently formed in the layer of gate material. The improved uniformity of the dopant distribution results ... 04/06/06 - 20060073654 - Maintenance system, substrate processing device, remote operation device, and communication method An object of the present invention is to maintain a coating and developing system by remotely operating it more safely. The present invention is a maintenance system of a substrate processing apparatus, including a remote operation unit for operating the substrate processing apparatus from a remote place by transmitting a ... 03/30/06 - 20060068540 - Sequential chemical vapor deposition - spin-on dielectric deposition process A method to fill a valley on a substrate comprises depositing a first material onto the substrate using a chemical vapor deposition process to partially fill the valley and depositing a second material onto the substrate using a spin-on deposition process to completely fill the valley. The chemical vapor deposition ... 03/16/06 - 20060057801 - Thin films and methods for the preparation thereof Thin films are disclosed that are suitable as dielectrics in IC's and for other similar applications. In particular, the invention concerns thin films comprising compositions obtainable by hydrolysis of two or more silicon compounds, which yield an at least partially cross-linked siloxane structure. The invention also concerns a method for ... 03/02/06 - 20060046374 - Conducting line terminal structure for display device A conducting line terminal structure for a display device. The conducting line terminal structure comprises a conducting member and an insulating layer covering a first section of the conductive member. A planarization layer is formed above a second section of the conductive member and overlaps a first section of the ... 02/09/06 - 20060030099 - Beta control using a rapid thermal oxidation A method of forming semiconductor device. treating a surface of a substrate to produce a discontinuous growth of a material on the surface through rapid thermal oxidation of the substrate surface at a temperature of less than about 700° C. ... 02/09/06 - 20060030098 - Method of forming an oxide layer on a compound semiconductor structure A method of forming a dielectric layer structure on a supporting semiconductor structure having a first surface comprises providing a first beam of oxide; depositing a first layer of oxide on the first surface of the supporting semiconductor structure using the first beam of oxide, wherein the first layer of ... 02/02/06 - 20060024877 - High performance embedded dram technology with strained silicon Semiconductor devices are fabricated in a strained layer region and strained layer-free region of the same substrate. A first semiconductor device, such as a memory cell, e.g. a deep trench storage cell, is formed in a strained layer-free region of the substrate. A strained layer region is selectively formed in ... 01/12/06 - 20060008967 - Thermoplastic molding process and apparatus A system and method for forming an article from thermoplastic material and fiber. The method includes heating thermoplastic material to form a molten thermoplastic material for blending with the fiber. The molten thermoplastic material is blended with the fibers to form a molten composite material having a concentration of fiber ... 12/22/05 - 20050282328 - Removal of carbon from an insulative layer using ozone A method of removing residual carbon deposits from an insulative material. The insulative material comprises silicon, carbon, and hydrogen and is a flowable oxide material or a spin-on, flowable oxide material. The residual carbon deposits are removed from the insulative material by exposing the material to ozone. The insulative material ... 12/15/05 - 20050277244 - Method for fastening microtool components to objects A microtool for embossing structures into a substrate is fastened to an object, such as a press plate, by sintering, preferably pressure sintering. An insight underlying the invention is the fact that such a sintering or pressure sintering method provides a sufficiently reliable, strong, heat conducting and/or dimensionally stable connection, ... 11/17/05 - 20050255645 - Anti-stiction technique for thin film and wafer-bonded encapsulated microelectromechanical systems There are many inventions described and illustrated herein. In one aspect, there is described a thin film or wafer encapsulated MEMS, and technique of fabricating or manufacturing a thin film or wafer encapsulated MEMS employing anti-stiction techniques. In one embodiment, after encapsulation of the MEMS, an anti-stiction channel is formed ... 11/10/05 - 20050250277 - Method for reclaiming and reusing wafers Embodiments of the present invention provide a method for reclaiming and reusing a wafer. In one embodiment, a method for reclaiming a wafer comprises providing a used, nonproductive wafer having a semiconductor substrate and a polysilicon layer formed on the semiconductor substrate; oxidizing a first part of the polysilicon layer ... 10/20/05 - 20050233516 - Semiconductor device and manufacturing method thereof In a semiconductor device according to the present invention, an emitter diffusion layer is formed with a polycrystal silison emitter layer serving as a diffusion source, and an impurity concentration of the polycrystal silicon emitter layer is higher than an impurity concentration of the emitter diffusion layer, wherein the emitter ... 09/01/05 - 20050191803 - Method of forming a metal film for electrode A method of forming a refractory metal film doped with III or V group elements. The first process gas is supplied from a first gas source through a first gas introducing member to and through a gas supply mechanism toward a substrate within a processing vessel. The second process gas ... 08/25/05 - 20050186725 - Method for manufacturing solar battery The invention is aimed to prevent that fall of characteristic of a solar battery and producing yield caused by particles of powder condition generating from working part at laser beam process in the method producing the solar battery by laser beam process. The constitution of the invention is characterized by ... 08/18/05 - 20050181554 - Semiconductor memory device and method for initializing the same A semiconductor memory device includes memory cell blocks (11) through (14) including a nonvolatile memory cell. The memory cell blocks (11) through (14) include chip-data storing regions (11b) through (14b) for storing chip data containing operation parameters of the semiconductor memory device and pass-flag storing regions (11c) through (14c) for ... 07/14/05 - 20050153503 - Method of manufacturing flash memory device The present invention relates to a method of manufacturing a semiconductor device. According to the present invention, an ONO1 HTO film and an ONO2 nitride film are sequentially formed on a polysilicon layer for floating gate and an oxide film for ONO3 is formed as a SiON film by oxidizing ... ### FreshPatents.com Support |