FREE patent keyword monitoring and additional FREE benefits. http://images1.freshpatents.com/images/triangleright (1K) REGISTER now for FREE triangleleft (1K)
FreshPatents.com Logo    FreshPatents.com icons
Monitor Keywords Patent Organizer File a Provisional Patent Browse Inventors Browse Industry Browse Agents


Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > Having Schottky Gate (e.g., Mesfet, Hemt, Etc.) > Having Heterojunction (e.g., Hemt, Modfet, Etc.)

Having Heterojunction (e.g., Hemt, Modfet, Etc.)

Having Heterojunction (e.g., Hemt, Modfet, Etc.) patent applications listed include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

11/20/14 - 20140342512 - High voltage iii-nitride semiconductor devices
A III-N device is described has a buffer layer, a first III-N material layer on the buffer layer, a second III-N material layer on the first III-N material layer on an opposite side from the buffer layer and a dispersion blocking layer between the buffer layer and the channel layer....

11/20/14 - 20140342513 - Semiconductor apparatus and method for manufacturing the semiconductor apparatus
A semiconductor apparatus includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a gate recess formed by removing at least a portion of the second semiconductor layer, an insulation film formed on the gate recess and the second semiconductor layer,...

11/13/14 - 20140335666 - Growth of high-performance iii-nitride transistor passivation layer for gan electronics
Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN HEMT by means of atomic layer epitaxy (ALE), either before or after deposition of a gate metal electrode on the AlGaN barrier layer. Depending on the...

11/06/14 - 20140329366 - Method for fabricating semiconductor device
A method for fabricating a semiconductor device including: forming a silicon layer on an upper face of a nitride semiconductor layer including a channel layer of a FET; thermally treating the nitride semiconductor layer in the process of forming the silicon layer or after the process of forming the silicon...

08/28/14 - 20140242761 - High electron mobility transistor and method of forming the same
A method of forming a semiconductor structure, the method includes epitaxially growing a second III-V compound layer on a first III-V compound layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. The method further includes forming a source feature and a...

08/14/14 - 20140227836 - Nitride based semiconductor device and method for manufacturing the same
Disclosed herein is a nitride based semiconductor device including: a base substrate; an epitaxial growth layer disposed on the base substrate and generating a 2-dimensional electron gas in an inner portion thereof; and an electrode structure disposed on the epitaxial growth layer, wherein the electrode structure includes: a gate electrode;...

07/24/14 - 20140206158 - Method for manufacturing semiconductor device
A semiconductor device includes: a semiconductor layer disposed above a substrate; an insulating film formed by oxidizing a portion of the semiconductor layer; and an electrode disposed on the insulating film, wherein the insulating film includes gallium oxide, or gallium oxide and indium oxide....

07/24/14 - 20140206159 - Method for manufacturing compound semiconductor device
A compound semiconductor device includes: a compound semiconductor multilayer structure; a gate insulating film on the compound semiconductor multilayer structure; and a gate electrode, wherein the gate electrode includes a gate base portion on the gate insulating film and a gate umbrella portion, and a surface of the gate umbrella...

07/03/14 - 20140187002 - Method of forming a semiconductor structure
A method of forming a semiconductor structure having a substrate is disclosed. The semiconductor structure includes a first layer formed in contact with the substrate. The first layer made of a first III-V semiconductor material selected from GaN, GaAs and InP. A second layer is formed on the first layer....

07/03/14 - 20140187003 - High electron mobility transistor and manufacturing method thereof
The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides...

06/19/14 - 20140170819 - High electron mobility transistor structure with improved breakdown voltage performance
A method comprises epitaxially growing a gallium nitride (GaN) layer over a silicon substrate, epitaxially growing a donor-supply layer over the GaN layer, and etching a portion of the donor-supply layer. The method also comprises depositing a passivation layer over the donor-supply layer and filling the etched portion of the...

06/12/14 - 20140162416 - Aluminum gallium nitride etch stop layer for gallium nitride based devices
A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to...

05/29/14 - 20140147977 - Process for fabricating an enhancement mode heterojunction transistor
A method for fabricating a heterojunction field-effect transistor includes implanting p-type dopants form an implanted area in a first layer of III-V semiconductor alloy, removing an upper part of the first layer and of the implanted area by maintaining vapor phase epitaxy conditions, stopping the removal when the density of...

05/22/14 - 20140141580 - Transistor with enhanced channel charge inducing material layer and threshold voltage control
High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region....

04/17/14 - 20140106516 - Self-doped ohmic contacts for compound semiconductor devices
A compound semiconductor device is manufactured by forming an III-nitride compound semiconductor device structure on a silicon-containing semiconductor substrate, the III-nitride compound semiconductor device structure including a GaN alloy on GaN and a channel region arising near an interface between the GaN alloy and the GaN. One or more silicon-containing...

04/10/14 - 20140099757 - Iii-n device structures and methods
A III-N device is described with a III-N layer, an electrode thereon, a passivation layer adjacent the III-N layer and electrode, a thick insulating layer adjacent the passivation layer and electrode, a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device, and a bonding layer...

04/03/14 - 20140094005 - Enhancement-mode gan mosfet with low leakage current and improved reliability
An enhancement-mode GaN MOSFET with a low leakage current and an improved reliability is formed by utilizing a SiO2/Si3N4 gate insulation layer on an AlGaN (or InAlGaN) barrier layer. The Si3N4 portion of the SiO2/Si3N4 gate insulation layer significantly reduces the formation of interface states at the junction between the...

03/27/14 - 20140087529 - Power device and method for manufacturing the same
Provided is a power device. The power device may include a two-dimensional electron gas (2-DEG) layer in a portion corresponding to a gate electrode pattern since a second nitride layer is further formed on a lower portion of the gate electrode pattern after a first nitride layer is formed and...

03/13/14 - 20140073095 - High electron mobility transistor and method of forming the same
A high electron mobility transistor includes first, second and third compound semiconductor layers. The second compound semiconductor layer has a first interface with the first compound semiconductor layer. The third compound semiconductor layer is disposed over the first compound semiconductor layer. The third compound semiconductor layer has at least one...

02/27/14 - 20140057401 - Compound semiconductor device with mesa structure
A compound semiconductor device having mesa-shaped element region, and excellent characteristics are provided. The compound semiconductor device has: an InP substrate; an epitaxial lamination mesa formed above the InP substrate and including a channel layer, a carrier supply layer above the channel layer and a contact cap layer above the...

02/06/14 - 20140038372 - Compound semiconductor device and method of manufacturing the same
Two layers of protection films are formed such that a sheet resistance at a portion directly below the protection film is higher than that at a portion directly below the protection film. The protection films are formed, for example, of SiN film, as insulating films. The protection film is formed...

01/30/14 - 20140030858 - Enhancement mode iii-nitride device
A III-nitride switch includes a recessed gate contact to produce a nominally off, or an enhancement mode, device. By providing a recessed gate contact, a conduction channel formed at the interface of two III-nitride materials is interrupted when the gate electrode is inactive to prevent current flow in the device....

01/02/14 - 20140004668 - Method for manufacturing nitride electronic devices
A substrate product is disposed in a growth furnace at time t0, and the substrate temperature is then raised to 950° C. At time t3 after the substrate temperature is sufficiently stable, trimethyl gallium and ammonia are supplied to the growth furnace, to grow an i-GaN film. The substrate temperature...

01/02/14 - 20140004669 - Group iii nitride semiconductor device, production method therefor, and power converter
A method for producing a semiconductor device, includes forming a first carrier transport layer including a Group III nitride semiconductor, forming a mask on a region of the first carrier transport layer, selectively re-growing a second carrier transport layer on an unmasked region of the first carrier transport layer, the...

12/19/13 - 20130337619 - Compound semiconductor device and method for manufacturing the same
A compound semiconductor device includes: a compound semiconductor region having a surface in which a step is formed; a first electrode formed so as to overlie the upper surface of the step, the upper surface being a non-polar face; and a second electrode formed along a side surface of the...

12/12/13 - 20130330888 - In situ grown gate dielectric and field plate dielectric
Methods and apparatuses are disclosed for providing heterostructure field effect transistors (HFETs) with high-quality gate dielectric and field plate dielectric. The gate dielectric and field plate dielectric are in situ deposited on a semiconductor surface. The location of the gate electrode may be defined by etching a first pattern in...

11/28/13 - 20130316502 - Enhancement mode iii-n hemts
A III-N semiconductor device that includes a substrate and a nitride channel layer including a region partly beneath a gate region, and two channel access regions on opposite sides of the part beneath the gate. The channel access regions may be in a different layer from the region beneath the...

11/14/13 - 20130302953 - High electron mobility transistor and method of manufacturing the same
A high electron mobility transistor (HEMT) includes a substrate, an HEMT stack spaced apart from the substrate, and a pseudo-insulation layer (PIL) disposed between the substrate and the HEMT stack. The PIL layer includes at least two materials having different phases. The PIL layer defines an empty space that is...

10/24/13 - 20130280869 - Semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate, a carrier transit layer disposed above the substrate, a compound semiconductor layer disposed on the carrier transit layer, a source electrode disposed on the compound semiconductor layer, a first groove disposed from the back of the substrate up to the inside of the carrier...

09/26/13 - 20130252386 - Methods of fabricating nitride-based transistors with an etch stop layer
A III-Nitride field-effect transistor, specifically a HEMT, comprises a channel layer, a barrier layer on the channel layer, an etch stop layer on the cap layer, a dielectric layer on the etch stop layer, a gate recess that extends to the barrier layer, and a gate contact in the gate...

09/12/13 - 20130237021 - Enhancement mode field effect device and the method of production thereof
A method is disclosed for producing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET or MESFET devices, comprising two active layers, e.g. a GaN/AlGaN layer. The method produces an enhancement mode device of this type, i.e. a normally-off device, by providing a passivation layer on the AlGaN layer, etching...

09/05/13 - 20130230951 - Asymmetrically recessed high-power and high-gain ultra-short gate hemt device
A high-power and high-gain ultra-short gate HEMT device has exceptional gain and an exceptionally high breakdown voltage provided by an increased width asymmetric recess for the gate electrode, by a composite channel layer including a thin indium arsenide layer embedded in the indium gallium arsenide channel layer and by double...

08/15/13 - 20130210203 - Method of manufacturing compound semiconductor device
A compound semiconductor device has a buffer layer formed on a conductive SiC substrate, an AlxGa1-xN layer formed on the buffer layer in which an impurity for reducing carrier concentration from an unintentionally doped donor impurity is added and in which the Al composition x is 0<x<1, a GaN-based carrier...

07/25/13 - 20130189817 - Manufacturing of scalable gate length high electron mobility transistors
A process of manufacturing a high electron mobility transistor, comprising: providing an epitaxial substrate comprising a semi-insulating substrate, a buffer layer and a barrier layer sequentially stacked; forming a first and second current conducting electrodes formed on, and in ohmic contact with, the barrier layer; and forming a control gate...

06/06/13 - 20130143373 - Method of manufacturing nitride semiconductor device
A method of manufacturing a nitride semiconductor device including: forming a nitride semiconductor layer over a substrate wherein the nitride semiconductor layer has a 2DEG channel inside; forming a drain electrode in ohmic contact with the nitride semiconductor layer and a source electrode spaced apart from the drain electrode, in...

12/06/12 - 20120309141 - Hetero-structured inverted-t field effect transistor
The present invention provides a method of forming a transistor. The method includes forming a first layer of a first semiconductor material above an insulation layer. The first semiconductor material is selected to provide high mobility to a first carrier type. The method also includes forming a second layer of...

09/20/12 - 20120238063 - Termination and contact structures for a high voltage gan-based heterojunction transistor
A semiconductor device is provided that includes a substrate, a first active layer disposed over the substrate, and a second active layer disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between...

09/20/12 - 20120238064 - Enhancement-mode high-electron-mobility transistor and the manufacturing method thereof
This invention discloses an enhancement-mode high-electron-mobility transistor and the manufacturing method thereof. The transistor comprises an epitaxial buffer layer on a substrate, a source and drain formed in the buffer layer, a PN-junction stack formed on the buffer layer and located between the source and drain, and a gate formed...

09/06/12 - 20120225526 - Nanowire and larger gan based hemts
Nanowire and larger, post-based HEMTs, arrays of such HEMTs, and methods for their manufacture are provided. In one embodiment, a HEMT can include a III-N based core-shell structure including a core member (e.g., GaN), a shell member (e.g., AlGaN) surrounding a length of the core member and a two-dimensional electron...

08/16/12 - 20120208331 - Compound semiconductor device and its manufacture method
A vertical type GaN series field effect transistor having excellent pinch-off characteristics is provided. A compound semiconductor device includes a conductive semiconductor substrate, a drain electrode formed on a bottom surface of the conductive semiconductor substrate, a current blocking layer formed on a top surface of the conductive semiconductor substrate,...

07/12/12 - 20120178226 - Semiconductor device and method of manufacturing the same
A semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, and a protective insulating film composed of silicon nitride, which is formed over a surface of the compound semiconductor layer and whose film density in an intermediate portion is lower than that in a lower portion....

07/05/12 - 20120171824 - Heterostructure device and associated method
A method of manufacturing a heterostructure device is provided that includes implantation of ions into a portion of a surface of a multi-layer structure. Iodine ions are implanted between a first region and a second region to form a third region. A charge is depleted from the two dimensional electron...

06/21/12 - 20120156836 - Method for forming iii-v semiconductor structures including aluminum-silicon nitride passivation
A method for fabricating a semiconductor structure includes forming a semiconductor layer over a substrate and forming an aluminum-silicon nitride layer upon the semiconductor layer. When the semiconductor layer in particular comprises a III-V semiconductor material such as a group III nitride semiconductor material or a gallium nitride semiconductor material,...

06/07/12 - 20120142148 - Method of manufacturing high frequency device structure
Provided are a method of manufacturing a normally-off mode high frequency device structure and a method of simultaneously manufacturing a normally-on mode high frequency device structure and a normally-off mode high frequency device structure on a single substrate....

04/12/12 - 20120088341 - Methods of manufacturing high electron mobility transistors
The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns...

12/29/11 - 20110318892 - Semiconductor device and method for manufacturing the same
A semiconductor device having a source electrode and a drain electrode formed over a semiconductor substrate, a gate electrode formed over the semiconductor substrate and disposed between the source electrode and the drain electrode, a protection film made of an insulating material and formed between the source electrode and the...

11/10/11 - 20110275183 - Enhancement mode iii-nitride fet
A III-nitride switch includes a recessed gate contact to produce a nominally off, or an enhancement mode, device. By providing a recessed gate contact, a conduction channel formed at the interface of two III-nitride materials is interrupted when the gate electrode is inactive to prevent current flow in the device....

09/08/11 - 20110217816 - Field effect transistor and method for fabricating the same
(GZO) layer annealed in an inactive gas atmosphere; and ohmic electrodes connecting with the channel layer....

09/01/11 - 20110212582 - Method of manufacturing high electron mobility transistor
A method of manufacturing a High Electron Mobility Transistor (HEMT) may include forming first and second material layers having different lattice constants on a substrate, forming a source, a drain, and a gate on the second material layer, and changing the second material layer between the gate and the drain...

08/04/11 - 20110189826 - Method of manufacturing field effect transistor having ohmic electrode in a recess
The contact resistance between an Ohmic electrode and an electron transit layer is reduced compared with a case in which the Ohmic electrode is provided to a depth less than the heterointerface. As a result, for an Ohmic electrode provided in a structure comprising an electron transit layer formed of...

06/09/11 - 20110136305 - Group iii nitride semiconductor devices with silicon nitride layers and methods of manufacturing such devices
Methods of fabricating transistor in which a first Group III nitride layer is formed on a substrate in a reactor, and a second Group III nitride layer is formed on the first Group III nitride layer. An insulating layer such as, for example, a silicon nitride layer is formed on...