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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > On Insulating Substrate Or Layer (e.g., Tft, Etc.) > Having Insulated Gate > Complementary Field Effect Transistors Complementary Field Effect TransistorsComplementary Field Effect Transistors patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.02/15/07 - 20070037329 - Growing [110] silicon on [001] oriented substrate with rare-earth oxide buffer film An assembly and method of making the same wherein the assembly incorporates a rare-earth oxide film to form a [110] crystal lattice orientation semiconductor film. The assembly comprises a substrate, a rare-earth oxide film formed on the substrate, and a [110]-oriented semiconductor film formed on the rare-earth oxide film. The ... 12/28/06 - 20060292763 - Methods of fabricating thin film transistor and organic light emitting display device using the same Methods of fabricating a TFT and an OLED using the same are provided. The method of fabricating a CMOS TFT includes: preparing a substrate having first and second TFT regions; forming a gate electrode on the substrate; forming a gate insulating layer on the entire surface of the substrate including ... 11/16/06 - 20060258067 - Device for protecting against electrostatic discharge A device, for protecting against electrostatic discharge, structured as a PNPN junction, includes: first and second conductivity type regions formed in a substrate, contacting each other; a first diffusion layer of second conductivity type dopants formed in the first conductivity type region and electrically connected to an anode; a second ... 11/09/06 - 20060252188 - Semiconductor device and fabrication method A method and apparatus for manufacturing a semiconductor device is provides a substrate having a first region and a second region. A sacrificial first gate is formed in the first region. Source/drain are formed in the first region. A second region gate dielectric is formed in the second region. A ... 08/24/06 - 20060189051 - Semiconductor memory device with high operating current and method of manufacturing the same In a semiconductor memory device with a high operating current and a method of manufacturing the same, a semiconductor substrate is formed in which a memory cell region and a peripheral circuit region including an N-channel metal oxide semiconductor (NMOS) region and a P-channel metal oxide semiconductor (PMOS) region are ... 08/24/06 - 20060189050 - Method of forming a semiconductor device and an optical device and structure thereof An integration process where a first semiconductor protective layer and a second semiconductor protective layer are formed to protect the first and second semiconductor materials, respectfully, during processing to form an optical device, such as a photodetector, and a transistor on the same semiconductor. The first semiconductor protective layer protects ... 05/18/06 - 20060105509 - Method of forming a semiconductor device A method of integrating a non-MOS transistor device and a CMOS electronic device on a semiconductor substrate includes forming openings within an active semiconductor layer in first and second regions of a semiconductor substrate. The first region corresponds to a non-MOS transistor device portion and the second region corresponds to ... 02/09/06 - 20060030090 - Thin film devices for flat panel displays and methods for forming the same Methods of forming thin film devices with different electrical characteristics on a substrate comprising a driver circuit region and a pixel region. A first and a second polysilicon pattern layers are formed on the driving circuit region and the pixel region of the substrate, respectively. A first ion implantation is ... 01/19/06 - 20060014334 - Method of fabricating heterojunction devices integrated with cmos A method of fabricating heterojunction devices, in which heterojunction devices are epitaxially formed on active area regions surrounded by field oxide regions and containing embedded semiconductor wells. The epitaxial growth of the heterojunction device layers may be selective or not and the epitaxial layer may be formed so as to ... 12/08/05 - 20050272188 - Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for cmos performance enhancement A method of fabricating a CMOS device wherein mobility enhancement of both the NMOS and PMOS elements is realized via strain induced band structure modification, has been developed. The NMOS element is formed featuring a silicon channel region under biaxial strain while the PMOS element is simultaneously formed featuring a ... 11/10/05 - 20050250264 - Thin film transistor device and method of manufacturing the same A polysilicon film is formed in a predetermined region on a glass substrate, and then a gate insulating film and a gate electrode, whose width is narrower than the gate insulating film, are formed thereon. Then, an interlayer insulating film and an ITO film are formed on an overall surface. ... 06/09/05 - 20050124098 - Method of reducing noise disturbing a signal in an electronic device Certain aspects of a method for reducing noise disturbing at least one signal in an electronic device may comprise shielding a first layer doped with a first dopant from a signaling layer employing a second layer doped with a second dopant. A first signaling component of the signaling layer may ... ### FreshPatents.com Support |