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Semiconductor Device Manufacturing: Process > Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions > On Insulating Substrate Or Layer (e.g., Tft, Etc.) > Having Insulated Gate > Combined With Electrical Device Not On Insulating Substrate Or Layer Combined With Electrical Device Not On Insulating Substrate Or LayerCombined With Electrical Device Not On Insulating Substrate Or Layer patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.04/05/07 - 20070077694 - Three-dimensional integrated circuit structure A semiconductor structure includes an interconnect region and a semiconductor stack bonded to the interconnect region through a bonding region. The stack includes at least two semiconductor layers having different electrical properties. The stack also includes single crystalline semiconductor material. The stack can be processed to form a mesa structure ... 02/01/07 - 20070026586 - Mask for manufacturing a display substrate capable of improving image quality A mask for forming a display substrate capable of improving color reproducibility by avoiding color spots and color shifts is presented. The mask includes a first sub-mask, a second sub-mask, a first overlapping portion and a second overlapping portion. The first sub-mask includes color reticles to form color pixels in ... 01/04/07 - 20070004105 - Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided. The method includes: forming a gate insulation layer on a substrate; forming a gate electrode on the gate insulation layer, wherein the gate electrode includes a pattern of a poly-silicon layer and a silicide layer on which a hard mask layer ... 12/07/06 - 20060275962 - Three-dimensional integrated circuit structure and method of making same Vertically oriented semiconductor devices may be added to a separately fabricated substrate that includes electrical devices and/or interconnect. The plurality of vertically oriented semiconductor devices are physically separated from each other, and are not disposed within the same semiconductor body, or semiconductor substrate. The plurality of vertically oriented semiconductor devices ... 11/16/06 - 20060258066 - Electrically stabilized integrated circuit An integrated electronic circuit comprises active components disposed on the surface of a substrate and connected by electrical connections disposed within a metallization level. A dielectric material situated between the surface of the substrate and the metallization level, or in the metallization level, has a locally higher value of dielectric ... 09/28/06 - 20060216878 - Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided, the method including forming a SiGe epitaxial layer pattern and a first Si epitaxial layer pattern on a semiconductor substrate, forming a second Si epitaxial layer on the entire surface, etching the second Si epitaxial layer and a predetermined thickness of ... 07/06/06 - 20060148142 - High-sensitivity image sensor and fabrication method thereof A method of fabricating a high-sensitivity image sensor and the same are disclosed. The disclosed method comprises: etching predetermined regions of active silicon and a buried oxide layer of a SOI substrate by using a mask to expose an N-type silicon substrate; implanting P-type ions into the exposed N-type silicon ... 05/18/06 - 20060105508 - Method of forming a semiconductor device A method for integrating first and second type devices on a semiconductor substrate includes forming openings within an active semiconductor layer of a dual semiconductor-on-insulator in first and second regions of the semiconductor substrate. First and second non-MOS transistor device implant regions are formed within portions of an intermediate semiconductor ... 04/06/06 - 20060073646 - Hybrid orientation cmos with partial insulation process The present invention provides a method of integrated semiconductor devices such that different types of devices are formed upon a specific crystallographic orientation of a hybrid substrate. In accordance with the present invention, junction capacitance of one of the devices is improved in the present invention by forming the source/drain ... 03/09/06 - 20060051910 - Semiconductor device, manufacturing method for the same, and electronic device Source/drain diffusion layers and a channel region are formed in a polysilicon thin film formed on a substrate made of glass or the like, and furthermore, a gate electrode 6 is formed via a gate insulating film. A silicon hydronitride film is formed on the interlayer dielectric film, whereby the ... 01/26/06 - 20060019434 - Semiconductor device having body contact through gate and method of fabricating the same According to an embodiment of the invention, a lower transistor is formed on a semiconductor substrate, and an upper thin film transistor is formed on the lower transistor. A body contact plug is formed to penetrate an upper gate electrode of the upper thin film transistor and a body pattern, ... 11/24/05 - 20050260802 - Soi circuit having reduced crosstalk interference and a method for forming the same A method allowing the elimination of crosstalk interference, through the semiconductive substrate, between portions of a circuit provided on a same substrate comprising an upper semiconductive layer and an underlying dielectric layer, for instance an SOI wafer, wherein said portions are separated one from each other by forming trenches on ... 09/01/05 - 20050191797 - Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device, includes preparing a semiconductor substrate, bonding a first semiconductor layer onto a part of the semiconductor substrate with a first insulating layer interposed therebetween, forming a second insulating layer on a side of the first semiconductor layer, epitaxially growing a second semiconductor layer ... 06/16/05 - 20050130355 - Method for manufacturing semiconductor device Several a transistor, which are inhibited short channel effect moderately according to each transistor's channel length, are formed on a same SOI substrate. In the present invention, forming a first transistor on SOI substrate, and forming a second transistor which has a gate electrode whose length is longer than a ... ### FreshPatents.com Support |