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Semiconductor Device Manufacturing: Process > Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor > Making Plural Separate Devices Making Plural Separate DevicesMaking Plural Separate Devices patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.02/08/07 - 20070031993 - Method and system for machine vision-based feature detection and mark verification in a workpiece or wafer marking system A precision laser based method of marking semiconductor wafers, packages, substrates or similar workpieces is provided. The workpieces have articles which may include die, chip scale packages, circuit patterns and the like. The marking occurs in a workpiece marking system and within a designated region relative to an article position. ... 11/09/06 - 20060252182 - Method and apparatus for creating rfid devices A process is disclosed for creating semiconductor devices such as RFID assemblies wherein an array of dies mounted to a substrate is spaced apart at a first pitch, and the substrate is removed after the positions of the dies in the array is fixed by a solidifiable substance. The solidifiable ... 09/07/06 - 20060199308 - Process for manufacturing sawing type leadless semiconductor packages A process for manufacturing sawing type leadless semiconductor packages includes a post mold-curing step, which is performed after an encapsulant is formed and after connecting bars of a leadframe are removed. The connecting bars are formed between a plurality of package units of the leadframe to connect a plurality of ... 08/10/06 - 20060177968 - Method for fabricating semiconductor packages with semiconductor chips A method for fabricating semiconductor packages with semiconductor chips includes: providing a reel tape capable of being rolled up, the reel tape for accommodating at least one row of carriers; mounting at least one semiconductor chip in each of the carriers, wherein a plurality of electrode pads are provided on ... 08/03/06 - 20060172464 - Method of embedding semiconductor element in carrier and embedded structure thereof A method of embedding a semiconductor element in a carrier and an embedded structure thereof are proposed. First, a carrier having a hole is provided and an auxiliary material is attached to a side of the carrier. A semiconductor element is placed in the hole of the carrier. Then, a ... 07/27/06 - 20060166406 - Method of making a semiconductor chip assembly using multiple etch steps to form a pillar after forming a routing line A method of making a semiconductor chip assembly includes providing a metal base that includes a metal plate and a metal layer, providing a routing line that contacts the metal layer and an etch mask that contacts the metal plate, providing a semiconductor chip that includes a conductive pad, mechanically ... 07/20/06 - 20060160272 - Synthesis method for a compound used to form a self-assembled monolayer, compound for forming a self-assembled monolayer, and layer structure for a semiconductor component A synthesis method of a compound used to form a self-assembled monolayer used in a semiconductor component is provided. A method includes a first step of replacing a terminal halogen of an ω-haloalk-1-ene with a compound having at least one aromatic group, and a second step of hydrosilylating the reaction ... 06/29/06 - 20060141669 - Semiconductor package having semiconductor constructing body and method of manufacturing the same A semiconductor package includes at least one semiconductor constructing body which has a semiconductor substrate and a plurality of external connection electrodes formed thereon. An insulating film covers the semiconductor constructing body. Each of interconnections which has a projecting electrode is formed on the insulating film. The projecting electrodes of ... 05/25/06 - 20060110853 - Structure of embedded active components and manufacturing method thereof A structure of embedded active components and the manufacturing method thereof are provided. The manufacturing steps involve providing a molding plate, and setting several active components on the molding plate as first. A dielectric layer covers the molding plate to cap the active components. An electric circuit is formed on ... 04/13/06 - 20060079024 - Methods relating to singulating semiconductor wafers and wafer scale assemblies Methods relating to the singulation of dice from semiconductor wafers. Trenches or channels are formed in the bottom surface of a semiconductor wafer, corresponding in location to the wafer streets. The trenches may be formed by etching or through an initial laser cut. The wafer is then singulated along the ... 04/06/06 - 20060073638 - Semiconductor electrical connection structure and method of fabricating the same A semiconductor electrical connection structure and a method of fabricating the same are provided. A wafer formed with a plurality of gold bumps thereon is divided into a plurality of individual chips. A carrier is prepared, and at least one of the chips is mounted on the carrier via a ... 03/23/06 - 20060063306 - Semiconductor package having a heat slug and manufacturing method thereof In one embodiment, a circuit substrate strip includes molding blocks composed of a plurality of circuit substrate unit areas. An integrated circuit chip is attached onto each circuit substrate unit area and connected electrically thereto and a heat slug is attached thereon. Resin sealant is applied on the molding blocks ... 09/15/05 - 20050202595 - Thin-film semiconductor device and method of manufacturing the same A thin-film semiconductor device with a reduced influence on a device formation layer in separation and a method of manufacturing the device are provided. The manufacturing method includes the step of preparing a member having a semiconductor film with a semiconductor element and/or semiconductor integrated circuit on a separation layer, ... 08/25/05 - 20050186707 - Chip scale surface mounted device and process of manufacture A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact ... 06/09/05 - 20050124093 - Fan out type wafer level package structure and method of the same To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, ... ### FreshPatents.com Support |