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Pulse Or Digital Communications > Equalizers > Automatic > Adaptive > Decision Feedback Equalizer Decision Feedback EqualizerDecision Feedback Equalizer patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.11/15/07 - 20070263715 - Dual pdfe system with forward-backward viterbi The present invention provides a novel technique for improving the performance of equalizers by reducing the effects of error propagation in equalizers that use a Viterbi Decoder. Methods and systems are described that can improve the performance of equalizers by reducing the effects of error propagation in equalizers that use ... 11/08/07 - 20070258517 - Adaptive error slicer and residual intersymbol interference estimator Conventional adaptive equalizers often use the “sign/sign” algorithm as a low complexity means to adjust their tap weight coefficients by driving the correlation between its single-bit “error” and “data” signals to zero. This algorithm fails in the presence of strong residual intersymbol interference (ISI), since this ISI renders the “error” ... 11/01/07 - 20070253477 - Method and apparatus for determining a position of an offset latch employed for decision-feedback equalization Methods and apparatus are provided for determining a position of an offset latch employed for decision-feedback equalization. The position of an offset latch is determined by obtaining a plurality of samples of a data eye associated with a signal, the data eye comprised of a plurality of trajectories for transitions ... 10/18/07 - 20070242742 - Digital communication system and method A digital communication system for transmitting and receiving video data signals and control data signals over a transmission line comprises an open-loop equalizer circuit and a control data extension circuit. The open-loop equalizer circuit is operable to receive video signals transmitted over the transmission line and output equalized video data ... 10/18/07 - 20070242741 - One-sample-per-bit decision feedback equalizer (dfe) clock and data recovery Disclosed are a receiver circuit, method and design architecture of a decision feedback equalizer (DFE) Clock-And-Data Recovery (CDR) architecture that utilizes/produces one sample-per-bit in the receiver and reduces bit-error-rate (BER). An integrating receiver is combined with a decision feedback equalizer along with the appropriate (CDR) loop phase detector to maintain ... 10/18/07 - 20070242740 - Reducing equalizer error propagation with a low complexity soft output viterbi decoder Novel systems and methods are described in which performance of equalizers can be improved by reducing the effects of error propagation in equalizers that use a Viterbi Decoder. Systems and methods of symbol correction in prediction decision feedback equalization architectures are described including systems and methods that include an enhanced ... 09/27/07 - 20070223571 - Decision-feedback equalizer simulator A Decision-Feedback Equalizer Simulator (“DFES”) for predicting a bit-error rate (“BER”) of a transmitted signal through a channel, wherein the transmitted signal includes a repeating pattern having a length of N bits and wherein the transmitted signal is sampled by a bit-error rate tester (“BERT”) that produces a BER value ... 09/06/07 - 20070206670 - Method and apparatus for adaptively establishing a sampling phase for decision-feedback equalization Methods and apparatus are provided for adaptively establishing the optimal sampling phase offset for a DFE operation. According to one aspect of the invention, one or more values in an amplitude domain are converted into a time domain, for example, using a phase detector, based on phase information to provide ... 08/30/07 - 20070201548 - Method and communication device for interference concellation in a cellular tdma communication system A system and method for interference cancellation of received data via a communication channel in a cellular communication system having corresponding channel impulse response coefficients. Linear filtering of the received data is performed and thereafter a non-linear detection is executed to get detected data by non-linear signal processing. Filter coefficients ... 08/30/07 - 20070201547 - Decision feedback equalizer adaptation A decision feedback equalizer includes at least one quantizer, able to quantize a received signal according to a comparison with a one of multiple quantization thresholds. Each quantization threshold corresponds to one or more than one value of one or more than one previously received symbols. The equalizer further includes ... 08/23/07 - 20070195875 - Multi-pair gigabit ethernet transceiver having decision feedback equalizer Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter in a demodulator, ... 08/23/07 - 20070195874 - Method and apparatus for generating one or more clock signals for a decision-feedback equalizer using dfe detected data Methods and apparatus are provided for generating one or more clock signals for a decision-feedback equalizer using DFE detected data. A received signal is sampled using a data clock and a transition clock to generate a data sample signal and a transition sample signal, respectively. A DFE correction is obtained ... 08/16/07 - 20070189376 - Architecture for very high-speed decision feedback sequence estimation A method for providing a next-cycle input sample from a decision feedback equalizer to a symbol decoder using look-ahead computations such that timing contention between the decision feedback equalizer and the symbol decoder is reduced. During a symbol period, a set of possible values is computed in the decision feedback ... 06/21/07 - 20070140330 - High performance equalizer with enhanced dfe having reduced complexity An apparatus and method for implementing an equalizer which (1) combines the benefits of a decision feedback equalizer (DFE) with a maximum-a-posterori (MAP) equalizer (or a maximum likelihood sequence estimator, MLSE) (2) performs equalization in a time-forward or time-reversed manner based on the channel being minimum-phase or maximum-phase to provide ... 06/21/07 - 20070140329 - decision feedback equalization with composite trellis slicer A decision feedback equalizer is configured to equalize an input signal to generate a recovered output signal. Linear feed-forward filter circuitry is configured to provide a linearly filtered output signal based on the input signal. Composite trellis decoder circuitry configured to process a combined signal that is based on a ... 06/14/07 - 20070133672 - Apparatus and method for stable def using selective fbf A decision feedback equalizing apparatus selectively using a feedback filter and a method thereof are provided. The apparatus includes: an equalizing unit including a feed forward filter (FFF) for correcting a distorted transmission channel by receiving a match-filtered signal and a feedback filter (FBF) for reducing inter symbol interference ISI ... 06/14/07 - 20070133671 - Active delay line A delay line for deployment in an equalizer to insert a delay in a signal received by the delay line employs a plurality of cascaded delay stages where the delay per stage provided by an active unit-gain amplifier in each stage that provides sufficient impedance mismatch between the delay stages ... 05/31/07 - 20070121718 - System and method for time-domain equalization in discrete multi-tone systems A novel time-domain equalizer (TEQ) is provided for the receiver of a Discrete Multi-tone (DMT) system to shorten the length of the effective channel impulse response. The TEQ is based on a variant of the conventional decision-feedback equalizer (DFE) structure along with a training method for the TEQ settings. By ... 05/10/07 - 20070104265 - Equalizer and equalizing method thereof An equalizer and an equalizing method for equalizing a received signal, where the received signal includes at least one primary interference and a plurality of secondary interferences. The Viterbi equalizer includes a filter module for filtering out the secondary interferences from the received signal to generate a filtered signal, a ... 05/10/07 - 20070104264 - Apparatus and method of decision feedback equalization in terrestrial digital broadcasting receiver The present invention is related to a decision feedback equalizing apparatus and a method thereof. The object of the invention is to provide to an apparatus and a method of decision feedback equalization that make a channel property of an inferior receiving signal to mild by using a channel-matched filter ... 04/26/07 - 20070091996 - Equalizer architecture for data communication An update algorithm for equalizer coefficients in a communications system using phase correction symbols. Instead of using a traditional all symbols slicer update algorithm, the equalizer is updated during phase correction symbols for optimal performance in low signal-to-noise ratio conditions. In lower signal-to-noise ratio conditions, the equalizer uses a phase ... 04/26/07 - 20070091995 - Decision feedback equalizer with dynamic feedback control A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. The dynamic timing is controlled by a signal formed as a combination of feedback ... 04/26/07 - 20070091994 - Method and system of frequency domain equalization A method and system of frequency domain equalization. In an embodiment, the frequency domain equalizer system includes a transmit driver. A receiver decision circuit is communicatively coupled to the transmit driver. The receiver decision circuit may have an input signal and an output signal. An all-pass filter may be communicatively ... 04/26/07 - 20070091993 - Techniques for simulating a decision feedback equalizer circuit A computerized system simulates a non-linear Decision Feedback Equalizer. The computerized system includes a user interface, an output port, and a controller coupled to the user interface and to the output port. The controller is configured to (i) receive electronic design automation commands from a user through the user interface, ... 03/15/07 - 20070058710 - Apparatus and method for decision error compensation in an adaptive equalizer An adaptive equalizer comprises: a forward equalizer (FE) receiving a symbol stream to generate an FE output; a decision feedback equalizer (DFE) receiving a decision symbol stream to generate a DFE output; a first adder, coupled to the forward equalizer and the decision feedback equalizer, adding the FE and DFE ... 03/01/07 - 20070047637 - Channel equalizer, channel equalization method, and tap coefficient updating method A channel equalizer to equalize a signal received over a transmission channel, includes a feedforward filter to filter the received signal, a level determination unit to determine a first level value among a plurality of predetermined amplitude levels based on an amplitude of an output signal of the feedforward filter, ... 02/08/07 - 20070030891 - Receiver for an optical signal A receiver for an optical signal is described. The receiver comprises a decision feedback equalizer (DFE), wherein a distorted input signal (DIS) being derived from the optical signal, as well as a first threshold signal (Th1) and/or a first coefficient (Coeff1) are provided to the decision feedback equalizer (DFE), and ... 02/08/07 - 20070030890 - Partial response transmission system and equalizing circuit thereof A partial response transmission system in which a data signal is transmitted from a transmission side to a reception side through a transmission medium, includes an equalizing circuit provided in the transmission side or the reception side, and configured to adjust a transfer function for an entire system including the ... 02/01/07 - 20070025436 - High-speed data reception circuitry and methods Equalization circuitry for receiving a digital data signal includes both feed-forward equalizer (“FFE”) circuitry and decision-feedback equalizer (“DFE”) circuitry. The FFE circuitry may be used to give the DFE circuitry a signal that is at least minimally adequate for proper start-up of the DFE circuitry. Thereafter, more of the burden ... 12/28/06 - 20060291553 - Equalizer mode selection based on distribution of symbol error According to some embodiments, an equalizer receives a signal and generates symbols based on the received signal. Moreover, a controller may be provided to determine a mode of equalizer operation based at least in part on a distribution of error associated with the symbols. ... 12/28/06 - 20060291552 - Decision feedback equalizer In some embodiments, a circuit is provided that comprises a decision feedback equalizer to receive a bit stream signal. The equalizer comprises a summing circuit having a first input to receive a cursor bit sample from the bit stream, a second input to receive a first cursor bit signal, and ... 11/30/06 - 20060268973 - Gfsk/gmsk detector with enhanced performance in co-channel interference and awgn channels A detector for detecting a received signal according to a Gaussian shift keying (“GFSK/GMSK”) modulation scheme. The detector may enhance a detection performance of the receiver while limiting one or more implementation impacts. An implementation impact may include an implementation complexity impact, an implementation cost impact, or other impacts. The ... 11/23/06 - 20060262842 - Method for signal estimation and extraction A method separates a source signal from an interfering signal contain in signals received at multiple sensors. The method estimates the source signal using an adaptive filter characterized by a set of filter coefficients, which are updated by maximizing a distance of the estimated source signal from a Gaussian signal ... 11/09/06 - 20060251164 - Iterative decoding and equalingzing method for hgih speed communications on multiple antenna channels during transmission and reception An iterative decoding and equalizing device for high bit rate communication over frequency-selective channels with multiple transmit and receive antennas, said device including a decision feedback equalizer adapted to receive data from different receive antennas and including a forward filter (9) and a recursive backward filter (12) fed with calculated ... 11/02/06 - 20060245487 - High-speed decoder for a multi-pair gigabit transceiver A method and a system for providing an input signal from a multiple decision feedback equalizer to a decoder based on a tail value and a subset of coefficient values received from a decision-feedback equalizer. A set of pre-computed values based on the subset of coefficient values is generated. Each ... 11/02/06 - 20060245486 - Method for robust and stable convergence of blind lms based adaptation of coefficients for a continuous time ffe-dfe A continuous time electronic dispersion compensation architecture using feed forward equalization and a non-linear decision feedback equalization forms an output signal by a linear combination of successively delayed versions of the input signal and the sliced output signal weighted by appropriate coefficients. A selected number of taps in the mixer ... 10/26/06 - 20060239342 - Cir estimating decision feedback equalizer with phase tracker An equalizer system includes an equalizer, first and second decoders, and a tap weight controller. The equalizer equalizes a received signal to provide an equalizer output. The first decoder is characterized by a first parallel output, and the first decoder decodes the equalizer output to provide first symbol decisions having ... 10/26/06 - 20060239341 - Continuous-time decision feedback equalizer A continuous-time domain Decision Feedback Equalizer (DFE) for use in a serial communication channel comprises in one embodiment a summer, a decision circuit, a capture flip-flop (FF) and an N-th order active filter. The DFE and its active filter operate in continuous time to give improved performance over a discrete-time ... 10/19/06 - 20060233231 - Method and circuit for equalizing and compensating iq imbalance simultaneously The present invention provides a method and circuit for equalizing and compensating IQ imbalance at the same time. The method includes: down-converting an RF signal to generate a baseband signal, and driving an adaptive equalizer to process the baseband signal for achieving equalization and IQ imbalance compensation simultaneously. ... 10/12/06 - 20060227859 - Method and apparatus for block-wise decision-feedback equalization for wireless communication Techniques for performing decision feedback equalization are described. A feed-forward filter response and a feedback filter response are derived based on a channel estimate and a reliability parameter and further without constraint on the feedback filter response or with a constraint of no feedback for an on-time sample. The reliability ... 10/12/06 - 20060227858 - Soft-threshold-based multi-layer decision feedback equalizer and decision method The present invention provides a soft-threshold-based multi-layer decision feedback equalizer, including a feed forward filter for receiving a transmitted data, a feed backward filter, an adder and a soft-threshold-based multi-layer decision engine (STM engine). The adder is coupled to an output end of the feed forward filter and an output ... 09/28/06 - 20060215748 - Equalizer for time domain signal processing A digital equalizer comprises a matched filter that, in conjunction with an FIR filter, assures a single peak with substantially greater energy than other peaks caused by ghosts, thereby permitting synchronization even with multiple, arbitrarily strong ghosts caused by strong multipathing, multiple transmitters, or both. ... 09/14/06 - 20060203901 - Apparatus and method for correcting iq imbalance An apparatus and method for correcting IQ imbalance are presented. An exemplary receiver for processing I and Q signals from a tuner includes: a non-decision directed (NDD) imbalance canceller coupled to receive the I and Q signals, and a decision directed (DD) imbalance canceller coupled to the non-decision directed imbalance ... 09/14/06 - 20060203900 - Burst error limiting feedback equalizer system and method for multidimensional modulation systems A burst error limiting symbol detector system includes a symbol detector circuit responsive to a corrected sample signal for detecting multilevel or multidimensional symbols encoded in the corrected sample signal with reference to a plurality of associated thresholds. A feedback equalizer circuit provides a feedback equalizer signal for cancelling undesired ... 08/31/06 - 20060193377 - Method for equalization of a data signal taking into account a disturbance channel A useful channel trellis diagram is processed in a method for equalization of a signal which is transmitted via a useful channel. A disturbance channel trellis diagram is then processed, with useful channel path information being used as a DF contribution. The useful channel trellis diagram is processed once again, ... 08/17/06 - 20060182172 - Feedback equalizer for a communications receiver A feedback equalizer is provided that minimizes the critical path time in a multi-level modulation receiver. The critical path is reduced by parallel operation of some summation components of the feedback equalizer. The critical path is further reduced by pre-computing coefficients for the feedback equalizer. Further, the critical path is ... 08/10/06 - 20060176949 - High performance equalizer having reduced complexity An apparatus and method for implementing an equalizer which combines the benefits of a decision feedback equalizer (DFE) with a maximum-a-posterori (MAP) equalizer (or a maximum likelihood sequence estimator, MLSE) to provide an equalization device with significantly lower complexity than a full-state MAP device, but which still provides improved performance ... 08/10/06 - 20060176948 - Decision-feedback channel equalizer usable with a digital receiver and method thereof A decision feedback channel equalizer of a digital receiver includes a feedforward filter to receive and filter a demodulated signal to remove one or more ghost signals, a hard decision unit to decide a decision value based on a first signal outputted from the feedforward filter, a feedback filter to ... 07/06/06 - 20060146926 - Adaptive equalization with group delay Methods, apparatuses, and systems are presented for performing adaptive equalization involving receiving a signal originating from a channel associated with inter-symbol interference, filtering the signal using a filter having a plurality of adjustable tap weights to produce a filtered signal, and adaptively updating each of the plurality of adjustable tap ... 07/06/06 - 20060146925 - Transform-domain sample-by-sample decision feedback equalizer A method for performing equalization on an input signal in a receiver creates multiple delayed samples of the input signal and orthogonally transforms each of the delayed input samples before weighting them using transformed adaptive coefficients. The weighted orthogonally-transformed delayed input samples are summed along with a feedback signal and ... 06/15/06 - 20060126715 - Apparatus and method for compensating signal attenuation based on an equalizer An apparatus and a method for compensating signal attenuation based on an equalizer. The apparatus includes an auto gain controller, an analog-to-digital converter and an auto-gain-control mapping circuit. The analog-to-digital converter is used for receiving an incoming analog signal and amplifying the received analog signal. The analog-to-digital converter is used ... 06/08/06 - 20060120446 - Decision feedback equalizer for minimum and maximum phase channels This invention describes an apparatus and method to improve the performance of a decision feedback equalizer (DFE) for time-varying multi-path channels. For minimum-phase channels, the equalization is performed in a time-forward manner. For maximum-phase channels, the equalization is performed in a time-reversed manner. More specifically, for maximum-phase channels, the filter ... 05/11/06 - 20060098728 - Decision feedback equalizer for digital tv and method thereof The conventional decision feedback equalizer has a drawback that can't decide symbols correctly because a simple slicer is used as a symbol detector. A decision feedback equalizer as a symbol detector uses a Trellis Coded Modulation (TCM) decoder whose Trace Back depth is 1 (TBD=1), to thereby decide symbols correctly ... 05/04/06 - 20060093028 - Serial data link using decision feedback equalization A multi-phase adaptive decision feedback equalizer minimizes post-cursor inter-symbol interference in a current data bit based on values of subsequent data bits in a data communication system. In one form, the receiver includes a plurality of modules each having a respective adaptive decision feedback equalizer. A processor responsive to output ... 04/27/06 - 20060088091 - Equalizer with overlapped filter banks and methods for the same An equalizer, which may reduce signal distortions using overlapped filter banks and methods for the same are provided. The equalizer may include a filter circuit, and a filter control circuit. The equalizer and methods for the same may reduce distortions in filtered signals. ... 04/27/06 - 20060088090 - Dfe to ffe equalization coefficient conversion process for docsis 2.0 A method and appartus for converting FFE and FBE coefficients from a DOCSIS compatible cable modem termination system upstream equalizer into FFE only coefficients to be sent down to the cable modem which transmitted the training burst which resulted in convergence on the FFE and FFE coefficients. The method involves ... 03/16/06 - 20060056503 - Pipelined parallel decision feedback decoders for high-speed communication systems The invention relates to techniques for pipelining parallel decision feedback decoders (PDFDs) for high speed communication systems, such as 10 Gigabit Ethernet over copper medium (10GBASE-T). In one aspect, the decoder applies look-ahead methods to two concurrent computation paths. In another aspect of the invention, retiming and reformulation techniques are ... 02/23/06 - 20060039460 - Adaptive equalizer A channel impulse response is determined from a cross-correlation of a received training sequence and a stored version of the transmitted training sequence. The channel impulse response is iteratively cleansed of noise caused by the finiteness of the cross-correlation. Initial values of the tap weights for the taps of an ... 02/16/06 - 20060034363 - System and method for time-domain equalization in discrete multi-tone system A novel structure for the TEQ in a DMT system receiver to shorten the length of the effective channel impulse response is provided. A time-domain equalizer, based on the decision-feedback filter structure, along with a training method is disclosed. In accordance with the DFE-based TEQ in the DMT system, the ... 12/08/05 - 20050271138 - Adaptive signal latency control for communications systems signals An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of ... 12/08/05 - 20050271137 - System and method for adjusting multiple control loops using common criteria Data error such as mean square error may be reduced in a system such as a communication receiver using a dithering algorithm that adjusts one or more parameters in the system. The dithering algorithm may be applied to more than one parameter in a nested manner. The dithering algorithm may ... 12/08/05 - 20050271136 - Decision feedback equalizer circuit An equalization circuit adjusts (e.g., equalizes) an input signal according to the value of one or more adjustment signals (e.g., equalization coefficients) without a multiplication operation. For example, the circuit may add or subtract a value of a coefficient signal to the amplitude of an input signal. Here, whether the ... 12/01/05 - 20050265440 - Decision feedback equalization input buffer In a decision feedback equalization (DFE) input buffer, timing and voltage errors, such as those caused by inter-symbol interference (ISI), are fully compensated. A variable equalizing coefficient is applied that accommodates, and compensates for, a range of timing errors TE or voltage errors VE that may be generated over a ... 11/24/05 - 20050259728 - Low complexity equalizer A low complexity equalizer and its architecture are disclosed. The low complexity equalizer can identify and remove intersymbol interference caused by digital filters, analog filters, communication channel, channel-filtering and matched-channel filtering of the original transmitted signal. ... 11/24/05 - 20050259727 - Frequency-domain decision feedback equalizing device and method Disclosed is a frequency-domain decision feedback equalizing method and device for single carrier modulation, preferably for use in a broadband communication system, wherein in a first section a fast Fourier transformation is performed on a first vector of signals inputted, and as a result a second vector of signals is ... 11/17/05 - 20050254572 - Architecture for feedback loops in decision feedback equalizers A decision feedback equalizer (DFE) has an inter symbol interference (ISI) loop and inter chip interference (ICI) loop. A buffer at the input of the DFE loop receives a (CCK based data rate) signal coming into the DFE, retains a predetermined number of chips from each incoming symbol and assists ... 11/17/05 - 20050254571 - Decision feedback equalizer design with interference removal and reduced error propagation A method for designing a decision feedback equalizer (DFE) that handles packet based input data signals uses an inter symbol interference (ISI) removal loop and an inter chip interference (ICI) removal loop which is nested inside the ISI loop, for maximum interference removal and limited error propagation. The DFE may ... 11/17/05 - 20050254570 - Channel impulse response estimating decision feedback equalizer A decision feedback equalizer is operated by making first symbol decisions from an output of the decision feedback equalizer such that the first symbol decisions are characterized by a relatively long processing delay, by making second symbol decisions from the output of the decision feedback equalizer such that the second ... 11/17/05 - 20050254569 - System and method for generating equalization coefficients A least mean square (“LMS”) circuit generates equalization coefficients using demultiplexed data signals. Serial equalized data output by a decision feedback equalizer is demultiplexed into two or more parallel signals. The LMS clock signal is phase aligned with a retimer clock signal and demultiplexer clock signal to provide data to ... 11/17/05 - 20050254568 - Equalizer mode switch An apparatus for automatically selecting one of a standard decision directed mode and a soft dd mode in a decision feedback equalizer for receiving a data signal comprises an equalizer for providing a DFE output signal and having a control input responsive to a control signal exhibiting a first value ... 11/03/05 - 20050243908 - Decision feedback equalizer A decision feedback equalizer for processing a data signal provides concurrent equalizer outputs for hard decision directed and soft decision directed modes. The joint architecture in accordance with the present invention takes advantage of the fact, herein recognized, that for each equalizer output symbol soft decision bit representation, a subset ... 10/20/05 - 20050232348 - Apparatus and method for error propagation reduction in a decision feedback equalizer An error propagation reduction method is provided, for an equalizer comprising a forward equalizer and a decision feedback equalizer. First, an input signal is equalized to generate an equalized signal. The equalized signal is quantized to generate a quantized signal. The equalized signal is error decoded to generate a decoded ... 10/13/05 - 20050226316 - Adaptive equalizing apparatus and method The present invention provides an adaptive equalizing apparatus that can positively remove the leading ISI, and make a maximum-likelihood decoding and an optimum equalization on the basis of the result of the maximum-likelihood decoding with consideration being given to the asymmetry of an input waveform. The adaptive equalizing apparatus includes ... 09/29/05 - 20050213652 - Adaptive equalizer, decoding device, and error detecting device For a waveform containing a partial response and distortion in only the leading-edge portion of inter-symbol interference (ISI) of a waveform equalized by a prior-stage feedforward filter (FFF) so as to satisfy causality, equalization that does not consider postcursor ISI subsequent to the partial response is performed; a feedback filter ... 09/22/05 - 20050207485 - Pipelined adaptive decision feedback equalizer A pipelined adaptive decision feedback equalizer (DFE). The pipelined ADFE comprises a pre-processing unit, an adder, a feedback filter (FBF), a slicer, a delay unit, a weight-update block and a mapping circuit. The pre-processing unit comprising a plurality of PP coefficients filters a signal received from a channel, and outputs ... 09/01/05 - 20050190832 - Decision feedback equalizer with dynamic feedback control A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. ... 08/18/05 - 20050180498 - High speed decision feedback equalizer An equalizer comprises a sampler, a filter, and a summer. The sampler samples a signal indicative of an input communication signal to determine digital decision output signals having a communication device data rate. The filter receives digital decision output signals from the sampler and generates equalization signals therefrom. The summer ... 08/04/05 - 20050169361 - Computation of decision feedback equalizer coefficients with constrained feedback tap energy Directly computing Feed Forward Equalizer (FFE) coefficients and Feed Back Equalizer (FBE) coefficients of a Decision Feedback Equalizer (DFE) from a channel estimate. The FBE coefficients have an energy constraint. A recursive least squares problem is formulated based upon the DFE configuration, the channel estimate, and the FBE energy constraint. ... 07/28/05 - 20050163209 - Method and apparatus for the control of a decision feedback equalizer Input data segments of received symbols are continuously stored in a decision feedback equalizer buffer at a symbol rate S. Output data sections of received symbols are supplied from the decision feedback equalizer buffer at an output rate of nS such that void times separate the output data sections, and ... 07/21/05 - 20050157781 - Signal receiver with data precessing function In a data-precessing receiver, a sampling circuit generates a plurality of samples of an incoming signal and stores the plurality of samples one after another in a first storage buffer. A first subset of the plurality of samples are transferred from the first storage buffer to a decoder circuit in ... 06/23/05 - 20050135472 - Adaptive equalizer, decoding device, and error detecting device In a waveform equalizer for a communication apparatus, a magnetic recording apparatus, or an optical recording/reproducing apparatus, a feed-forward filter (FFF) is provided and, at a subsequent stage, a decision feedback equalizer (DFE) or a fixed delay tree search/decision feedback equalizer (FDTS/DFE) employing FDTS for a determination unit is provided. ... 06/23/05 - 20050135471 - Integrated decision feedback equalizer and clock and data recovery In an integrated decision feedback equalizer and clock and data recovery circuit one or more flip-flops and/or latches may be shared. One or more flip-flops and/or latches may be used in retiming operations in a decision feedback equalizer and in phase detection operations in a clock recovery circuit. Outputs of ... 06/23/05 - 20050135470 - Using clock and data recovery phase adjust to set loop delay of a decision feedback equalizer In a method and apparatus for communicating data, a decision feedback equalizer equalizes received data to reduce channel related distortion in the received data. An extracted clock signal is generated from the equalized data. The phase of the extracted clock signal may be adjusted to compensate for processing delay during ... 06/16/05 - 20050129107 - Equalizer/foward error correction automatic mode selector An apparatus for automatically selecting one of a standard decision directed mode and a soft dd mode in a decision feedback equalizer for receiving a data signal includes an equalizer utilizing forward error correction for providing first and second output signals corresponding to a DFE automatic switching mode and a ... 06/09/05 - 20050123034 - Method of initializing equalizer of digital television receiver and equalizer using the same A method of initializing en equalizer of VSB DTV receiver and an equalizer using the same are provided. The method includes the steps of: obtaining a channel estimation value by estimating an impulse response of a channel from a received signal, initializing the backward filter by using the channel estimation ... 06/02/05 - 20050117635 - Phase-compensation decision feedback channel equalizer and digital broadcasting receiver using the same There are provided a phase-compensation decision feedback channel equalizer. The phase-compensation decision feedback channel equalizer equalizes phases of signals outputted from a feedforward filter and a feedback filter regardless of a phase distorted by a carrier wave and a ghost, thereby satisfying the same ghost removal performance. ... ### FreshPatents.com Support |