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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Combined With Electrical Contact Or Lead > Ball Or Nail Head Type Contact, Lead, Or Bond > Layered Contact, Lead Or Bond Layered Contact, Lead Or BondLayered Contact, Lead Or Bond patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.12/27/07 - 20070296088 - Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument A semiconductor device comprising: a semiconductor element having a plurality of electrodes; a passivation film formed on the semiconductor element in a region avoiding at least a part of each of the electrodes; a conductive foil provided at a given spacing from the surface on which the passivation film is ... 10/25/07 - 20070246838 - Power semiconductor component, power semiconductor device as well as methods for their production A power semiconductor component (2) has a semiconductor body with a front face (7) and a rear face (9). The front face (7) has a front-face metallization (8), which provides at least one first contact pad (11). A structured metal seed layer (14) is provided as the front-face metallization (8), ... 08/23/07 - 20070194460 - Cap layer for an aluminum copper bond pad A bond pad for an electronic device such as an integrated circuit makes electrical connection to an underlying device via an interconnect layer. The bond pad has a first layer of a material that is aluminum and copper and a second layer, over the first layer, of a second material ... 05/03/07 - 20070096340 - Electronic assembly having graded wire bonding According to one aspect of the present invention, an electronic assembly is provided. The electronic assembly comprises a substrate with a lead connected thereto and first and second microelectronic components on the substrate. The first microelectronic component has first and second portions. A plurality of conductors interconnects the first microelectronic ... 02/01/07 - 20070023928 - Technique for efficiently patterning an underbump metallization layer using a dry etch process By patterning the underbump metallization layer stack on the basis of a dry etch process, significant advantages may be achieved compared to conventional techniques involving a highly complex wet chemical etch process. In particular embodiments, a titanium tungsten layer or any other appropriate last layer of an underbump metallization layer ... 10/19/06 - 20060231959 - Bonding pad for a packaged integrated circuit An integrated circuit is packaged using a package substrate that has a bottom side with a regular array of connection points and a top side with the integrated circuit on it. Vias in the package substrate provide electrical connection between the top and bottom sides. The vias have a via ... 09/14/06 - 20060202354 - Configuration for testing the bonding positions of conductive drops and test method for using the same Configuration for testing the bonding positions of conductive drops and test method by using the same is disclosed. In the invention, a special configured contact pad for setting a conductive drop and an associated wire pattern are useful for knowing the drop condition of single or several displaying panels. The ... 08/24/06 - 20060186553 - Semiconductor device An improved reliability of a junction region between a bonding wire and an electrode pad in an operation at higher temperature is presented. A semiconductor device 100 includes a semiconductor chip 102 provided on a lead frame 121, which are encapsulated with an encapsulating resin 115. Lead frames 119 are ... 08/17/06 - 20060180945 - Forming a cap above a metal layer In one embodiment, the present invention includes an apparatus having a metal layer with a pad disposed above a substrate; and a cap disposed above the metal layer having a first portion to provide for contact with a probe and a second portion to provide a bonding surface, and the ... 06/15/06 - 20060125117 - Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument A semiconductor device comprising: a semiconductor element having a plurality of electrodes; a passivation film formed on the semiconductor element in a region avoiding at least a part of each of the electrodes; a conductive foil provided at a given spacing from the surface on which the passivation film is ... 05/18/06 - 20060103031 - Semiconductor chip capable of implementing wire bonding over active circuits A semiconductor chip capable of implementing wire bonding over active circuits (BOAC) is provided. The semiconductor chip includes a bonding pad structure, a metal-metal capacitor formed by at least a pair of metal electrodes on the same plane underneath the bonding pad structure, at least an interconnection metal layer, at ... 04/06/06 - 20060071347 - Semiconductor device and fabrication method thereof In a semiconductor device and a fabrication method thereof according to the present invention, a second insulating film is formed on a second surface of a semiconductor substrate whose first surface has been formed with a first insulating film and an electrode pad, and an opening is made in a ... 03/16/06 - 20060055060 - Copper interconnect An improved wire bond with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductor lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond wherein the bond pad on a surface of ... 03/16/06 - 20060055059 - Copper interconnect An improved wire bond with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductor lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond wherein the bond pad on a surface of ... 03/16/06 - 20060055058 - Copper interconnect An improved wire bond with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductor lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond wherein the bond pad on a surface of ... 03/16/06 - 20060055057 - Copper interconnect An improved wire bond with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductor lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond wherein the bond pad on a surface of ... 02/09/06 - 20060027936 - Method for processing base Electrodes and an insulating film are both formed of materials which have characteristics that they are solid and do not exhibit adhesiveness at a room temperature, exhibit adhesiveness at and above a first temperature higher than this, and are cured at and above a second temperature higher than this. Planarication ... 12/29/05 - 20050285278 - Markings for use with semiconductor device components A marking for a semiconductor device component includes a plurality of adjacent, mutually adhered regions. The marking is configured to contrast visually with a semiconductor device component, and may include features that are configured to protrude from the semiconductor device component recessed features to provide desired indicia. Materials that contrast ... 10/13/05 - 20050224991 - Bump for semiconductor package, semiconductor package applying the bump, and method for fabricating the semiconductor package The present invention discloses a bump for a semiconductor package, a semiconductor package applying the bump, and a method for fabricating the semiconductor package. As a second bump unit contacting an electrode terminal of a PCB has a smaller width than a first bump unit contacting an electrode pad of ... 09/15/05 - 20050200029 - Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument A semiconductor device comprising: a semiconductor element having a plurality of electrodes; a passivation film formed on the semiconductor element in a region avoiding at least a part of each of the electrodes; a conductive foil provided at a given spacing from the surface on which the passivation film is ... 07/21/05 - 20050156331 - Semiconductor devices having stereolithographically fabricated protective layers thereon through which contact pads are exposed and assemblies including the same A method for forming packaged substrates includes using a stereolithographic process to form a protective dielectric polymeric sealing structure on at least the active surface of the substrate which includes one or more flip-chip dice. In addition, the invention encompasses forming a similar layer on a second substrate to be ... 07/21/05 - 20050156330 - Through-wafer contact to bonding pad An integrated circuit with conductive channels connecting the bonding pads to alternative surfaces of the IC chip is disclosed. Typically the channels would be formed by reactive ion etching, passivated and then filled with copper or other conductive material. The channels may be formed at alternative points in the wafer ... 06/09/05 - 20050121804 - Chip structure with bumps and testing pads A chip structure comprising a semiconductor substrate, a plurality of dielectric layers, a plurality of circuit layers, a passivation layer, a metal layer and at least a bump. The semiconductor substrate has a plurality of electronic devices positioned on a surface layer of the semiconductor substrate. The dielectric layers are ... ### FreshPatents.com Support |