Bump Leads

Bump Leads patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

01/31/08 - 20080023833 - Solder bumps in flip-chip technologies
A solder bump structure and method for forming the same. The structure includes (a) a dielectric layer including a dielectric layer top surface (b) an electrically conductive bond pad on and in direct physical contact with the dielectric layer top surface; (c) a patterned support/interface layer on the dielectric layer ...

01/24/08 - 20080017983 - Flip-chip semiconductor package and chip carrier thereof
The present invention discloses a flip-chip semiconductor package and a chip carrier thereof. The chip carrier includes a groove formed around a chip-mounting area. The groove may be formed along a periphery of the chip-mounting area or at corners thereof. The groove is filled with a filler of low Young's ...

01/24/08 - 20080017982 - Semiconductor chip and method for manufacturing same, electrode structure of semiconductor chip and method for forming same, and semiconductor device
A semiconductor chip according to the present invention includes a semiconductor substrate, a bump of a metal projecting from a surface of the semiconductor substrate, and an alloy film covering the entire surface of the bump, the alloy film being composed of an alloy of the metal of the bump ...

01/24/08 - 20080017980 - Chip having two groups of chip contacts
A chip (1) has a substrate (2), an integrated circuit (3) provided on the substrate (2), a plurality of conductor zones (ME1, ME2, ME3, ME4, ME5) and a passivating layer (5) provided to protect the conductor zones and the integrated circuit, through-holes (6, 7) being provided in the passivating layer ...

01/17/08 - 20080012130 - Semiconductor device, circuit substrate, electro-optic device and electronic appliance
A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive ...

01/03/08 - 20080001288 - Semiconductor device and manufacturing method thereof, semiconductor package, and electronic apparatus
A terminal pad is formed on an active surface of an LSI chip, and a composite barrier metal layer is provided over this terminal pad. In the composite barrier metal layer, a plurality of low-elasticity particles composed of a silicone resin is dispersed throughout a metal base phase composed of ...

12/20/07 - 20070290342 - Semiconductor device
The first external electrode has a main body portion a part of which is buried in a side wall of a case and joining portions protruding from an end of the main body portion toward the inside of the case. Each joining portion of the first external electrode is formed ...

12/13/07 - 20070284739 - Top layers of metal for high performance ic's
A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within ...

12/06/07 - 20070278674 - Power semiconductor arrangement with soldered clip connection and method
A power semiconductor arrangement with soldered clip connection and a method for producing such an arrangement is disclosed. One embodiment provides a semiconductor chip with soldered clip connection. A solderable front-side power metallization layer is provided. A gate finger structure is provided. A structured passivation layer is provided for the ...

11/29/07 - 20070273025 - Device comprising circuit elements connected by bonding bump structure
A bonding-bump (1) of small dimensions comprises a gold pedestal portion (2) formed on a circuit element (10), a nickel barrier layer (3) formed on the pedestal portion (2), and a soldering portion (5) formed on the barrier layer (3). The soldering portion (5) comprises first (6) and second (8) ...

11/15/07 - 20070262447 - Circuit board, method for manufacturing the same, and semiconductor device
A circuit board 1 having a base material 10 and an electrode 11 formed on at least one main surface of the base material 10 includes an easy peeling portion 12 formed in at least one of an inner portion and a side portion of the electrode 11, with the ...

11/08/07 - 20070257365 - Packaged semiconductor chip comprising an integrated circuit chip ablated with laser and cut with saw blade from wafer
A packaged semiconductor chip comprising an integrated circuit chip including a low-k dielectric layer and a chip substrate, wherein an edge of the integrated circuit chip has a first edge portion and a second edge portion. At least part of the first edge portion being across a same level as ...

11/08/07 - 20070257364 - Methods of reactive composite joining with minimal escape of joining material
The present inventors have observed that in some applications of reactive composite joining there is escape of a portion of the molten joining material through the edges of the joining regions. Such escape is not only a waste of expensive material (e.g. gold or indium) but also a reduction from ...

11/08/07 - 20070257362 - Process for forming bumps and solder bump
There is provided a process for forming bumps wherein a plurality of fine bumps are uniformly formed with high productivity. In this process, a resin (13) comprising solder powder and a convection additive (12) is supplied onto a substrate (10) having a plurality of electrodes (11) thereon. And subsequently the ...

11/01/07 - 20070252275 - Chip packaging structure
A chip structure comprising a chip, a redistribution layer, a second passivation layer and at least a bump is provided. The chip has a first passivation layer and at least a bonding pad. The first passivation layer exposes the bonding pad and has at least a recess. The redistribution layer ...

11/01/07 - 20070252274 - Method for forming c4 connections on integrated circuit chips and the resulting devices
A method for forming preferably Pb-lead C4 connections or capture pads with ball limiting metallization on an integrated circuit chip by using a damascene process and preferably Cu metallization in the chip and in the ball limiting metallization for compatibility. In two one embodiment, the capture pad is formed in ...

10/25/07 - 20070246828 - Semiconductor device and method of manufacturing the same
There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad formed on a surface of the electrode pad ...

10/11/07 - 20070235871 - High frequency ic package and method for fabricating the same
A high frequency IC package mainly includes a substrate, a bumped chip, and a plurality of conductive fillers where the substrate has a plurality of bump holes penetrating from the top surface to the bottom surface. The active surface of the chip is attached to the top surface of the ...

10/04/07 - 20070228562 - Electronic packaging using conductive interproser connector
Formation of a plurality of conductive connectors of an integrated circuit package is described. The conductive connectors made with a conductive elastomer material and formed using an interposer that includes a plurality of the conductive connectors linked together. ...

09/27/07 - 20070222072 - Chip package and fabricating method thereof
A chip package including a chip, a package substrate, and a plurality of bumps is provided. The chip has a plurality of chip pads disposed on a surface of the chip. The package substrate has a plurality of first substrate pads, a plurality of second substrate pads, and a surface ...

09/20/07 - 20070216026 - Aluminum bump bonding for fine aluminum wire
The invention includes a packaged semiconductor device in which the bond wires are bonded to the leads with an aluminum bump bond. The semiconductor device is mounted on a leadframe having leads with a nickel plating. To form the bump bond between a fine aluminum wire, such as a 2 ...

09/13/07 - 20070210452 - Bump structure and method of manufacturing the same, and mounting structure for ic chip and circuit board
The invention provides a bump structure whose mounting position, shape, and size are favorably controlled and to a method of manufacturing the same. The bump structure of the invention can be provided on an insulating layer and includes a protruding part made of resin obtained by hardening a liquid material ...

08/16/07 - 20070187825 - Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument
The present invention is a semiconductor device capable of relieving thermal stress without breaking wire. It comprises a semiconductor chip (12), a solder ball (20) for external connection, wiring (18) for electrically connecting the semiconductor chip (12) and the solder ball (20), a stress relieving layer (16) provided on the ...

08/16/07 - 20070187824 - Semiconductor device with signal line having decreased characteristic impedance
A semiconductor device includes a semiconductor chip, electrodes pads, first and second insulating layers, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The first insulating layer is formed on the first and second ...

08/16/07 - 20070187823 - Semiconductor device
An object of the present invention is to establish, for an LSI having a stacked interconnection structure of Cu interconnect/Low-k material, a narrow pitch wire bonding technique enabling a reduction in damage to a bonding pad and application similar to the conventional LSI of an aluminum interconnection. In a semiconductor ...

08/16/07 - 20070187822 - Patterned gold bump structure for semiconductor chip
A patterned gold bump structure for a semiconductor chip comprises at least a patterned gold bump disposed on an insulating layer of a semiconductor chip, wherein the gold bump is used as a circuit component or a passing line. In some embodiments, the circuit component is a capacitor, a resistor, ...

08/16/07 - 20070187821 - Chip with bump structure
A chip with a bump structure comprises a chip, a plurality of pads and a plurality of bumps. The chip includes a microcircuit fabricated by integrated circuit technique. The pads are metallized portions of the chip for electrical connection. The bumps are metal bulges on the pads of the chip ...

08/09/07 - 20070182011 - Method for forming a redistribution layer in a wafer structure
The present invention relates to a method for forming a redistribution layer in a wafer structure. The method comprises: (a) providing a wafer having a plurality of conductive structures and a first passivation layer thereon, wherein the first passivation layer covers the wafer except the conductive surfaces of the conductive ...

08/09/07 - 20070182010 - Embossing processes for substrate imprinting, structures made thereby, and polymers used therefor
A mounting substrate includes an imprinted structure on one side for containing electrical bumps. The imprinted structure is imprinted and also cured under conditions that allow retention of significant features of the cured polymer film. A chip package is also made of the imprinted structure. A computing system is also ...

08/09/07 - 20070182008 - Substrate and method for mounting silicon device
A substrate on which a silicon device is mounted in accordance with an embodiment of the present invention includes a plurality of protrusions extending upward from a top surface of the substrate and a solder layer formed on the top of the substrate such that the plurality of protrusions extends ...

08/09/07 - 20070182007 - Solder bump on a semiconductor substrate
A solder bump on a semiconductor substrate is provided. The solder bump comprises a semiconductor substrate having a top copper pad thereon, a protective layer on the semiconductor substrate and at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad, wherein ...

08/09/07 - 20070182006 - Semiconductor device with an improved solder joint
A semiconductor device with an improved solder joint system is described. The solder system includes two copper contact pads connected by a body of solder and the solder is an alloy including tin, silver, and at least one metal from the transition groups IIIA, IVA, VA, VIA, VIIA, and VIIIA ...

08/02/07 - 20070176290 - Wafer level chip scale package having a gap and method for manufacturing the same
A wafer level chip scale package may have a gap provided between a solder bump and a bump land. The gap may be filled with a gas. A method of manufacturing a wafer level chip scale package may involve forming a redistribution line having a first opening, forming a seed ...

08/02/07 - 20070176289 - Plastic ball grid array package with integral heatsink
A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient ...

08/02/07 - 20070176288 - Solder wall structure in flip-chip technologies
A structure and method for forming the same. The semiconductor structure includes a first semiconductor chip and N solder bumps in direct physical contact with the first semiconductor chip, wherein N is a positive integer. The semiconductor structure also includes a first solder wall on a perimeter of the first ...

07/19/07 - 20070164432 - Semiconductor device having alignment post electrode and method of manufacturing the same
A semiconductor device includes a semiconductor substrate which has a plurality of semiconductor device formation regions and alignment mark formation region having the same planar size as that of the semiconductor device formation region, a plurality of post electrodes which are formed in each semiconductor device formation region, and an ...

07/12/07 - 20070158841 - Structure of ball grid array package
A structure of Ball Grid Array package (BGA) is provided. The plurality of bumps are attached on a substrate when processed the surface mount technology (SMT) may get stronger support, avoid the assembly structure disintegration when bearing an external force. When user uses a semi-conductor module, the assembly structure will ...

07/12/07 - 20070158840 - Electronic device and method for bonding an electronic device
An electronic device (1) has a base plate (2) and an electronics housing (3) connected thereto, with a bond contact bearer (5). The latter rests on the base plate (2) via a supporting body (6) in such a manner that the supporting body (6) exerts a pretension force onto the ...

07/05/07 - 20070152330 - Package structure and manufacturing method thereof
A package structure and a manufacturing method thereof are provided. The package structure includes a chip, a substrate and a solder. The chip includes a bump disposed on the surface of the chip. The substrate includes a pad and a solder resistor layer. The pad is disposed on the surface ...

06/14/07 - 20070132099 - Semiconductor device and method of manufacture thereof, circuit board and electronic instrument
A semiconductor device, including a semiconductor chip having electrodes, a substrate having an interconnect pattern, and an adhesive, the adhesive having a first portion and a second portion, the first portion interposed between a surface of the substrate on which the interconnect pattern is formed and a surface of the ...

06/14/07 - 20070132098 - Elastic conductive resin, and electronic device including elastic conductive bumps made of the elastic conductive resin
An electronic device includes an electronic part including at least one first electrode, a substrate including at least one second electrode, and at least one bump formed on the at least one first electrode and formed from an elastic conductive resin including a resin having rubbery elasticity, and an acicular ...

06/14/07 - 20070132097 - Projected contact structures for engaging bumped semiconductor devices
A bumped semiconductor device contact structure is disclosed including at least one non-planar contact pad having a plurality of projections extending therefrom for contacting at least one solder ball of a bumped integrated circuit (IC) device, such as a bumped die and a bumped packaged IC device. The projections are ...

05/31/07 - 20070120253 - Core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof
A core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof are disclosed. With the method of manufacturing a core substrate using paste bumps comprising: (a) aligning a pair of paste bump boards, each of which has a plurality of paste bumps joined to its surface, ...

05/24/07 - 20070114663 - Alloys for flip chip interconnects and bumps
The present invention provides alloys for forming sputtered under bump metallization seed layers and electroplated or otherwise deposited bump metallurgy. The alloys of the present invention are comprised of silver with gold or palladium, copper with gold, or gold with nickel or palladium which provide suitable sputtering and electrical characteristics ...

05/24/07 - 20070114662 - Interconnecting element between semiconductor chip and circuit support and method
One aspect of the invention relates to an interconnecting element between a semiconductor chip of a semiconductor wafer and a circuit support and to a method for producing and using the interconnecting element. Such interconnecting elements are arranged between contact areas of a semiconductor chip of a semiconductor wafer and ...

05/24/07 - 20070114661 - Semiconductor package and method of fabricating the same
Provided are a semiconductor package which is small in size but includes a large number of terminals disposed at intervals equal to or greater than a minimum pitch, and a method of fabricating the semiconductor package. The semiconductor package includes a semiconductor chip having a bottom surface on which a ...

05/17/07 - 20070108610 - Embedded semiconductor device substrate and production method thereof
An embedded semiconductor device substrate having a semiconductor device integrated therein is formed by disposing a semiconductor device in an opening provided on an insulating resin, and sandwiching the semiconductor device and the insulating resin with a front surface wiring layer and a rear surface wiring layer and performing heat ...

05/17/07 - 20070108609 - Bumped chip carrier package using lead frame and method for manufacturing the same
A bumped chip carrier (BCC) package may include a semiconductor chip on which at least one bonding pad is formed, at least one lead frame terminal arranged close to the semiconductor chip, wherein a lower portion of the lead frame terminal is located beneath a bottom side of the semiconductor ...

05/10/07 - 20070102817 - Method and apparatus for reducing electrical interconnection fatigue
A method and apparatus is provided that pertains to resisting crack initiation and propagation in electrical interconnections between components and substrates in ball grid array microelectronic packages. A hybrid of dielectric defined and non-dielectric defined electrical interconnects reduces the potential for electrical interconnection failure without having to control the dielectric ...

05/10/07 - 20070102816 - Board structure, a ball grid array (bga) package and method thereof, and a solder ball and method thereof
A board structure, a ball grid array (BGA) package and method thereof and a solder ball and method thereof. The example solder ball may include a solder portion and a grooved connection portion, formed through a partitioning process, configured to fit a corresponding protruding portion on a board. The example ...

05/10/07 - 20070102815 - Bumping process with self-aligned a1-cap and the elimination of 2nd passivation layer
The present invention provides a simplified process end flow for a flip chip device. This process flow, beginning with the deposition of a final metal layer for the IC, also includes the deposition of the UBM layer on top of the metal layer. The UBM layer and IC final metal ...

05/03/07 - 20070096317 - Semiconductor device featuring electrode terminals forming superior heat-radiation system
In a semiconductor device including a semiconductor chip featuring opposite first and second principal faces, and side faces extending therebetween, a first electrode layer is formed on the first principal face, and a second electrode layer is formed on the second principal face. A first metal electrode terminal is electrically ...

05/03/07 - 20070096316 - Contact pad structure for flip chip semiconductor die
A flip chip Schottky die is provided, which includes three contact bumps extending from a top surface of the die for electrically connecting with a board, a first and second bump being cathode contacts, and a third bump being an anode contact and having a larger surface than each of ...

05/03/07 - 20070096315 - Ball contact cover for copper loss reduction and spike reduction
Embodiments of the invention generally provide a method and apparatus for processing a substrate in an electrochemical mechanical planarizing system. In one embodiment, a contact assembly for electrochemically processing a substrate includes a housing having a ball disposed in a passage formed through the housing. The ball is adapted to ...

05/03/07 - 20070096314 - Semiconductor device and manufacturing method thereof
A semiconductor device of the invention includes a semiconductor element (1), an interposer (5) having electrodes (2) arranged on a top face thereof in four directions and external electrodes (4) arranged on a bottom face thereof with the semiconductor element (1) mounted on the top face thereof, an adhesive material ...

05/03/07 - 20070096313 - Semiconductor chip with post-passivation scheme formed over passivation layer
The invention provides a semiconductor chip comprising an interconnecting structure over said passivation layer. The interconnecting structure comprises a first contact pad connected to a second contact pad exposed by an opening in a passivation layer. A metal bump is on the first contact pad and over multiple semiconductor devices, ...

04/26/07 - 20070090528 - Device, and manufacturing method for the device
A device comprises a plurality of first electrodes which are arranged on a surface of a substrate at predetermined space, a component which has an elasticity and a longitudinal axis, a plurality of conductors which are applied to a surface of said component at predetermined space, and each of which ...

04/26/07 - 20070090527 - Integrated chip device in a package
The present invention relates to an integrated chip device in a package, including an integrated chip, a substrate comprising a redistribution wiring, a contact element and a contact pad on a common surface of the substrate, wherein the contact element is in electrical contact with the contact pad, wherein the ...

04/19/07 - 20070085206 - Chip packaging process
A chip packaging process includes providing a wafer, having an active surface and a backside. The wafer has a first chip area and a second chip area adjacent to the first chip area. The wafer has several first and second bond pads on the active surface in the first and ...

04/19/07 - 20070085205 - Semiconductor device with electroless plating metal connecting layer and method for fabricating the same
A semiconductor device with electroless plating metal connecting layer and a method for fabricating the same are proposed. A supporting board with at least one cavity is provided. At least one semiconductor chip with a plurality of copper electrode pads is received in the cavity and an insulating protecting layer ...

04/19/07 - 20070085204 - Chip scale power ldmos device
A semiconductor device includes at least one macro-cell device, the macro-cell device comprising a plurality of LDMOS devices. A first conductive layer is formed over the substrate, the first conductive layer providing source and drain contacts for the macro-cell device. A first isolation layer is formed over the first conductive ...

04/12/07 - 20070080454 - Flip-chip type assembly
A structure for sufficiently alleviating the thermal stress between an LSI and substrate and allowing the LSI to be detached from a substrate easily is provided. In a flip-chip type assembly according to the present invention, an interposer made of silicon intervenes between the device and the substrate. The LSI ...

04/12/07 - 20070080453 - Semiconductor chip having a bump with conductive particles and method of manufacturing the same
A semiconductor chip includes a plurality of chip pads and a plurality of bumps formed on respective chip pads, each bumps including a bump main body and a conductive particle disposed on the bump main body and exposed to the air, the conductive particle including an elastic portion made of ...

04/12/07 - 20070080452 - Bump structure and its forming method
A bump structure mainly includes a metal core, a buffer encapsulant, and a metal cap where the metal core is a stud bump formed by wire bonding. The buffer encapsulant encapsulates the metal core. A metal cap is formed on the top surface of the buffer encapsulant and is electrically ...

04/12/07 - 20070080451 - Intermetallic solder with low melting point
Embodiments of the invention provide a low-melting temperature comprised primarily of a bulk intermetallic phase material. This solder may allow reflow with less of a chance to damage microelectronic devices due to coefficient of thermal expansion mismatches, and may be creep resistant even at high homologous temperatures. ...

04/12/07 - 20070080450 - Wafer level laser marking system for ultra-thin wafers using support tape
A wafer level marking system is provided including: providing a wafer, a wafer frame, and a support tape; mounting the wafer and the wafer frame on the support tape; and marking the wafer through the support tape. ...

04/05/07 - 20070075426 - Wiring board
A flexible insulating base, a plurality of conductor wirings aligned on the flexible insulating base, and bump electrodes provided respectively in end portions of the plurality of conductor wirings in a region where a semiconductor chip is to be placed are provided. The semiconductor chip is mounted on the conductor ...

04/05/07 - 20070075425 - Semicondictor device and manufacturing method of the same
The invention prevents a pad electrode for external connection of a semiconductor device from being damaged. An electronic circuit, a first pad electrode connected to the electronic circuit, and a second pad electrode connected to the first pad electrode are formed on a semiconductor substrate. A first protection film is ...

04/05/07 - 20070075424 - Semiconductor chip and semiconductor device
In the peripheral part of a semiconductor chip, third electrode pads for wire bonding and plate wiring and first electrode pads dedicated to wire bonding are provided. On the other hand, second electrode pads dedicated to plate wiring are provided on an inner part away from the edge of the ...

04/05/07 - 20070075423 - Semiconductor element with conductive bumps and fabrication method thereof
A semiconductor element with conductive bumps and a fabrication method thereof are provided. The fabrication method includes providing a semiconductor element having a plurality of bond pads formed on an active surface thereof, wherein each of the bond pads has a predetermined bonding area; applying a passivation layer on the ...

04/05/07 - 20070075422 - Electronic device, semiconductor device using same, and method for manufacturing semiconductor device
Disclosed is an electronic device comprising a substrate, a bump formed on a substrate surface and composed of a first metal material, a junction film for connection with an electrical connecting portion of another device which is formed on the top face of the bump and composed of a second ...

03/29/07 - 20070069378 - Semiconductor module and method of forming a semiconductor module
In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is ...

03/22/07 - 20070063346 - Display device and manufacturing method of the same
A display device includes a drive circuit chip, and a substrate on which the drive circuit chip is mounted. The drive circuit chip includes a semiconductor substrate, an insulation layer, a first conductive layer and a second conductive layer formed of metal between the semiconductor substrate and the insulation layer, ...

03/22/07 - 20070063345 - Semiconductor device
A semiconductor device including: a semiconductor chip; a plurality of electrodes formed on the semiconductor chip and arranged along one side of the semiconductor chip; a resin protrusion formed on the semiconductor chip and extending in a direction which intersects the side; and a plurality of electrical connection sections formed ...

03/22/07 - 20070063344 - Chip package structure and bumping process
A chip package structure including a first substrate, a second substrate, bumps and adhesive blocks is provided. The first substrate has first bonding pads. The second substrate is disposed above the first substrate and has second bonding pads. The bumps are respectively arranged on the first bonding pads or the ...

03/15/07 - 20070057370 - Semiconductor device
A semiconductor device including: a semiconductor chip in which an integrated circuit is formed; a plurality of electrodes formed in a first region of the semiconductor chip and arranged in a plurality of rows and a plurality of columns; a plurality of resin protrusions formed in a second region of ...

03/15/07 - 20070057369 - Wiring board and method for manufacturing the same, and semiconductor device
A wiring board includes: an insulating base; a plurality of conductive wirings; and bumps formed on the conductive wirings, respectively. The conductive wirings can be connected with electrode pads of a semiconductor element via the bumps. The conductive wirings include a connection terminal portion at an end portion opposite to ...

03/08/07 - 20070052095 - Semiconductor device and manufacturing method thereof
Provided is a technology capable of improving the reliability of a semiconductor device using WPP by preventing a short-circuit failure between uppermost-level interconnects. In the present invention, a buffer layer is formed between an uppermost-level interconnect and redistribution interconnect. The uppermost-level interconnect is made of a copper film, while the ...

03/08/07 - 20070052094 - Semiconductor wafer level chip package and method of manufacturing the same
A semiconductor chip package may include one or more conductive patterns provided on a front surface of a wafer. An encapsulation layer may cover at least the front surface of the wafer. Chip plugs may be electrically connected to the conductive patterns, and may be embedded in a rear surface ...

03/01/07 - 20070045842 - Lead-containing solder bumps
The invention includes solder materials having low concentrations of alpha particle emitters, and includes methods of purification of materials to reduce a concentration of alpha particle emitters within the materials. The invention includes methods of reducing alpha particle flux in various lead-containing and lead-free materials through purification of the materials. ...

03/01/07 - 20070045841 - Semiconductor chip, display panel using the same, and methods of manufacturing semiconductor chip and display panel using the same
A semiconductor chip and manufacturing method thereof, the semiconductor chip including a plurality of bumps connected to a driving circuit integrated on a semiconductor substrate and an organic insulating layer disposed on the driving circuit. The organic insulating layer extends from the semiconductor substrate less than the plurality of bumps ...

03/01/07 - 20070045840 - Method of solder bumping a circuit component and circuit component formed thereby
A circuit component and method by which degradation of a solder connection by electromigration can be prevented or reduced. The component generally includes an interconnect pad on a surface of the component, a metallic multilayer structure overlying the interconnect pad and having a solderable surface layer, and a solder material ...

02/22/07 - 20070040273 - Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods
Methods for packaging microelectronic devices, microelectronic workpieces having packaged dies, and microelectronic devices. One aspect of the invention is directed toward a microelectronic workpiece comprising a substrate having a device side and a backside. In one embodiment, the microelectronic workpiece further includes a plurality of dies formed on the device ...

02/22/07 - 20070040272 - Method of packaging and interconnection of integrated circuits
A semiconductor chip packaging on a flexible substrate is disclosed. The chip and the flexible substrate are provided with corresponding raised and indented micron-scale contact pads with the indented contact pads partially filled with a liquid amalgam. After low temperature amalgam curing, the chip and the substrate form a flexible ...

02/15/07 - 20070035022 - Semiconductor device and method of manufacturing the same
A semiconductor device, including: a semiconductor layer; an electrode pad formed above the semiconductor layer; an insulating layer formed over the electrode pad and having an opening which exposes at least part of the electrode pad; and a bump formed at least in the opening. The bump includes: a first ...

02/15/07 - 20070035021 - Printed circuit board and electronic apparatus including printed circuit board
According to one embodiment, a printed circuit board includes a printed wiring board, a semiconductor package, an adhesive and a stepped portion. The printed wiring board has a plurality of pads. The semiconductor package has a plurality of connection terminals corresponding to the pads and is mounted on the printed ...

02/15/07 - 20070035020 - Semiconductor apparatus and semiconductor module
A semiconductor apparatus includes a semiconductor substrate, a through-electrode, a solder bump, and a circuit element. The semiconductor substrate has an electronic device formed on its front face. The through-electrode extends through the semiconductor substrate. The solder bump is disposed on the front side of the semiconductor substrate. The circuit ...

02/08/07 - 20070029673 - Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
A semiconductor device includes a semiconductor substrate in which an integrated circuit is formed and which includes interconnects and electrodes, the interconnects electrically connected with the semiconductor substrate, and the electrodes being formed on the interconnects; a resin layer formed on the semiconductor substrate; redistribution interconnects electrically connected with the ...

02/08/07 - 20070029672 - Semiconductor device
A semiconductor device including: a semiconductor substrate on which a plurality of electrodes are formed; a plurality of resin protrusions formed on the semiconductor substrate, arranged along a straight line, and extending in a direction which intersects the straight line; and a plurality of electrical connection sections formed on the ...

02/08/07 - 20070029671 - Semiconductor device
A semiconductor device includes a semiconductor substrate having an electrode and a conductive pad; a resin projection formed on the semiconductor substrate; and a wiring electrically connected to the electrode, the wiring having a first portion formed on the electrode, a second portion formed on the conductive pad and a ...

02/08/07 - 20070029670 - Semiconductor device and radiation detector employing it
A wiring substrate 20, comprising a glass substrate, formed by integrally bundling a plurality of glass fibers and provided with through holes 20c, and conductive members 21, disposed at through holes 20c, is used. Input portions 21a of conductive members 21, formed on an input surface 20a of this wiring ...

02/01/07 - 20070023906 - Semiconductor device-composing substrate and semiconductor device
A semiconductor device-composing substrate 10 has a support base 12, an interconnect layer 14 including interconnects 13, and an insulating resin layer 16. The semiconductor device-composing substrate 10 also has a mounting region D1 on which a semiconductor chip 30 is to be mounted. The insulating resin layer 16 is ...

02/01/07 - 20070023905 - Semiconducting device with folded interposer
Some embodiments of the present invention relate to a semiconducting device that includes an interposer having a fold which divides the interposer into a first section and a second section. A first die is attached to a first surface of the interposer at the first and second sections of the ...

02/01/07 - 20070023904 - Electro-optic interconnection apparatus and method
A construction for attaching an optical fiber to an electro-optic chip is described. The construction includes support for the optical fiber, optionally provided by an aperture in a supporting copper sheet. High density interconnection circuits are fabricated on the copper sheet. Pillar-in-well connections are used between the electro-optic chip and ...

02/01/07 - 20070023903 - Semiconductor device, electronic module, and method of manufacturing electronic module
A semiconductor device including: a semiconductor chip having an electrode; a plurality of resin protrusions formed on a surface of the semiconductor chip on which the electrode is formed, heights of the resin protrusions increasing as a distance from a center of the surface of the semiconductor chip increases; and ...

02/01/07 - 20070023902 - Semiconductor package with ferrite shielding structure
A semiconductor device comprises at the wafer level one or more ferrite structures adapted to dampen high frequency noise potentially apparent at signal lines and termination points within the semiconductor device. Related methods of forming said ferrite structures are also disclosed. ...

01/25/07 - 20070018321 - Multi-component integrated circuit contacts
An integrated circuit connection is describe that includes a first, securing member and a second, connection member. The first member, in an embodiment, is a spike that has a portion of its body fixed in a layer of an integrated circuit structure and extends outwardly from the integrated circuit structure. ...

01/25/07 - 20070018320 - Semiconductor chip production method, semiconductor device production method, semiconductor chip, and semiconductor device
A semiconductor chip production method including the steps of: forming a front side recess in a semiconductor substrate; depositing a metal material in the front side recess to form a front side electrode electrically connected to a functional device formed on the front surface; removing a rear surface portion of ...

01/25/07 - 20070018319 - Ball grid array package and substrate within
A ball grid array (BGA) package includes a substrate and a chip. A bottom surface of the substrate includes a central area and a marginal area. Several source balls are disposed in the central area. Several ball groups are disposed in the marginal area. Each ball group includes one ground ...

01/25/07 - 20070018318 - Means of integrating a microphone in a standard integrated circuit process
A means of integrating a microphone on the same integrated circuit die as other electronics in the system is disclosed. The structure is based on using solder bump technology to form a gap between an electrode on the silicon and another electrode. Charge is stored on the capacitor so when ...

01/18/07 - 20070013067 - Electronic component mounting method and apparatus
A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is ...

01/18/07 - 20070013066 - Semiconductor package and fabrication method thereof
A semiconductor package and a fabrication method thereof are provided. The fabrication method includes the steps of preparing a chip having a plurality of conductive bumps formed on an active surface thereof; preparing a tape having a first surface and an opposed second surface, wherein the tape has a plurality ...

01/18/07 - 20070013065 - Semiconductor device
A semiconductor device, including: a semiconductor layer; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer connected to the first conductive layer and having a second width which is smaller than the first width; an interlayer dielectric formed above the first ...

01/11/07 - 20070007651 - Semiconductor device
A semiconductor device including: a semiconductor substrate including an electrode; a resin protrusion formed on the semiconductor substrate and including a plurality of first portions and a second portion disposed between two of the first portions adjacent to each other; and an interconnect electrically connected to the electrode and extending ...

01/11/07 - 20070007650 - Driver device and display device
Disclosed is a device which comprises a substrate, a plurality of signal output terminal electrodes provided on the substrate, a plurality of signal input terminal electrodes provided on the substrate, and a display driver IC having input terminals thereof connected to the signal input terminal electrodes and output terminals thereof ...

01/04/07 - 20070001302 - Semiconductor device and manufacturing method of the same
The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate, a first passivation film covering an end portion of the pad electrode and having a first opening on the pad electrode, a plating layer formed on the ...

12/28/06 - 20060289991 - Semiconductor device and manufacturing method of the same
The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate with insulation films interposed therebetween, a plating layer formed on the pad electrode, a conductive terminal formed on the plating layer and electrically connected with the pad ...

12/21/06 - 20060284315 - Semiconductor device and circuit board
A semiconductor device 1 includes a silicon substrate 5, a semiconductor chip 2 placed on a surface S1 of the silicon substrate 5, a protruding electrode 6 (first protruding electrode) provided on a surface S2 of the semiconductor chip 2 opposite to the silicon substrate 5, and another protruding electrode ...

12/21/06 - 20060284314 - Multi-package module and electronic device using the same
A package substrate for a multi-package module. The package substrate comprises a substrate having a die region and at least one thermal channel region outwardly extending to an edge of the substrate from the die region. An array of bumps is arranged on the substrate except in the die and ...

12/21/06 - 20060284313 - Low stress chip attachment with shape memory materials
Some embodiments of the present invention include low stress chip attachment with shape memory materials. ...

12/14/06 - 20060278984 - Semiconductor device
The present invention provides a semiconductor device exhibiting an improved reliability. A semiconductor device comprises a semiconductor chip having an electrode on a surface thereof and a mounting substrate, and the electrode (aluminum electrode) of the semiconductor chip is coupled to the mounting substrate through a bump (solder bump 104). ...

12/14/06 - 20060278983 - Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus
A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically ...

12/14/06 - 20060278982 - Metal bump with an insulation for the side walls and method of fabricating a chip with such a metal bump
A chip with at least two metal bumps (6a, 6b) which has insulation layers for opposing side walls which are deposited in a plasma activated gas. Predetermined portions of the insulation layer (7) are removed by reactive ion etching. The metal bumps can be formed of a noble metal and ...

11/30/06 - 20060267197 - Integrated circuit device
A integrated circuit device made using LCD-COG (liquid crystal display-chip on glass) technique is disclosed. The integrated circuit device comprises a substrate, a plurality of dies having surfaces with a plurality of compliant bumps thereon. The compliant bumps are rearranged in any area of the dies for electrically connecting the ...

11/30/06 - 20060267196 - Taped semiconductor device and method of manufacture
Printed tape is used to form a leads on chip (LOC) ball grid array (BGA) semiconductor device. Leads for a plurality of devices may be applied simultaneously. Bond wires, glob top encapsulant, and the ball grid arrays for the devices may be formed in single process steps. A low temperature ...

11/23/06 - 20060261476 - Microelectronic assemblies having compliant layers
A microelectronic assembly includes a microelectronic element such as a semiconductor chip or wafer having a first surface and contacts accessible at the first surface, a compliant layer overlying the first surface of the microelectronic element, and conductive protrusions overlying the compliant layer and projecting away from the first surface ...

11/23/06 - 20060261475 - Wafer level pre-packaged flip chip
Methods for producing a flip chip package by prepackaging one or more dice on a semiconductor wafer are provided. An embodiment of the method includes applying an adhesive to a first side of a finished wafer, where a number of dice are located. The active layer of the dice is ...

11/09/06 - 20060249844 - Contact structure on chip and package thereof
A contact structure on a chip is disclosed. The contact is disposed on a metallic pad of the chip. The contact structure includes a bump and a buffer layer. The bump is disposed on the metallic pad. The buffer layer is disposed on the chip to surround the interface between ...

11/02/06 - 20060244141 - Bow control in an electronic package
A package including a package substrate, a die-substrate assembly including a substrate including a plurality of layers including a layer having a mesh to stiffen the substrate adapted to mount one or more dice, one or more dice mounted on the substrate and a molding compound to attach the substrate ...

11/02/06 - 20060244140 - Conductive bump structure of circuit board and method for forming the same
A conductive bump structure of a circuit board and a method for forming the same are proposed. A conductive layer is formed on an insulating layer on the surface of the circuit board. A first resist layer is formed on the conductive layer and a plurality of first openings is ...

11/02/06 - 20060244139 - Solder bumps in flip-chip technologies
A solder bump structure and method for forming the same. The structure includes (a) a dielectric layer including a dielectric layer top surface (b) an electrically conducting bond pad on and in direct physical contact with the dielectric layer top surface; (c) a patterned support/interface layer on the dielectric layer ...

10/26/06 - 20060237842 - Semiconductor device including an under electrode and a bump electrode
Making the relative size of the surface area of a bump electrode at a portion in contact with an under electrode larger than the surface area of a base of a hole increases the contact surface area between the lower surface of the bump electrode and a polyimide layer. As ...

10/26/06 - 20060237841 - Semiconductor device and method for producing the same
A semiconductor device includes a tape carrier substrate having a flexible insulating film base, a plurality of conductor wirings provided on the film base, and wiring bumps respectively formed so as to cover an upper surface and both side surfaces of the conductor wirings, and a semiconductor chip mounted on ...

10/19/06 - 20060231951 - Electronic devices including offset conductive bumps
Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally ...

10/19/06 - 20060231950 - Semiconductor package accomplishing fan-out structure through wire bonding
Provided is a semiconductor package accomplishing a fan-out structure through wire bonding in which a pad of a semiconductor chip is connected to a printed circuit board through wire bonding. A semiconductor package can be produced without a molding process and can be easily stacked on another semiconductor package while ...

10/19/06 - 20060231949 - Semiconductor module and method of forming a semiconductor module
In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is ...

10/19/06 - 20060231948 - Integrated circuit system for bonding
An integrated circuit system provides a precursor for an integrated wire bond and flip chip structure. The precursor has a plurality of contact pads thereon. A layer of titanium is deposited on the precursor. A layer of nickel-vanadium is deposited on the layer of titanium. A layer of copper is ...

10/12/06 - 20060226544 - Semiconductor package substrate having contact pad protective layer formed thereon and method for fabricating the same
A semiconductor package substrate and a method for fabricating the same are proposed. An insulating layer has a plurality of blind vias to expose inner traces underneath the insulating layer. A conductive film is formed on the insulating layer and over the bind vias. A first resist is formed on ...

10/12/06 - 20060226543 - Ball grid array package stack
Disclosed herein is a ball grid array (BGA) package stack that is not limited by ball arrangement because it utilizes a foldable circuit substrate, which permits interconnection between upper and lower individual BGA packages. The foldable circuit substrate has three portions. By bending the middle second portion, the foldable circuit ...

10/12/06 - 20060226542 - Semiconductor device and fabrication method thereof
A semiconductor device and a fabrication method thereof are proposed. A first dielectric layer is formed on a semiconductor substrate having at least one bond pad, wherein the first dielectric layer has a first opening for exposing the bond pad and a second opening at a predetermined position for redistribution. ...

10/05/06 - 20060220243 - Electronic device package
An electronic device package comprises a substrate, a die, and a material having a Young's modulus of between about 0.1 megapascals and about 20 megapascals (at a solder reflow temperature) for attaching the die to the substrate. In one embodiment, the package utilizes a material having a Young's modulus of ...

10/05/06 - 20060220242 - Method for producing flexible printed wiring board, and flexible printed wiring board
The present invention provides a method for producing a flexible printed wiring board which allows formation of a bump on a wire trace even in a high-density mounting process, and a flexible printed wiring board which realizes high-density mounting with high reliability. In the method for producing a flexible printed ...

09/28/06 - 20060214293 - Wafer level chip scale package having a gap and method for manufacturing the same
A wafer level chip scale package may have a gap provided between a solder bump and a bump land. The gap may be filled with a gas. A method of manufacturing a wafer level chip scale package may involve forming a redistribution line having a first opening, forming a seed ...

09/28/06 - 20060214292 - C4 joint reliability
In one embodiment, the invention provides a method comprising fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material used, to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located ...

09/14/06 - 20060202334 - Method of forming redistribution bump and semiconductor chip and mount structure fabricated using the same
Provided are a method of forming a bump whose upper surface is substantially flat and whose area can be enlarged in a uniform pad pitch to simplify mounting a liquid crystal display drive IC (LDI) and a semiconductor chip and a mount structure using the method to minimize a pad ...

09/14/06 - 20060202333 - Package of a semiconductor device with a flexible wiring substrate and method for the same
A package of a semiconductor device with a flexible wiring substrate and a method thereof are provided. The package of the semiconductor device includes a semiconductor substrate with at least one pad on a surface thereof, a bump bonded to the pad, an adhesive layer on the bump, and a ...

09/14/06 - 20060202332 - Semiconductor chip packaging apparatus and method of manufacturing semiconductor chip package
Example embodiments of a semiconductor chip packaging apparatus and method thereof are disclosed. The packaging apparatus includes a plating unit that is disposed in a direction to form a conductive plating layer on external terminals of the semiconductor chip package; and a reflow unit that is disposed with the plating ...

09/14/06 - 20060202331 - Conductive bump structure of circuit board and method for fabricating the same
A conductive bump structure of a circuit board and a method for fabricating the same are proposed. The circuit board with a plurality of electrical connection pads is provided. An insulating protective layer and a resist layer are successively applied on the circuit board, wherein openings are formed in the ...

09/14/06 - 20060202330 - Chip with cleaning cavity
A chip comprising at least one cleaning cavity adapted for collecting material when a moveable device is contacted to and moved relative to the chip. ...

09/07/06 - 20060197223 - System for different bond pads in an integrated circuit package
An integrated circuit package is provided with a substrate having first and second contact pads exposed through a passivation layer on the substrate. A first metallurgy layer is over the substrate. A second metallurgy layer is over the first metallurgy layer. A protective layer is over the first contact pad. ...

08/31/06 - 20060192285 - Method for producing a plurality of electronic devices
An electronic device has external contact elements projecting from at least one external contact side of a plastic housing. The external contact elements have an internal section and an external section. The external section has an external contact region tapering away from the external contact side. An external contact element ...

08/31/06 - 20060192284 - Method of forming an encapsulation layer on a back side of a wafer
A manufacturing method of forming an encapsulation layer on a back surface of a wafer, the method comprising the steps of: providing the wafer having the back surface and an active surface opposing to the back surface; providing an encapsulation disposed only on the back surface of the wafer, and ...

08/24/06 - 20060186542 - Semiconductor device and manufacturing method thereof
A semiconductor device includes a semiconductor substrate which has an integrated circuit formed on a front surface thereof, and a rough surface with a height difference of 1 to 5 μm on a rear surface thereof. A protective film is provided on the rear surface of the semiconductor substrate. ...

08/24/06 - 20060186541 - Method and system for bonding a semiconductor chip onto a carrier using micro-pins
An anisotropically conductive layer ‘ACL’ for mechanical and electrical bonding of two circuit containing structures, such as a flip chip and carrier is disclosed. The ACL is formed of a rigid insulating substrate or membrane with a top and bottom planar surfaces formed with a plurality of pins therein. The ...

08/24/06 - 20060186540 - Method to create flexible connections for integrated circuits
A method of producing flexible interconnections for integrated circuits, and, in particular, the forming of flexible or compliant interconnections preferably by a laser-assisted chemical vapor deposition process in semiconductor or glass substrate-based carriers which are employed for mounting and packaging multiple integrated circuit chips and selectively, other devices in the ...

08/24/06 - 20060186539 - Trace design to minimize electromigration damage to solder bumps
A design methodology reduces electromigration in integrated circuit joints such as flip-chip bumps by seeking to produce a more uniform current distribution at the interface between the integrated circuit pad and the joint while maintaining an interface form that coincides with standard integrated circuit designs is presented. The design methodology ...

08/24/06 - 20060186538 - Land grid array package
A land grid array package has a construction in which a device-side ground electrode 6 and a substrate-side ground electrode 9, as well as device-side peripheral electrodes 7 and substrate-side peripheral electrodes 10 are soldered by eutectic solder 16. The land grid array package is characterized in that one or ...

08/17/06 - 20060180928 - Semiconductor chip having solder bump
A semiconductor chip comprises a silicon substrate on which semiconductor elements are formed, pads, each of which is formed on the silicon substrate and electrically connected to at least one of the semiconductor elements, a first insulating layer having an opening over each one of the pads, a first wiring ...

08/03/06 - 20060170100 - Routing design to minimize electromigration damage to solder bumps
A novel pad structure for an integrated circuit component that utilizes a bump interconnect for connection to other integrated circuit components that produces a relatively uniform current distribution within the bump of the bump interconnect is presented. The pad structure includes an inner pad implemented on an inner conductive layer ...

07/27/06 - 20060163726 - Spaced, bumped component structure
A spaced, bumped component structure including a first plate, a second plate spaced from the first plate by a first gap, a plurality of solder bumps interconnecting the plates and defining the first gap; at least one of the plates having an anomalous section including one of a raised platform ...

07/27/06 - 20060163725 - Wiring board and production method thereof
It is an object of the present invention to provide a wiring board having high-density wiring with a controlled shape without masking by a resist film and a production method thereof. In the present invention, the production method of a wiring board having copper wiring on an insulating substrate includes ...

07/27/06 - 20060163724 - Display apparatus
In a display apparatus, a display panel receives a driving signal from a driving chip through a pad and displays an image in response to the driving signal. The driving chip includes a terminal outputting the driving signal. The driving chip is mounted on the display panel using the anisotropic ...

07/27/06 - 20060163723 - Bump-less chip package
A bump-less chip package is provided. The bump-less chip package includes a chip, an interconnection structure and a panel-shaped component. The panel-shaped component has a plurality of electrical terminals on a first surface thereof. The back surface of the chip is disposed on the first surface of the panel-shaped component, ...

07/27/06 - 20060163722 - Semiconductor chip electrical connection structure
A semiconductor chip electrical connection structure includes electrode pads formed on a surface of a semiconductor chip, wherein the semiconductor chip is mounted via another surface thereof on a carrier; a plurality of conductive bumps formed on the electrode pads respectively, and exposed from a dielectric layer applied on the ...

07/20/06 - 20060157848 - Structure and method for joining a semiconductor package to a substrate using solder column
In one embodiment, a semiconductor package and a package mounting substrate are joined using a conductive material column such as a solder column. Each of the semiconductor package and the package mounting substrate include an insulating protective opening exposing a wiring layer therein. The solder column resides within the insulating ...

07/20/06 - 20060157847 - Chip package
A chip package is provided. The chip package includes at least one chip, an interconnection structure, a plurality of second pads and at least one panel-shaped component, wherein the chip includes a plurality of first pads on a surface thereof. The interconnection structure is disposed on the chip, and the ...

07/13/06 - 20060151879 - Electronic component and leadframe for producing the component
An electronic component includes a semiconductor chip and a leadframe. The leadframe includes a metal coating pattern on its underside to facilitate the application of solder to the electronic component. The metal coating pattern includes wetting regions that are wettable with solder material and anti-wetting regions that are unwettable with ...

07/13/06 - 20060151878 - Semiconductor chip packaging apparatus and method of manufacturing semiconductor chip package
Example embodiments of a semiconductor chip packaging apparatus and method thereof are disclosed. The packaging apparatus may include a plating unit to perform a conductive plating process to form a conductive plating layer on external terminals of a semiconductor chip package, and a reflow unit adapted to melt the conductive ...

07/13/06 - 20060151877 - Semiconductor device and manufacturing method thereof
In order to inhibit the connection failure due to the degradation of the connection interface strength of the electrode pad and the warp thereof in the semiconductor device having an electrode pad, a metal layer formed on the electrode pad, and a metal bump formed on the metal layer, in ...

07/06/06 - 20060145344 - Semiconductor device
The miniaturization of a semiconductor device is aimed at. A package substrate have a plurality of terminals formed on the main surface, a plurality of lands formed on the back surface, through holes which are formed by laser beam machining and have been arranged at the upper part of each ...

07/06/06 - 20060145343 - Bga package having half-etched bonding pad and cut plating line and method of fabricating same
A ball grid array (BGA) package having a half-etched bonding pad and a cut plating line and a method of fabricating the same. In the BGA package, the plating line is cut to form a predetermined uneven bonding pad using half-etching, thereby increasing the contact area between the bonding pad ...

06/29/06 - 20060138657 - Semiconductor device and fabrication method thereof
A semiconductor device has rewiring that is electrically connected to circuit elements on a semiconductor substrate, and a plurality of posts electrically connected to the rewiring. The semiconductor device also has a sealing layer that seals the rewiring and the posts. A column-like identification protrusion whose cross-sectional shape is the ...

06/22/06 - 20060131748 - Ball limiting metallurgy split into segments
The present invention discloses a novel layout and process for a device with segmented BLM for the I/Os. In a first embodiment, each BLM is split into two segments. The segments are close to each other and connected to the same overlying bump. In a second embodiment, each BLM is ...

06/22/06 - 20060131747 - Carrier with metal bumps for semiconductor die packages
A carrier for a semiconductor die package is disclosed. In one embodiment, the carrier includes a metal layer and a plurality of bumps formed in the metal layer. The bumps can be formed by stamping. ...

06/22/06 - 20060131746 - Circuit device
A circuit device in which highly reliable sealing with a resin can be achieved is provided. A semiconductor chip is provided on one surface of an insulating resin film and a conductive layer that is electrically connected to the semiconductor chip is provided on another surface of the insulating resin ...

06/22/06 - 20060131745 - Semiconductor device and manufacturing method therefor
A semiconductor device is obtained, in which excellent characteristics are achieved, the reliability is improved, and an SiC wafer can also be used for the fabrication. A plurality of Schottky-barrier-diode units 10 is formed on an SiC chip 9, and each of the units 10 has an external output electrode ...

06/22/06 - 20060131744 - Method and apparatus for providing a bga connection having improved drop test performance
A BGA (Ball Grid Array Structure) having improved drop test performance by increasing the area of the solder bond at the corner of the array using existing assembling machinery. ...

06/22/06 - 20060131743 - Changing chip function based on fuse states
Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fused ...

06/15/06 - 20060125096 - Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device
A method is provided to suppress detachment between semiconductor packages while preventing dislocation at the time of mounting a stacked semiconductor package on a motherboard. Semiconductor packages PK1 and PK2 are bonded to each other through protruding electrodes and resin is provided between the semiconductor packages PK1 and PK2. The ...

06/15/06 - 20060125095 - Semiconductor device and manufacturing method thereof
A semiconductor device including a semiconductor substrate containing a plurality of electrode pads and a passivation film with an opening that exposes a central area of each of the electrode pads, and a bump electrically connected to each of the electrode pads, the bump being disposed to overlap the opening ...

06/08/06 - 20060118952 - Micro-hole plating method, gold bump fabrication method and semiconductor device fabrication method using the micro-hole plating method, semiconductor device
The present invention provides a micro-hole plating method for depositing a gold layer within a micro opening of a photoresist. The method applies a plating current, which is either only a positive pulse current or a positive/negative pulse current having an appropriate waveform, and also uses a gold plating solution ...

06/01/06 - 20060113668 - Substrate package structure and packaging method thereof
A substrate package structure includes bumps disposed on a surface side of a first substrate and a surface side of a second substrate. The bump at the first substrate and the bump at the second substrate are press-fitted to each other while the one surface of the first substrate and ...

06/01/06 - 20060113667 - Bond pad structure for gold wire bonding to copper low k dielectric silicon devices
A bond pad structure which improves the reliability of the gold bonds, and thus, of the device. The bond pad structure allows for small gold bonds, which increases the density of the device. One design provides that the aluminum pad is connected to the copper IO strap at one end ...

05/25/06 - 20060108685 - Integrated circuit package and assembly thereof
An integrated circuit (IC) package and IC assembly. The IC assembly comprises the IC package, an insulating substrate and an adhesive film. The IC package comprises a chip body and a plurality of bumps. The bumps are disposed on a first surface of the chip body, each bump having a ...

05/18/06 - 20060103019 - Socket grid array
Assembly methods and semiconductor device assemblies are disclosed in which corresponding IC sockets and PCB projections are used for alignment and bond formation between IC and PCB components of a completed assembly, for example, a BGA. Embodiments of the invention further provide the capability of disassembly and reassembly. ...

05/04/06 - 20060091541 - Direct bumping on integrated circuit contacts enabled by metal-to-insulator adhesion
A semiconductor device including a contact pad and circuit metallization on the surface of an integrated circuit (IC) chip comprises a stack of protection layers over the surface of the chip. The stack consists of a first inorganic layer (303, preferably silicon nitride) on the chip surface, followed by a ...

05/04/06 - 20060091540 - Semiconductor chip with post-passivation scheme formed over passivation layer
The invention provides a semiconductor chip comprising a semiconductor substrate comprising a MOS device, an interconnecting structure over said semiconductor substrate, and a metal bump over said MOS device, wherein said metal bump has more than 50 percent by weight of gold and has a height of between 8 and ...

05/04/06 - 20060091539 - Semiconductor device, circuit board, electro-optic device, electronic device
A semiconductor device including a semiconductor element, an electrode pad formed on the semiconductor element, and a bump electrode conductively connected to the electrode pad which includes a resin bump formed on an active face of the semiconductor element and a conductive layer provided from the electrode pad to the ...

05/04/06 - 20060091538 - Low profile and tight pad-pitch land-grid-array (lga) socket
The apparatus and method described herein are for coupling an integrated circuit to a circuit board through a low profile compression socket. A plurality of compressible columns disposed in a substrate, when compressed, make electrical connection to a first set of pads on an integrated circuit and to a plurality ...

04/27/06 - 20060087035 - Solder wall structure in flip-chip technologies
A structure and method for forming the same. The semiconductor structure includes a first semiconductor chip and N solder bumps in direct physical contact with the first semiconductor chip, wherein N is a positive integer. The semiconductor structure also includes a first solder wall on a perimeter of the first ...

04/27/06 - 20060087034 - Bumping process and structure thereof
A bumping process includes the steps of: firstly, providing a wafer; forming a first photo-resist layer on a active surface of the wafer and forming at least a first opening on the first photo-resist layer; next, forming a first copper pillar in the first opening; next, forming a second photo-resist ...

04/27/06 - 20060087033 - Molded high density electronic packaging structure for high performance applications
A thermally enhanced ball grid array package is disclosed. The package includes a base layer element and a flip chip die mounted on the base layer element. The die has a first surface electrically coupled to the base layer element, a second surface opposite to the first surface, and lateral ...

04/20/06 - 20060081982 - Chip scale package with micro antenna and method for manufacturing the same
A chip scale package with micro antenna includes a chip, a first dielectric layer and an antenna. The chip has an active surface, a first bonding pad and a second bonding pad on the active surface. The first dielectric layer is formed on the active surface of the chip. The ...

04/13/06 - 20060076679 - Non-circular via holes for bumping pads and related structures
An integrated circuit device may include a substrate, a conductive pad on a surface of the substrate, and a conductive line on the surface of the substrate. Moreover, the conductive line may be connected to the conductive pad, and the conductive line may be narrow relative to the conductive pad. ...

03/30/06 - 20060065978 - Semiconductor element and a producing method for the same, and a semiconductor device and a producing method for the same
A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an ...

03/23/06 - 20060060968 - Projected contact structures for engaging bumped semiconductor devices and methods of making the same
A bumped semiconductor device contact structure is disclosed including at least one non-planar contact pad having a plurality of projections extending therefrom for contacting at least one solder ball of a bumped integrated circuit (IC) device, such as a bumped die and a bumped packaged IC device. The projections are ...

03/16/06 - 20060055037 - Microelectronic device chip including hybrid au bump, package of the same, lcd apparatus including microelectronic device chip and method of fabricating microelectronic device chip
A microelectronic device chip including a hybrid Au bump in which foreign materials are not generated in a probe tip in an electrical die sorting (EDS) test is provided. The microelectronic device chip includes a chip pad which is connected to a microelectronic device formed on a substrate and on ...

03/16/06 - 20060055036 - Method of manufacturing semiconductor device, semiconductor device, and mounting structure of semiconductor device
A method of manufacturing a semiconductor device, including the following steps, forming a resin layer on a surface of a semiconductor chip, the surface is provided with a bump formed thereon, the resin layer having photosensitivity and adhesiveness, exposing an upper surface of the bump by removing a part of ...

03/16/06 - 20060055035 - Bump structure
Solder bump structures for semiconductor device packaging is provided. In one embodiment, a solder bump structure comprises a semiconductor substrate, the substrate has at least one contact pad and an upper passivation layer having at least one opening formed therein exposing a portion of the contact pad. At least one ...

03/09/06 - 20060049521 - Semiconductor device having tin-based solder layer and method for manufacturing the same
A semiconductor device includes: a semiconductor substrate; a base member; a tin-based solder layer; a first metal layer; and a first alloy layer. The semiconductor substrate is bonded to the base member through the first metal layer, the first alloy layer and the tin-based solder layer in this order. The ...

03/09/06 - 20060049520 - Semiconductor device mounting structure for reducing thermal stress and warpage
A semiconductor device is composed of a circuit board, a semiconductor chip connected with the circuit board by a plurality of bumps. The semiconductor chip includes a center portion and a peripheral portion surrounding the center portion. The peripheral portion has a thickness smaller than that of the center portion. ...

03/09/06 - 20060049519 - Semiconductor device and method for manufacturing semiconductor device
A semiconductor device, comprises: a carrier substrate in which a semiconductor chip is mounted; and a land formed in the carrier substrate and arranged in a region different from the mounting face of the semiconductor chip, wherein a coarse face, the surface roughness of which is 20 through 100 μm, ...

03/09/06 - 20060049518 - Semiconductor device and method for manufacturing the same
A semiconductor device, comprising: a semiconductor substrate in which an integrated circuit is formed, the semiconductor substrate having an electrode electrically connected to the integrated circuit; a resin layer formed on a face in which the electrode of the semiconductor substrate is formed, as to avoid the electrode; a wiring ...

03/09/06 - 20060049517 - Flip chip semiconductor device and manufacturing method thereof
A flip chip semiconductor device having an improved structure and a method of manufacturing the flip chip semiconductor device, in which a semiconductor chip can be more securely joined to a lead frame while preventing contact defects between the two. The flip chip semiconductor device includes: a semiconductor chip having ...

03/02/06 - 20060043585 - Semiconductor device, substrate, equipment board, method for producing semiconductor device, and semiconductor chip for communication
A semiconductor device includes a first substrate having a first surface for mounting an electronic component and a second surface substantially parallel to the first surface. The first substrate includes a first region for mounting the electronic component, a second region including a plurality of first communication units for transmitting ...

02/16/06 - 20060033210 - Fine pitch low-cost flip chip substrate
A package is disclosed, which includes a substrate, a solder masker, and a first aperture through the solder mask. The substrate has a surface on which metal traces are formed. The solder mask covers at least a portion of the surface of the substrate. And the first aperture through the ...

02/02/06 - 20060022338 - Semiconductor component having a csp housing
The invention relates to a semiconductor component (1) for mounting on a printed circuit board. The semiconductor component comprises a housing (8). This housing (8) at least partially surrounds at least one flat semiconductor chip (3). Electric contacts (5) a assigned to the semiconductor chip and serve to establish an ...

01/26/06 - 20060017161 - Semiconductor package having protective layer for re-routing lines and method of manufacturing the same
An apparatus and method for manufacturing a semiconductor package are disclosed. The apparatus may include at least a semiconductor chip having input/output (I/O) pads arranged on a surface thereof, a first dielectric layer formed on the surface of the semiconductor chip which may expose the I/O pads, a seed metal ...

01/26/06 - 20060017160 - Structure and formation method of conductive bumps
A method and structure for a conductive bump are provided herein. A conductive surface is provided on a wafer. A conductive barrier layer and a conductive wetting layer on a part of the conductive surface have a bottom and a side wall and further reach up a top surface. The ...

01/26/06 - 20060017159 - Semiconductor device and method of manufacturing a semiconductor device
According to an aspect of the present invention, there is provided a semiconductor device including a lead frame, a semiconductor chip, a back surface opposed to a main surface of the semiconductor chip disposed on the lead frame, a first electrode formed on the main surface of the semiconductor chip, ...

01/19/06 - 20060012039 - Methods of processing thick ild layers using spray coating or lamination for c4 wafer level thick metal integrated flow
A process flow to make an interconnect structure with one or more thick metal layers under Controlled Collapse Chip Connection (C4) bumps at a die or wafer level. The interconnect structure may be used in a backend interconnect of a microprocessor. The process flow may include forming an inter-layer dielectric ...

01/19/06 - 20060012038 - Semiconductor device, semiconductor device module and method of manufacturing the semiconductor device
A reliable semiconductor device including support bumps so as to adequately seal the region between the chips is to be provided. The semiconductor device includes a semiconductor chip; a bump formed on an upper face of the semiconductor chip; and a plurality of support bumps formed along a circumference of ...

01/19/06 - 20060012037 - Methods for bonding and devices according to such methods
A method of bonding two elements such as wafers used in microelectronics applications is disclosed. One inventive aspect relates to a method for bonding comprising producing on a first main surface of a first element a first solder ball, producing on a first main surface of a second element a ...

01/12/06 - 20060006535 - Selective plating of package terminals
In one embodiment, a method including providing a semiconductor pad package having a first pad and a second pad is disclosed. A first layer comprising a first metal is deposited on the first pad using a first process. A second metal is then deposited on the first pad and the ...

01/12/06 - 20060006534 - Microelectronic devices and methods for packaging microelectronic devices
Methods for packaging microelectronic devices and microelectronic devices formed by such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of microelectronic dies to a support member, covering the dies and at least a portion of the support member with a dielectric layer, forming a plurality ...

01/12/06 - 20060006533 - Motherboard structure for preventing short circuit
A motherboard for preventing short circuit includes an IC device and a PCB. The IC device has a plurality of tin balls, and the PCB has matching pads with the tin balls of the IC device. The tin balls and the pads knit together to mount the IC device to ...

01/12/06 - 20060006532 - Flip-chip without bumps and polymer for board assembly
A semiconductor chip having a planar active surface including an integrated circuit protected by an inorganic overcoat; the circuit has metallization patterns including a plurality of contact pads. Each of these contact pads has an added conductive layer on the circuit metallization. This added layer has a conformal surface adjacent ...

01/12/06 - 20060006531 - Bonding pad and chip structure
A chip structure and a bonding pad are provided. The chip structure comprises a chip and at least a bonding pad. The chip has an active surface. The bonding pad is disposed on the active surface of the chip. The bonding pad comprises a polygonal body and a plurality of ...

01/05/06 - 20060001156 - Semiconductor device
In a semiconductor device comprising a semiconductor chip, electrodes formed on the major surface of the semiconductor chip, and a wiring board for mounting the semiconductor chip, for example, wirings for electrically connecting the wirings of the wiring board to the electrodes are provided. As the wirings, those relaxing stress ...

12/15/05 - 20050275098 - Lead-free conductive jointing bump
A conductive jointing structure that is applied on a chip with multitude of connection pads has a first conductive structure and a second conductive structure. The first conductive structure is allocated on one of the contact pads. The second conductive structure made of lead-free based material is consisted of multitude ...

12/15/05 - 20050275097 - Method of forming a solder bump and the structure thereof
A method of forming a solder bump and the associated structure is disclosed. A chip having a conductive pad is covered with a mask layer and exposing a potion of said conductive pad of said chip. Conductive material is then formed above the conductive pad not covered with said mask ...

12/15/05 - 20050275096 - Pre-doped reflow interconnections for copper pads
A metal interconnect structure (100) comprising a bond pad (110) of copper; a body (103) of eutectic alloy in contact with the bond pad, this alloy including copper; and a contact pad (120) comprising copper in contact with the alloy body. When the eutectic alloy is tin/lead, the alloy includes ...

12/15/05 - 20050275095 - Stress mitigation layer to reduce under bump stress concentration
In some embodiments, the invention provides a stress mitigation layer that reduces stress in a layer of a microelectronic device that is below a conductive connection structure, such as a bump. ...

12/15/05 - 20050275094 - Encapsulation of pin solder for maintaining accuracy in pin position
Solder joints coupling pins to a microelectronic package substrate are enshrouded with an encapsulation material. In this manner, pin movement is limited even if the pin solder subsequently melts. ...

12/08/05 - 20050269700 - Semiconductor component and system having thinned, encapsulated dice
A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the ...

12/08/05 - 20050269699 - Ball grid array solder joint reliability
An apparatus and system are provided for improving ball grid array (BGA) joint reliability. According to one embodiment, a ball grid array (BGA) package having a first and second surface and an array of solder balls to align the first surface with the second surface is disclosed. The first surface ...

12/08/05 - 20050269698 - Semiconductor device having adhesion increasing film and method of fabricating the same
A semiconductor device includes at least one semiconductor constructing body provided on one side of a base member, and having a semiconductor substrate and a plurality of external connecting electrodes provided on the semiconductor substrate. An insulating layer is provided on the one side of the base member around the ...

12/08/05 - 20050269697 - Semiconductor device, circuit board, and electronic instrument
A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with ...

12/01/05 - 20050263885 - Semiconductor device
A semiconductor device in accordance with the present invention is a mounted body of a semiconductor chip with a plurality of electrode pads arranged in a plurality of stages and a tape wiring board, the average pitch of the electrode pads on the entire semiconductor chip can be reduced, while ...

12/01/05 - 20050263884 - Multilayer printed wiring board and multilayer printed circuit board
In a multilayer printed wiring board having a plurality of laminated resin layers, a plurality of wiring patterns formed on the interfacial surface of the resin layers, and a plurality of lands formed on the outermost layer of the resin layers and on which the solder is provided, at least ...

12/01/05 - 20050263883 - Asymmetric bump structure
An asymmetric bump structure for wafer is provided. First, the wafer includes multi-chip units each of which has an active surface. The asymmetric bump structure includes a conductive surface on the active surface, a conductive structure contacted the portion of the conductive surface and located on the both conductive surface ...

12/01/05 - 20050263882 - Semiconductor device and method of manufacturing the same
A semiconductor device including: a semiconductor substrate having an electrode; a resin layer formed to avoid at least a part of the electrode; a land provided on the resin layer; an interconnect which electrically connects the electrode with the land; and an external terminal bonded to the land. The resin ...

11/17/05 - 20050253263 - Wiring substrate and process for manufacturing the same
A wiring substrate incorporating nickel-plated copper terminal pads for solder bumps, wherein a nickel plating layer constituting the nickel plated copper terminal pads has a phosphorus content of 8.5 to 15.0% by mass and is covered with a gold plating layer. ...

11/17/05 - 20050253262 - Method of manufacturing different bond pads on the same substrate of an integrated circuit package
A method for manufacturng an integrated circuit package is provided with a substrate having first and second contact pads exposed through a passivation layer on the substrate. A first metallurgy layer is formed over the substrate. A second metallurgy layer is formed over the first metallurgy layer. The first metallurgy ...

11/10/05 - 20050248032 - Luminescent diode chip that is flip-chip mounted on a carrier, and method for production thereof
A luminescent diode chip for flip-chip mounting on a carrier, having a conductive substrate (12), a semiconductor body (14) that contains a photon-emitting active zone and that is joined by an underside to the substrate (12), and a contact (18), disposed on a top side of the semiconductor body (14), ...

11/10/05 - 20050248031 - Mounting with auxiliary bumps
An electronic circuit can be produced by placing an electrically conductive compressible circuit bump on a circuit electrode of a mounting surface of first and second circuit devices, such as an integrated circuit and a base substrate. One or more auxiliary bumps can also be placed on one or both ...

11/03/05 - 20050242436 - Display device and manufacturing method of the same
The present invention enhances the mounting accuracy of a drive circuit chip on a substrate thus realizing a display of high quality. Bumps (for example, gold bumps) on the drive circuit chip are used for alignment. Here, to enhance the recognition property of the alignment bumps, a plane shape of ...

11/03/05 - 20050242435 - Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging
The introduction of dielectric material of enhanced mechanical stability, such as silicon dioxide or fluorine-doped silicon dioxide, into the via level of a low-k interconnect structure provides an increased overall mechanical stability, especially during the packaging of the device. Consequently, cracking and delamination, as frequently observed in high end low-k ...

11/03/05 - 20050242434 - Electronic packaging using conductive interposer connector
Formation of a plurality of conductive connectors of an integrated circuit package is described. The conductive connectors made with a conductive elastomer material and formed using an interposer that includes a plurality of the conductive connectors linked together. ...

10/27/05 - 20050236709 - Multiple chip semiconductor package and method of fabricating same
A semiconductor device package and method of fabricating the same. The semiconductor device package may include a variety of semiconductor dice, thereby providing a system on a chip solution. The semiconductor dice are attached to connection locations associated with a conductive trace layer such as through flip-chip technology. A plurality ...

10/20/05 - 20050230827 - Semiconductor device, magnetic sensor, and magnetic sensor unit
A semiconductor device, comprising a semiconductor chip; a pad electrode; an electrode portion; a wiring portion. An insulating portion is formed from electrically insulating material, covering the surface of the semiconductor chip and sealing the sensor element, wiring portion and electrode portion, in a state which exposes at least the ...

10/20/05 - 20050230826 - Semiconductor device and multilayer substrate therefor
Supposing that an elastic modulus of an adhesive material, which is used for the purpose of electrically connecting a metal bump and an interconnect pattern and sealing the circuit surface of LSI of an LSI chip, after thermosetting is Ea; an elastic modulus of an insulating material constituting the surface ...

10/20/05 - 20050230825 - Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer
The present invention is directed toward apparatus and methods of testing and assembling bumped die and bumped devices using an anisotropically conductive layer. In one embodiment, a semiconductor device comprises a bumped device having a plurality of conductive bumps formed thereon, a substrate having a plurality of contact pads distributed ...

10/13/05 - 20050224974 - Electronic component mounting method and apparatus
A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is ...

10/13/05 - 20050224973 - Extension of fatigue life for c4 solder ball to chip connection
A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains ...

10/13/05 - 20050224972 - Circuit device and method of manufacturing the circuit device
A circuit device comprises at least one under bump metal formed on a surface of a substrate and a connection bump provided on the uppermost layer of the under bump metal. At least one laminated metallic film is formed on part of or all of wiring pattern formed on the ...

10/13/05 - 20050224971 - Circuit board, device mounting structure, device mounting method, and electronic apparatus
A circuit board has a metal pattern that is formed on a surface of the circuit board to be connected with bumps in two-dimensional arrangement for mounting an electronic device that has the bumps. A plurality of the bumps which has even electrical potentials is electrically connected by the metal ...

10/13/05 - 20050224970 - Semiconductor device and method of producing the semiconductor device
A semiconductor device has antenna pads and a testing pad formed on the substrate. An insulating resin layer containing a filler covers the testing pad, and bumps are provided on the antenna pads. Specific data in the semiconductor device are inhibited from being read out or rewritten, by the provision ...

10/13/05 - 20050224969 - Chip package structure and process for fabricating the same
A chip package structure comprises a carrier, a chip and an underfill. The chip has an active surface on which a plurality of bumps are formed. The chip is flip-chip bonded onto the carrier with the active surface facing the carrier, and is electrically connected to the carrier through the ...

10/13/05 - 20050224968 - Wafer level mounting frame for ball grid array packaging, and method of making and using the same
A method of forming a semiconductor package including placing a semiconductor chip in cavities of a semiconductor chip carrier substrate. ...

10/13/05 - 20050224967 - Microelectronic assembly with underchip optical window, and method for forming same
A microelectronic assembly includes an integrated circuit die spaced apart from a substrate and connected by bump interconnections, and an polymeric encapsulant molded about the die. The encapsulant extends into the gap about the interconnections, but is confined to the perimeter so as to define an underchip optical window adjacent ...

10/13/05 - 20050224966 - Interconnections for flip-chip using lead-free solders and having reaction barrier layers
An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally ...

10/06/05 - 20050218515 - Self-coplanarity bumping shape for flip chip
A stud bump structure for electrical interconnection between a pair of members includes a base portion, and a stem portion. The base portion is affixed to a pad or trace in one of the pair of members to be interconnected (such as an integrated circuit chip), and the stem end ...

10/06/05 - 20050218514 - Cavity down semiconductor package
A semiconductor package is disclosed for an integrated circuit die (52). The integrated circuit die is electrically connected to the package substrate by either die solder balls (53a), or wirebonds (53b). The package substrate (50), a single sided printed wiring board, has a thick metal core (100), consisting of a ...

09/29/05 - 20050212131 - Electric wave readable data carrier manufacturing method, substrate, and electronic component module
The method for mounting the IC chip on the substrate comprises: pushing bumps of the semiconductor bare chip onto the thermoplastic resin film while applying an ultrasonic wave thereto, thereby to expel the thermoplastic resin film to bring the bumps and the electrode areas into contact; further applying the ultrasonic ...

09/29/05 - 20050212130 - Semiconductor chip, semiconductor device, method for producing semiconductor device, and electronic equipment
A semiconductor device includes a semiconductor chip having a bump and a wiring substrate having a land, wherein the bump and the land are connected through conductive particles dispersed in an insulating material. The bump includes a first conductive layer, a second conductive layer that is in contact with the ...

09/29/05 - 20050212129 - Semiconductor package with build-up structure and method for fabricating the same
A semiconductor package with a build-up structure is provided, which includes a rigid base, a rigid frame having a through hole and fixed onto the rigid base, at least one chip received in the through hole of the rigid frame, a medium filled in a gap between the chip and ...

09/22/05 - 20050205992 - Method of manufacturing substrate joint body, substrate joint body and electrooptical device
A method of manufacturing a substrate joint body by mounting a TFT on a wiring substrate includes a step of arranging an electrode pad of the wiring substrate and an electrode pad of the TFT at a predetermined interval and mechanically coupling the wiring substrate and the TFT with a ...

09/15/05 - 20050200017 - Integrated circuit bond pad structures and methods of making
A bond pad structure for an integrated circuit includes first and second active devices formed in a substrate, first and second buses above the first and second active devices, respectively, a bond pad above the first and second buses, first interconnections between the first and second active devices and the ...

09/15/05 - 20050200016 - Ball grid array socket having improved housing
A ball grid array (BGA) socket includes an insulative housing (11), a number of terminals (12) and a protecting device (114). The insulative housing includes a mating surface (111), a mounting surface (112) opposite to mating surface, a plurality of passageways (113) extending between the mating surface and the mounting ...

09/15/05 - 20050200015 - Semiconductor device and method for manufacturing the same
A semiconductor device is composed of a semiconductor chip, aluminum pads formed on the semiconductor chip, alloy ball bumps, which are formed on the aluminum pads, containing gold and Pd, and gold wires, which are connected to the alloy ball bumps, having a surface made of gold. The alloy ball ...

09/15/05 - 20050200014 - Bump and fabricating process thereof
A bump structure on a contact pad and a fabricating process thereof. The bump comprises an under-ball-metallurgy layer, a bonding mass and a welding lump. The under-ball-metallurgy layer is formed over the contact pad and the bonding mass is formed over the under-ball-metallurgy layer by conducting a pressure bonding process. ...

09/15/05 - 20050200013 - Package structure with two solder arrays
The present invention includes a semiconductor package that forms the solder array joints on the die surface and corresponding BGA substrate and PCB respectively. The life times of array solder joints are increased through the use of two sets of array joints. The top array comprises a plurality of high ...

09/15/05 - 20050200012 - Chip size image sensor camera module
An image sensor camera module includes a dielectric flex tape and a semiconductor die including an imager array. Die attach pads are formed along one edge of the die. The dielectric flex tape overlaps either the top or the bottom of the die, and connections between the die and the ...

09/08/05 - 20050194682 - Resin-molded semiconductor device having posts with bumps and method for fabricating the same
A semiconductor apparatus includes a semiconductor device to be mounted on a circuit board; a plurality of conductive posts electrically connected to the semiconductor device; and a plurality of conductive bumps each provided on an outer end of each of the conductive posts, so that the plurality of conductive bump ...

09/08/05 - 20050194681 - Conductive pad with high abrasion
A method and apparatus for a planarizing or polishing article for Electrochemical Mechanical Planarization (ECMP) is disclosed. The polishing article is a pad assembly having a plurality of conductive domains and a plurality of abrasive domains on a processing surface. The abrasive domains and the conductive domains comprise a plurality ...

09/01/05 - 20050189649 - Lsi package, lsi element testing method, and semiconductor device manufacturing method
An LSI package comprises an LSI element and a wiring board. The plurality of pin terminals of the LSI element each includes a first conductive layer and a second conductive layer superposed on the first conductive layer. The plurality of pin terminals of the wiring board each includes a third ...

08/25/05 - 20050184389 - Thin film transistor substrate and manufacturing method thereof
A thin film transistor (TFT) substrate includes a glass substrate, a thin film transistor, an electrode pad, and a conductive bump. The TFT and the electrode pad are formed on the glass substrate, and the electrode pad is used for electrically connecting with the thin film transistor. The conductive bump ...

08/18/05 - 20050179131 - Semiconductor device and manufacturing method thereof
A semiconductor device is comprised of a semiconductor element having a low dielectric constant insulating film, first electrode pads and barrier metal layers; and a substrate having second electrode pads corresponding to the first electrode pads. The first electrode pads and the second electrode pads are connected via metal bumps. ...

08/11/05 - 20050173797 - Electronic component and fabricating method
An LSI unit provided by the present invention comprises a molded LSI chip having bonding pads, and another LSI chip having another set of bonding pads which is placed on the molded LSI chip and electrically connected the molded LSI chip through bumps. In this LSI unit, the LSI chip ...

08/11/05 - 20050173796 - Microelectronic assembly having array including passive elements and interconnects
A microelectronic assembly and a fabrication method are provided which includes a microelectronic element such as a chip or element of a package. A plurality of surface-mountable contacts are arranged in an array exposed at a major surface of the microelectronic element. One or more passive elements, e.g., a resistor, ...

08/11/05 - 20050173795 - Socket grid array
Assembly methods and semiconductor device assemblies are disclosed in which corresponding IC sockets and PCB projections are used for alignment and bond formation between IC and PCB components of a completed assembly, for example, a BGA. Embodiments of the invention further provide the capability of disassembly and reassembly. ...

08/04/05 - 20050167831 - Semiconductor device and method of fabricating the same
A semiconductor device comprises a semiconductor IC chip provided with electrode pads, and an insulating layer formed on a surface of the semiconductor IC chip, on the side of the electrode pads. Connecting terminals on the outer surface of the insulating layer and the electrode pads are connected by conductive ...

08/04/05 - 20050167830 - Pre-solder structure on semiconductor package substrate and method for fabricating the same
A pre-solder structure on a semiconductor package substrate and a method for fabricating the same are proposed. A plurality of conductive pads are formed on the substrate, and a protective layer having a plurality of openings for exposing the conductive pads is formed over the substrate. A conductive seed layer ...

08/04/05 - 20050167829 - Partially etched dielectric film with conductive features
Provided are partially etched dielectric films with raised conductive features. Also provided are methods for forming the raised conductive features in the dielectric films, which methods include partially etching the dielectric films. ...

07/28/05 - 20050161814 - Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus
A semiconductor substrate (1) is secured by suction to a rear face (1b) of a supporting face (11a) of a substrate supporting table (11). In this event, the thickness of the semiconductor substrate (1) is made fixed by planarization on the rear face (1b), and the rear face (1b) is ...

07/28/05 - 20050161813 - Radiation-emitting semiconductor component and method for fixing a semiconductor chip on a leadframe
A radiation-emitting semiconductor component having a prefabricated composite having a leadframe (8) and a housing part (9), which is integrally formed onto the leadframe (8) and contains a plastic, and at least one semiconductor chip (1), which is fixed on the leadframe (8) of the composite with a hard solder ...

07/28/05 - 20050161812 - Wafer-level package structure
A wafer-level package structure, applicable to a flip-chip type arrangement on a carrier having a plurality of contact points is described. This wafer-level package structure comprises a chip having a protective layer and a plurality of bonding pads and a conductive layer. The conductive layer is arranged on the bonding ...

07/21/05 - 20050156314 - Support ring for use with a contact pad and semiconductor device components including the same
Dielectric rings are configured to be disposed around contact pads on a surface of a semiconductor device or another substrate. The rings may be fabricated or otherwise disposed around the contact pads of a semiconductor device or other substrate before or after conductive structures, such as solder balls, are secured ...

07/21/05 - 20050156313 - Inspection device and method for manufacturing the same, method for manufacturing electro-optic device and method for manufacturing semiconductor device
An inspection device includes a substrate; a stress relieving layer that is provided on the substrate; a contact that is provided on the stress relieving layer; and a wiring pattern that is electrically connected to the contact. Furthermore, method for manufacturing an inspection device includes the steps of: providing a ...

07/14/05 - 20050151249 - Chip-size package with an integrated passive component
A passive component is integrated into a product having a rewiring location. ...

07/07/05 - 20050146029 - Semiconductor element having protruded bump electrodes
A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, ...

06/30/05 - 20050140005 - Chip package structure
A chip package structure is disclosed. The chip package structure includes an inner molding compound with a low modulus covering the chip and an outer molding compound covering the inner molding compound. The outer molding compound has a modulus larger than then modulus of the inner molding compound. ...

06/30/05 - 20050140004 - Semiconductor device and method of fabricating the same
A semiconductor device includes a semiconductor substrate and an array of protruding electrodes arranged at a pitch X1. Each of the protruding electrodes has a height X3 and is formed on a barrier metal base of diameter X2 coupled to an electrode arranged on the semiconductor substrate so as to ...

06/30/05 - 20050140003 - Semiconductor device with a protective security coating and method of manufacturing the same
The semiconductor device comprises a substrate (10) with a first (1) and an opposed second side (2), at which first side a plurality of transistors and interconnects is present, which are covered by a protective security covering (16), which device is further provided with bond pad regions (14). The protective ...

06/23/05 - 20050133914 - Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus
A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being ...

06/23/05 - 20050133913 - Stress distribution package
A semiconductor device includes a package material that can be effective to mitigate damage caused by mechanical stress to the semiconductor device. The package material can cover and protect a semiconductor chip that can be included in the semiconductor device. The package material can include at least one groove effective ...

06/16/05 - 20050127509 - Semiconductor device and method for fabricating the same
On a substrate provided with a transistor, an electrode pad for product connected electrically to the transistor is formed. A metal bump is provided on a surface of the electrode pad for product. An electrode pad for test to be used specifically for a wafer-level burn-in, which is connected electrically ...

06/16/05 - 20050127508 - Solder bump structure for flip chip package and method for manufacturing the same
A solder bump structure may have a metal stud formed on a chip pad of a semiconductor chip. Surfaces of the metal stud may be plated with a solder. The metal stud may be located on a substrate pad of the substrate. The substrate pad may have a pre-solder applied ...

06/09/05 - 20050121784 - Semiconductor device package utilizing proud interconnect material
A semiconductor package which includes a conductive can, a semiconductor die received in the interior of the can and connected to an interior portion thereof at one of its sides, at least one interconnect structure formed on the other side of the semiconductor die, and a passivation layer disposed on ...

06/02/05 - 20050116340 - Semiconductor device and method of manufacturing the same
Making the relative size of the surface area of a bump electrode at a portion in contact with an under electrode larger than the surface area of a base of a hole increases the contact surface area between the lower surface of the bump electrode and a polyimide layer. As ...

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