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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Combined With Electrical Contact Or Lead

Combined With Electrical Contact Or Lead

Combined With Electrical Contact Or Lead patent applications listed include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

10/30/14 - 20140319675 - Semiconductor memory system
According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side...

10/30/14 - 20140319676 - Electronic component manufacturing method and electrode structure
It is an object of the present invention to provide an electronic component manufacturing method, capable of suppressing reduction in a trench opening and suppressing diffusion of a metal film embedded in a trench. An embodiment of the present invention is an electronic component manufacturing method, including the steps of:...

10/23/14 - 20140312488 - Method of manufacturing wiring board unit, method of manufacturing insertion base, wiring board unit, and insertion base
A method of manufacturing a wiring board unit, the wiring board unit including a semiconductor package that includes a memory chip, a wiring board on which the semiconductor package is mounted, and an insertion base inserted between the wiring board and the semiconductor package, the method includes: forming a plurality...

09/18/14 - 20140264822 - Thermosetting resin compositions with low coefficient of thermal expansion
Thermosetting resin compositions with low coefficient of thermal expansion are provided herein....

09/18/14 - 20140264823 - Systems and methods for fabricating semiconductor devices having larger die dimensions
A method of fabricating a semiconductor device is disclosed. A photosensitive material is coated over the device. A plurality of masks for a chip layout are obtained. The plurality of masks are exposed to encompass a chip area of the device using at least one reticle repeatedly. The at least...

09/18/14 - 20140264824 - Methods and apparatus of packaging semiconductor devices
Methods and apparatus are disclosed which reduce the stress concentration at the redistribution layers (RDLs) of a package device. A package device may comprise a seed layer above a passivation layer, covering an opening of the passivation layer, and covering and in contact with a contact pad. A RDL is...

09/18/14 - 20140264825 - Ultra-low resistivity contacts
Contacts for semiconductor devices and methods of making thereof are disclosed. A method comprises forming a first layer on a semiconductor, the first layer comprising one or more metals; forming a second layer on the first layer, the second layer comprising the one or more metals, nitrogen and oxygen; and...

09/18/14 - 20140264826 - Semiconductor device and semiconductor device fabrication method
A semiconductor device has a structure including a substrate, a first insulating film formed over a part of a principal plane of the substrate, a conductive portion formed over a surface of the first insulating film, and a second insulating film which covers the principal plane of the substrate, the...

08/21/14 - 20140231983 - Film adhesive, dicing tape with film adhesive, method of manufacturing semiconductor device, and semiconductor device
The present invention relates to a film adhesive comprising a thermoplastic resin and electrically conductive particles, the film adhesive having an adhesion strength measured at 25° C. after the film adhesive is pasted to a mirror silicon wafer at 40° C. of 0.5 N/10 mm or more....

08/14/14 - 20140225250 - Methods and systems for fabrication of low-profile mems cmos devices
A MEMS integrated circuit including a plurality of layers where a portion includes one or more electronic elements on a semiconductor material substrate. The circuit includes a structure of interconnection layers having a bottom layer of conductor material and a top layer of conductor material where the layers are separated...

08/14/14 - 20140225251 - Semiconductor devices and methods of fabricating the same
Semiconductor devices, and methods of fabricating the same, include first conductive lines on a substrate, and a first molding layer covering the first conductive lines. The first conductive lines have air gaps between adjacent first conductive lines. Sidewalls of the first conductive lines and a bottom surface of the first...

08/07/14 - 20140217577 - Semiconductor device and method for manufacturing a semiconductor device
A device includes a semiconductor chip including a first main face and a second main face, the second main face being the backside of the semiconductor chip. The second main face includes a first region and a second region, the second region being a peripheral region of the second main...

07/31/14 - 20140210073 - Conductive paste, electrode for semiconductor device, semiconductor device, and method for manufacturing semiconductor device
Provided is a conductive paste, an electrode for a semiconductor device manufactured by using the conductive paste, a semiconductor device and a method for manufacturing the semiconductor device. The conductive paste includes conductive powder made of a plurality of conductive particles and silver powder made of a plurality of silver...

07/24/14 - 20140203427 - Low alpha particle emission electrically-conductive coating
An electrically conductive paste providing low alpha particle emission is provided. A resin and conductive particles are mixed, and a curing agent is added. A solvent is subsequently added. The electrically conductive paste including a resin compound is formed by mixing the mixture in a high shear mixer. The electrically...

07/10/14 - 20140191388 - 3d stacking semiconductor device and manufacturing method thereof
A 3D stacking semiconductor device and a manufacturing method thereof are provided. The manufacturing method includes the following steps. N layers of stacking structures are provided. Each stacking structure includes a conductive layer and an insulating layer. A first photoresister layer is provided. The stacking structures are etched P−1 times...

07/10/14 - 20140191389 - Semiconductor device and method of manufacturing the same
A semiconductor device includes a substrate in which a cell region and a contact region are defined, a pad structure including a plurality of first conductive layers and a plurality of first insulating layers formed alternately with each other in the contact region of the substrate, wherein an end of...

07/03/14 - 20140183720 - Methods of manufacturing integrated circuits having a compressive nitride layer
Methods of manufacturing semiconductor integrated circuits having a compressive nitride layer are disclosed. In one example, a method of fabricating an integrated circuit includes depositing an aluminum layer over a semiconductor substrate, depositing a tensile silicon nitride layer or a neutral silicon nitride layer over the aluminum layer, and depositing...

07/03/14 - 20140183721 - Semiconductor package and fabrication method thereof
A fabrication method of a semiconductor package is provided, which includes the steps of: providing a carrier having an adhesive layer and at least a semiconductor element having a protection layer; disposing the semiconductor element on the adhesive layer of the carrier through the protection layer; forming an encapsulant on...

07/03/14 - 20140183722 - Semiconductor device and method for manufacturing same
This semiconductor device, which has electronic components provided in a cavity of a module having a cavity structure, can be prevented from being increased in size. In the device, the module having the cavity structure is provided with a plurality of components, for instance, an IC (3) and chip components...

06/19/14 - 20140167249 - Interconnect structure and fabrication method
An interconnect structure and fabrication method are provided. A substrate can include a semiconductor device disposed therein. A porous dielectric layer can be formed on the substrate. A surface treatment can be performed to the porous dielectric layer to form an isolation layer on the porous dielectric layer to prevent...

06/19/14 - 20140167250 - Semiconductor device
A semiconductor device and a method of forming the same are disclosed, which forms a low-dielectric-constant oxide film only at a peripheral part of a bit line conductive material, resulting in reduction in parasitic capacitance of the bit line. The semiconductor device includes a bit line formed over a semiconductor...

06/12/14 - 20140159227 - Patterning transition metals in integrated circuits
Fabricating conductive lines in an integrated circuit includes patterning a layer of a transition metal to form the conductive lines and depositing a protective cap on at least some of the one or more conductive lines. Alternatively, fabricating conductive lines in an integrated circuit includes patterning a layer of a...

06/12/14 - 20140159228 - High density substrate routing in bbul package
Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die...

06/12/14 - 20140159229 - Semiconductor device connected by anisotropic conductive film
A semiconductor device connected by an anisotropic conductive film, the film having a storage modulus of 100 MPa to 300 MPa at 40° C. after curing of the film, and a peak point of 80° C. to 90° C. in a DSC (Differential Scanning calorimeter) profile of the film....

06/12/14 - 20140159230 - Semiconductor device
A semiconductor device includes a semiconductor element in the form of a flat plate that has opposed first and second surfaces, an insulating layer that covers control wiring located on the first surface side of the semiconductor element, a metal block that is bonded to the first surface side of...

05/22/14 - 20140138813 - Method for manufacturing an electronic component
A semiconductor wafer includes a first main face and a second main face opposite to the first main face and a number of semiconductor chip regions. The wafer is diced along dicing streets to separate the semiconductor chip regions from each other. At least one metal layer is formed on...

05/15/14 - 20140131852 - Semiconductor device and method for manufacturing the same
In a semiconductor integrated circuit sandwiched between a pair of a first impact resistance layer and a second impact resistance layer, an impact diffusion layer is provided between the semiconductor integrated circuit and the second impact resistance layer. By provision of the impact resistance layer against the external stress and...

05/15/14 - 20140131853 - Electronic component, method of manufacturing same, composite module including electronic component, and method of manufacturing same
A method of manufacturing a composite module prevents a connection electrode electrically coupled to a functional element from separating from a first principal surface of an element substrate. A transmission filter element, a reception filter element, connection electrodes electrically coupled to the transmission filter element and the reception filter element,...

05/01/14 - 20140117529 - Semiconductor constructions, patterning methods, and methods of forming electrically conductive lines
Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the...

05/01/14 - 20140117530 - Semiconductor devices and methods for manufacturing semiconductor devices
A device includes a semiconductor material having a first main surface, an opposite surface opposite to the first main surface and a side surface extending from the first main surface to the opposite surface. The device further includes a first electrical contact element arranged on the first main surface of...

05/01/14 - 20140117531 - Semiconductor device with encapsulant
Described are techniques related to semiconductor devices that make use of encapsulant. In one implementation, a semiconductor device may be manufactured to include at least an encapsulant that includes at least glass particles....

04/17/14 - 20140103519 - Power semiconductor module
A power semiconductor module comprising a substrate. The power semiconductor module has first and second DC voltage load current connection elements and first and second power semiconductor components. The first and second power semiconductor components are arranged along a lateral first direction of the substrate. The power semiconductor module has...

04/03/14 - 20140091454 - Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package
A semiconductor device includes a semiconductor die. An encapsulant is formed around the semiconductor die. A build-up interconnect structure is formed over a first surface of the semiconductor die and encapsulant. A first supporting layer is formed over a second surface of the semiconductor die as a supporting substrate or...

04/03/14 - 20140091455 - Semiconductor device and method of using a standardized carrier in semiconductor packaging
A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first...

03/27/14 - 20140084450 - Processes for multi-layer devices utilizing layer transfer
A method includes forming a release layer over a donor substrate. A plurality of devices made of a first semiconductor material are formed over the release layer. A first dielectric layer is formed over the plurality of devices such that all exposed surfaces of the plurality of devices are covered...

03/27/14 - 20140084451 - Split loop cut pattern for spacer process
A semiconductor fabrication technique cuts loops formed in a spacer pattern. The spacer pattern is a split loop pattern which generally includes a symmetric arrangement of one or more loops in each of four quadrants which are defines with respect to a reference point. The loops can be peaks or...

03/27/14 - 20140084452 - Element mounting board and semiconductor module
Prepared in advance is a substrate formed of metallic material where slits are formed between mounting regions. Oxide films are generated all over the substrate including end faces of the substrate. Exposed are only lateral faces corresponding to the cross sections cut when tie bars are cut. This structure and...

02/13/14 - 20140042612 - Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In an embodiment, a method of manufacturing a semiconductor device includes forming a first conductive structure over a workpiece in a first metallization layer, the first conductive structure including a first portion having a first width and a second portion having...

02/13/14 - 20140042613 - Semiconductor device and method of manufacturing the same
A semiconductor device is provided with: a semiconductor substrate; an insulation film formed above the semiconductor substrate; a pad formed on the insulation film, the pad including a trace; a first passivation film formed on the insulation film, located adjacent the pad, and separated from the pad; and a second...

02/06/14 - 20140035124 - Semiconductor device and manufacturing method of same
An semiconductor device includes a semiconductor substrate; a metal layer arranged above the semiconductor substrate; a first passivation film that contacts at least a portion of one side surface of the metal layer; and a second passivation film that is arranged extending from the first passivation film to the metal...

01/16/14 - 20140015121 - Wiring substrate and manufacturing method thereof
A wiring substrate includes: a core substrate made of glass and having: a first surface; a second surface opposite to the first surface; and a side surface between the first surface and the second surface; and an insulating layer and a wiring layer, which are formed on at least one...

12/26/13 - 20130341783 - Interposer with identification system
Various interposers and method of manufacturing related thereto are disclosed. In one aspect, a method of manufacturing is provided that includes coupling an identification structure to an interposer. The identification structure is operable to provide identification information about the interposer. The identification structure is programmable to create or alter the...

12/19/13 - 20130334678 - Device for supporting a substrate, as well as methods for manufacturing and using such a device
A device (10) supports a substrate during the manufacture of semiconductor components. The device includes a substantially flat plate with an upper surface (11) on which the substrate can be positioned. In some embodiments, the device (10) is of inexpensive and simple construction and allows for the passage of a...

12/19/13 - 20130334679 - Metal conservation with stripper solutions containing resorcinol
Resist stripping agents useful for fabricating circuits and/or forming electrodes on semiconductor devices for semiconductor integrated circuits and/or liquid crystals with reduced metal and metal alloy etch rates (particularly copper etch rates and TiW etch rates), are provided with methods for their use. The preferred stripping agents contain low concentrations...

12/05/13 - 20130320519 - Semiconductor device and method of backgrinding and singulation of semiconductor wafer while reducing kerf shifting and protecting wafer surfaces
A semiconductor device has a semiconductor wafer with an interconnect structure formed over a first surface of the wafer. A trench is formed in a non-active area of the semiconductor wafer from the first surface partially through the semiconductor wafer. A protective coating is formed over the first surface and...

12/05/13 - 20130320520 - Chemically altered carbosilanes for pore sealing applications
A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a portion of the surface of the dielectric material with a first reactant; reacting the chemically modified portion of the surface with a molecule that, once reacted, will...

11/21/13 - 20130307137 - Chip package and method for forming the same
Embodiments of the present invention provide a chip package including: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface; and a conducting pad structure disposed in the dielectric layer and electrically connected...

11/21/13 - 20130307138 - Deskewed multi-die packages
A microelectronic package may have a plurality of terminals disposed at a face thereof which are configured for connection to at least one external component. e.g., a circuit panel. First and second microelectronic elements can be affixed with packaging structure therein. A first electrical connection can extend from a respective...

11/14/13 - 20130299964 - Method for forming a fine pattern using isotropic etching
A method for forming a fine pattern using isotropic etching, includes the steps of forming an etching layer on a semiconductor substrate, and coating a photoresist layer on the etching layer, performing a lithography process with respect to the etching layer coated with the photoresist layer, and performing a first...

10/24/13 - 20130277822 - Interconnect structures for integrated circuits and their formation
An embodiment of an interconnect structure for an integrated circuit may include a first conductor coupled to circuitry, a second conductor, a dielectric between the first and second conductors, and a conductive underpass under and coupled to the first and second conductors and passing under the dielectric or a conductive...

10/24/13 - 20130277823 - Split loop cut pattern for spacer process
A semiconductor fabrication technique cuts loops formed in a spacer pattern. The spacer pattern is a split loop pattern which generally includes a symmetric arrangement of one or more loops in each of four quadrants which are defines with respect to a reference point. The loops can be peaks or...

10/24/13 - 20130277824 - Manufacturing method for semiconductor device and semiconductor device
In a method of manufacturing a semiconductor device, a first semiconductor element is mounted on a carrier. A b-stage curable polymer is deposited on the carrier. A second semiconductor element is affixed on the polymer....

10/24/13 - 20130277825 - Method for preventing corrosion of copper-aluminum intermetallic compounds
The packaging of an electric contact including a semiconductor chip (102) having terminals (101) of a first metal and connecting wires (111, 112) of a second metal, the wires forming at the terminals regions (113) of intermetallic compounds of the first and second metals; a solution of an aromatic azole...