REGISTER now for FREE 
|
FREE patent keyword monitoring and additional FREE benefits. REGISTER now for FREE
|
|
|
Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Housing Or Package > Insulating Material Insulating MaterialInsulating Material patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.11/29/07 - 20070273022 - Semiconductor device In a semiconductor device comprising a ceramic substrate, a surface mount component, and sealing resin and obtained by division into pieces, the ceramic substrate is composed of a multiple piece substrate provided with dividing grooves for the division into pieces on both front and rear surfaces in advance, a plurality ... 11/01/07 - 20070252266 - Flat panel display with black matrix and method of fabricating the same A flat panel display with a black matrix and a fabrication method of the same. The flat panel display has an insulating substrate at the upper part of which a pixel electrode is equipped; an opaque conductive film formed on the front surface of the insulating substrate except at the ... 10/25/07 - 20070246821 - Utra-thin substrate package technology A semiconductor package assembly having reduced stresses and a method for forming the same are provided. The method includes providing a package substrate comprising a base material, forming an interconnect structure overlying the package substrate, attaching at least one chip to a first surface of the package substrate, thinning the ... 10/25/07 - 20070246820 - Die protection process A method of protecting a microelectronic chip contained in a microelectronic assembly, including the steps of depositing a protective coating across the exposed faces of the chip. The coating, having a low modulus of elasticity, is applied across the chip so as to reduce the overall height of the assembly ... 09/20/07 - 20070216021 - Semiconductor device and method of manufacturing thereof A method of manufacturing a semiconductor device sealed in a cured silicone body by placing a semiconductor device into a mold and subjecting a curable silicone composition that fills the spaces between said mold and said semiconductor device to compression molding, wherein the curable silicone composition comprises the following components: ... 08/30/07 - 20070200221 - Electronic component module An electronic component module is provided with a ceramic substrate and a plurality of bonding material applying lands. The ceramic substrate has a rear surface that is substantially rectangular. The plurality of bonding material applying lands are arranged on the rear surface. The plurality of bonding material applying lands includes ... 08/30/07 - 20070200220 - Flexible substrate A flexible substrate is provided which contains not only flexibility but also rigidity and hear resistance. A flexible substrate includes a first wiring layer, an insulating resin layer, a glass cloth and a second wiring layer. The insulating layer is formed by an insulating material, such as a BT resin, ... 08/23/07 - 20070194437 - Substrate having a functionally gradient coefficient of thermal expansion A substrate and a method of making a substrate having a functionally gradient coefficient of thermal expansion are described herein. A system having a silicon die, an organic package substrate, and a substrate having a functionally gradient coefficient of thermal expansion, connecting the silicon die and the organic substrate is ... 08/16/07 - 20070187813 - Uv blocking and crack protecting passivation layer A semiconductor device comprises a substrate, a patterned metal conductor layer over the substrate, and a passivation layer. The passivation layer may comprise a UV blocking, protection layer, over at least a portion of the substrate and patterned metal conductor layers, and a separation layer between the patterned metal conductor ... 08/02/07 - 20070176282 - Aerogel/ptfe composite insulating material A material comprising aerogel particles and a polytetrafluoroethylene (PTFE) binder is formed having a thermal conductivity of less than or equal to 25 mW/m K at atmospheric conditions. The material is moldable or formable, having little or no shedding of filler particles, and may be formed into structures such as ... 07/05/07 - 20070152320 - Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device A semiconductor device includes a plurality of insulating layers laminated on a substrate to cover passive elements such as a capacitor, an inductor, and the like, and to fix an IC chip in a face up state in one of the insulating layers. The insulating layers have similar structures in ... 06/28/07 - 20070145570 - Semiconductor device A semiconductor device has an improved mounting reliability and has external terminals formed by exposing portions of leads from a back surface of a resin sealing member. End portions on one side of the leads are fixed to a back surface of a semiconductor chip, and portions of the leads ... 06/21/07 - 20070138620 - Composite flow board for fuel cell A composite flow board for a fuel cell is disclosed, which includes a first substrate, a second substrate and at least one third substrate. The first substrate is made of plasticized material in the form of a plate. The first substrate includes one or more concave portions spaced apart from ... 04/26/07 - 20070090513 - Power module fabrication method and structure thereof A power module fabrication method and structure thereof is disclosed. The method includes steps of: providing a metal plate and defining a pattern on the metal plate; cutting the metal plate according to the pattern to form a plurality of pins and the heat-conducting plate, wherein the pin is coupled ... 04/26/07 - 20070090512 - Signal transmission line A signal transmission line used in a printed circuit board (PCB), the signal transmission line comprises a driving terminal for driving a signal, a contact portion, the signal line connected with the driving terminal and the contact portion to transmit the signal wherein a length of the signal line is ... 03/29/07 - 20070069367 - Reduced stress on saw die with surrounding support structures A die structural support apparatus and method are disclosed, in which a die component is provided. A support element can be configured for use with the die component, wherein said support element surrounds said die component, thereby strengthening said die component to provide a surrounding die support structure thereof. The ... 03/15/07 - 20070057364 - Low temperature co-fired ceramic (ltcc) tape compositions, light emitting diode (led) modules, lighting devices and method of forming thereof The present invention provides LTCC (low temperature co-fired ceramic) tape compositions and demonstrates the use of said LTCC tape(s) in the formation of Light-Emitting Diode (LED) chip carriers and modules for various lighting applications. The present invention also provides for the use of (LTCC) tape and LED modules in the ... 03/01/07 - 20070045818 - Land grid array semiconductor device packages, assemblies including same, and methods of fabrication A semiconductor device package includes a land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interposer substrate as the at least one semiconductor die. Terminal pads of ... 02/22/07 - 20070040264 - Underfilled semiconductor die assemblies and methods of forming the same An apparatus and method for packaging a semiconductor die and a carrier substrate to substantially prevent trapped moisture therebetween and provide a robust, inflexible cost-effective bond. The semiconductor die is attached to the carrier substrate with a plurality of discrete adhesive elements so as to provide a gap or standoff ... 01/11/07 - 20070007643 - Semiconductor multi-chip package The invention provides a semiconductor multi-chip package including a substrate, a first semiconductor chip mounted on the substrate and a second semiconductor chip disposed directly above the first semiconductor chip. The package further includes a spacer disposed between the substrate and the second semiconductor chip to maintain a vertical interval ... 12/14/06 - 20060278973 - Semiconductor device with improved design freedom of external terminal A semiconductor device comprises: a base; a semiconductor chip provided on the base which includes a first main surface 20a on which a plurality of electrode pads is provided, a surface protecting film provided on the first main surface, a second main surface which opposes the first main surface, and ... 12/14/06 - 20060278972 - Panel and semiconductor component having a composite board with semiconductor chips and plastic package molding compound and method for the production thereof A panel and a semiconductor component including a composite board with semiconductor chips and plastic package molding compound and a method for the production thereof is disclosed. In one embodiment, the panel includes a composite board with semiconductor chips arranged in rows and columns in a corresponding plastic package molding ... 12/14/06 - 20060278971 - Method and apparatus for applying external coating to grid array packages for increased reliability and performance A method and apparatus are disclosed for selective removal of a conformal coating from the solder balls of grid array packages such that the benefits of the coating are realized. An ancillary benefit of the invention is improved process-ability of the grid array package by improving the mechanical containment of ... 12/07/06 - 20060273448 - Semiconductor structures having electrophoretically insulated vias Methods are provided for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed ... 12/07/06 - 20060273447 - Electronic package structures and methods Electronics packages are provided with structure that provides a significantly-reduced package footprint and also facilitates substantial reduction of package fabrication time and cost. The footprint reduction is realized with a frame that defines an aperture wall which surrounds first sets of components on the first side of a printed circuit ... 11/30/06 - 20060267180 - Heat sink arrangement for electrical apparatus A printed circuit board (120) includes an insulating substrate (120a) on which conductive films (120b) are formed. Semiconductor devices (8) disposed external to the printed circuit board (120) have their leads (24a, 24b, 24c) connected to the conductive films. A flexible portion (30) is formed in the insulating substrate (120a) ... 10/12/06 - 20060226538 - Interposer and semiconductor device employing same, and method for manufacturing semiconductor device Bending generated in a side of a device mounting surface of an organic resin substrate after an assembly process for a semiconductor device is inhibited, thereby providing an improved production yield. A semiconductor device 100 is formed by solder-joining a semiconductor chip 105 onto a device mounting surface 111 of ... 09/28/06 - 20060214282 - Flexible printed wiring board, method for fabricating flexible printed wiring board, and semiconductor device A flexible printed wiring board comprises a wiring pattern that is made of conductive metal on the surface of an insulating base film and that is protected by bonding an insulating cover layer film to the surface of the wiring pattern in such a manner that the terminal section of ... 09/28/06 - 20060214281 - Stress absorption layer and cylinder solder joint method and apparatus An apparatus, method, and system for providing a stress absorption layer for integrated circuits includes a stiffening layer adapted to limit flexing. A compliance layer is physically associated with the stiffening layer, with the compliance layer adapted to absorb stress caused by mismatched thermal properties between two materials. A thru ... 09/21/06 - 20060208352 - Strain silicon wafer with a crystal orientation (100) in flip chip bga package A method and system is disclosed for better packaging semiconductor devices. In one example, a semiconductor device package comprises a package substrate, at least one die with an orientation of <100> placed on the substrate with electrical connections made between the package substrate and the die, and an underfill fillet ... 08/31/06 - 20060192280 - Method of forming electronic devices A method of forming polymer reinforced solder-bumped containing device or substrate is described. The method comprises the following steps: providing a device or substrate having at least one solder bump formed thereon; coating a predetermined portion of the device or substrate with a curable polymer reinforcement material forming a layer ... 08/17/06 - 20060180921 - Method for producing an fbga component and substrate for carrying out the method A semiconductor component includes a substrate having a chip side and a solder ball side. A semiconductor chip is mounted on the chip side of a substrate. The semiconductor chip is electrically conductively connected to a conductor structure on the substrate. Ball pads are disposed over the solder ball side ... 07/27/06 - 20060163717 - Method for connection of an integrated circuit to a substrate, and a corresponding circuit arrangement The present invention provides a method for connection of an integrated circuit (1), in particular of a chip, a wafer or a hybrid, to a substrate (10), which has the following steps: provision of an elastic intermediate layer (5) on the integrated circuit (1) and/or the substrate (10); structuring of ... 06/08/06 - 20060118944 - Method for fabricating semiconductor package having conductive bumps on chip A semiconductor package having conductive bumps on a chip and a fabrication method thereof are provided. A plurality of the conductive bumps are deposited respectively on bond pads of the chip. An encapsulation body encapsulates the chip and conductive bumps while exposing ends of the conductive bumps. A plurality of ... 06/08/06 - 20060118943 - Use of visco-elastic polymer to reduce acoustic and/or vibration induced error in microelectromechanical devices and systems A system and method for reducing rectification error in a MEMS device cause by noise and/or vibration. A visco-elastic polymer is situated around at least part of the MEMs device, wherein the visco-elastic polymer converts at least some of the acoustic and/or vibration energy into heat, thereby reducing effects of ... 05/11/06 - 20060097379 - Substrate for electrical device and methods for making the same Substrate for electrical devices and methods of manufacturing such substrate are disclosed. An embodiment for the substrate comprised of an insulator and a plurality of conductive elements, wherein the conductive elements embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for ... 05/04/06 - 20060091525 - Wiring board with semiconductor component An electronic device comprised of a wiring board with a semiconductor component. The device is unlikely to have any defects, such as cracks to a solder joint portion during a reflow process of a flip-chip connection. The semiconductor component is flip-chip bonded at a pad array at a component side ... 03/16/06 - 20060055026 - Apparatus for and method of packaging semiconductor devices A carrier and package for plural semiconductor devices includes a member with device-conformal apertures therethrough. A first removable cover is attached to one side of the member to close one end of each aperture. After devices are inserted into the apertures with their first ends “up” and their second ends ... 03/02/06 - 20060043574 - Aluminum/ceramic bonding substrate There is provided an aluminum/ceramic bonding substrate having a high reliability to high-temperature heat cycles. An aluminum member of an aluminum alloy having a Vickers hardness of 35 to 45 is bonded to a ceramic substrate having a flexural strength of 500 to 600 MPa in three-point bending. The ceramic ... 02/09/06 - 20060027913 - Shielding for emi-sensitive electronic components and or circuits of electronic devices A shielding apparatus for EMI-sensitive electronic components, especially for radio transmitting devices and/or radio receiving devices of telecommunication terminals for contactless telecommunication, such as cordless telephones and mobile telephones and similar, which can be constructed without using expensive manufacturing and assembly steps without any extra space requirement. The EMI-sensitive electronic ... 02/09/06 - 20060027912 - Film carrier tape for mounting of electronic part A film carrier tape for mounting electronic components includes comprises an insulating film and, on the surface thereof, an inner connection terminal, an outer connection terminal and wiring for connecting these terminals, and further includes a solder resist layer covered in such a way that the connection terminals are exposed, ... 02/02/06 - 20060022329 - Carrier device for electronic chip A surface mount electronic chip (10) is mounted on a holder (70) and electrically connected to holder terminals (74, 76, 80) by the use of a carrier device (30). The carrier device has clips (36) mounted on walls of the carrier frame. The chip is merely pressed into a cavity ... 01/26/06 - 20060017154 - Semiconductor device and method for manufacturing same A method to provide an improved production yield of electronic devices. A thin film device 41 is manufactured by the following method. Semiconductor elements 11 are formed on the substrate 10. Then, a protective film is adhered onto the upper portions of the semiconductor elements 11 using an adhesive agent. ... 01/12/06 - 20060006521 - Semiconductor device assemblies and packages with edge contacts and sacrificial substrates and other intermediate structures used or formed in fabricating the assemblies or packages A sacrificial for fabricating semiconductor device assemblies and packages with edge contacts includes conductive elements on a surface thereof, which are located so as to align along a street between each adjacent pair of semiconductor devices on the device substrate. A semiconductor device assembly or package includes a semiconductor device, ... 01/05/06 - 20060001151 - Atomic layer deposited dielectric layers An atomic layer deposited dielectric layer and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Depositing a hafnium metal layer on a substrate surface by atomic layer deposition and depositing a hafnium oxide layer on ... 12/29/05 - 20050285256 - Methods of forming semiconductor constructions The invention includes a semiconductor construction. The construction has a semiconductor material die with a front surface, a back surface in opposing relation to the front surface, and a thickness of less than 400 microns between the front and back surfaces. The construction also has circuitry associated with the die ... 12/08/05 - 20050269687 - Build-up structures with multi-angle vias for chip to chip interconnects and optical bussing A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and/or other active or passive ... 12/01/05 - 20050263876 - Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit An improved dual damascene structure is provided for use in the wiring-line structures of multi-level interconnects in integrated circuit. In this dual damascene structure, low-K (low dielectric constant) dielectric materials are used to form both the di-electric layers and the etch-stop layers between the metal interconnects in the IC device. ... 12/01/05 - 20050263875 - Method for controlled ink-jet spreading of polymers for the insulation and/or protection of printed circuits Method for the controlled ink-jet spreading of polymeric material for insulation and/or protection of printed circuits, characterized in that it has at least the following steps: —carrying out at least a first bedding/bordering/border-line contour run of the circuit design, creating a line of outline/bordering design slightly raised from said printed ... 11/17/05 - 20050253250 - Mold gates, tape substrates with the mold gates, and packaging methods A mold gate of a tape substrate includes an aperture formed in the flexible dielectric film of the tape substrate and a support element which is carried by a surface of the flexible dielectric film. The aperture of the mold gate may be formed by die cutting or etching processes. ... 10/13/05 - 20050224952 - Three dimensional six surface conformal die coating Semiconductor die are typically manufactured as a large group of integrated circuit die imaged through photolithographic means on a semiconductor wafer or slice made of silicon. After manufacture, the silicon wafer is thinned, usually by mechanical means, and the wafer is cut, usually with a diamond saw, to singulate the ... 10/13/05 - 20050224951 - Jet-dispensed stress relief layer in contact arrays, and processes of making same A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a solder bump that is disposed upon the lower surface. The stress-relief layer flows against the solder bump. An article that exhibits a stress-relief layer with a structure characteristic of the ... 09/15/05 - 20050199997 - Semiconductor device, manufacturing method thereof, circuit board, and electronic appliance The semiconductor device includes the following: a semiconductor chip, in which an integrated circuit is formed, having a polygon surface, and a plurality of electrodes thereon, that is electrically connected to the integrated circuit, is installed on the polygon surface; a first resin layer formed over the polygon surface of ... 09/01/05 - 20050189645 - Flexible printed circuit board A flexible printed circuit board includes a substrate layer composed of insulating material, a protection circuit of a thin-film capacitor element, the protection circuit including a first wiring layer on the substrate layer, a dielectric layer, and a counter electrode layer. At least a portion of each of the first ... 08/04/05 - 20050167818 - Mold release layer transferring film and laminate film The releasing layer transfer film 1 for forming a releasing layer onto an insulating layer serving as a component layer of a COF flexible printed wiring board, the releasing layer transfer film includes a transfer film substrate 2 and a transferable releasing layer 3 provided on a surface of the ... ### FreshPatents.com Support |