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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Housing Or Package > With Contact Or Lead > With Specific Electrical Feedthrough Structure With Specific Electrical Feedthrough StructureWith Specific Electrical Feedthrough Structure patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.01/31/08 - 20080023820 - Bond finger on via substrate, process of making same, package made thereby, and method of assembling same A wire-bonding substrate is disclosed. The wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the in the wire-bonding substrate. A package is also disclosed that includes a die that is coupled to the first wire-bonding pad. The ... 01/24/08 - 20080017972 - Electronic circuit in a package-in-package configuration and production method An electronic circuit in a package-in-package configuration and a production method is disclosed. One embodiment provides an arrangement enveloped by an encapsulation and composed of at least one semiconductor element on an element carrier, at least one leadframe with at least one inner contact-connection, at least one inner lead running ... 01/17/08 - 20080012120 - Multilayer wiring substrate and manufacturing method thereof A multilayer wiring substrate has a plurality of wiring layers and interlayer insulating films, as well as a via of a type which connects between adjacent wiring layers and a via of a type which connects upper and lower wiring layers through two or more interlayer insulating films, wherein at ... 12/20/07 - 20070290327 - Circuit board and method for manufacturing semiconductor modules and circuit boards The deterioration of dielectric breakdown strength arising from an opening of a metal plate is prevented and the reliability as a circuit board is enhanced. A circuit board is provided with a metal plate, having openings, as core material. The opening is provided in a manner that the size of ... 12/13/07 - 20070284726 - Integrated circuit package system with post-passivation interconnection and integration An integrated circuit package system including: providing an integrated circuit die, forming a first layer over the integrated circuit die, forming a bridge on and in the first layer, forming a second layer on the first layer, and forming bump pads on and in the second layer, the bump pads ... 10/25/07 - 20070246819 - Semiconductor components and systems having encapsulated through wire interconnects (twi) and wafer level methods of fabrication A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) attached to the substrate contact. The through wire interconnect provides a multi level interconnect having contacts on opposing first and second sides of the semiconductor substrate. The through wire interconnect (TWI) includes a ... 10/18/07 - 20070241446 - Two-sided wafer escape package A method and structure provides a Direct Write Wafer Level Chip Scale Package (DWWLCSP) that utilizes permanent layers/coatings and direct write techniques to pattern these layers/coatings, thereby avoiding the use of photoimagable materials and photo-etching processes. ... 10/04/07 - 20070228549 - Interconnect structure with stress buffering ability and the manufacturing method thereof An interconnect structure with stress buffering ability is disclosed, which comprises: a first surface, connected to a device selected form the group consisting of a substrate and an electronic device; a second surface, connected to a device selected form the group consisting of the substrate and the electronic device; a ... 09/27/07 - 20070222061 - Semiconductor module with serial bus connection to multiple dies The semiconductor module includes a heat spreader and at least two semiconductors coupled thereto. Each of the semiconductors comprises a die containing integrated circuitry and electrical connectors coupled to the die. The module also includes a flexible circuit having opposing first and second sides. The first side of the flexible ... 09/13/07 - 20070210440 - Semiconductor device A chip size package semiconductor device can have reliable solder mounting and improved mounting reliability. A semiconductor device (10) of one embodiment can include a semiconductor chip (1) mounted to a bottom portion (11) of a metal base (10). A metal base (10) can have side portions (12) with connection ... 08/23/07 - 20070194432 - Arrangement of non-signal through vias and wiring board applying the same An arrangement of non-signal through vias suitable for a wiring board is provided. The wiring board has a contact surface, a core layer and pads. The contact pads are disposed on the contact surface, while the arrangement of non-signal through vias includes first non-signal through vias and a second non-signal ... 08/23/07 - 20070194431 - Conductive vias having two or more conductive elements for providing electrical communication between traces in different planes in a substrate, semiconductor device assemblies including such vias, and accompanying methods Electronic devices include a substrate with first and second pairs of conductive traces extending in or on the substrate. A first conductive interconnecting member extends through a hole in the substrate and communicates electrically with a first trace of each of the first and second pairs, while a second conductive ... 08/09/07 - 20070181992 - Microelectronic devices and methods for manufacturing microelectronic devices Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a microelectronic device includes a microelectronic die, a plurality of electrical couplers projecting from the die, and a flowable material disposed on the die. The die includes an integrated circuit and a plurality of terminals operably ... 06/28/07 - 20070145568 - Multi-layer interconnection circuit module and manufacturing method thereof The present invention is directed to a multi-layer interconnection circuit module in which plural unit wiring layers are interlayer-connected to each other through a large number of via holes so that they are laminated and formed, wherein respective unit wiring layers (8) to (12) are adapted so that photo-lithographic processing ... 06/21/07 - 20070138618 - Stack package of ball grid array type A stack package may include a plurality of individual packages arranged in a stack. Each individual package may have a circuit substrate disposed on the upper and lower surfaces of a semiconductor chip. Through bonding wires, a lower circuit substrate may be electrically connected to the semiconductor chip, and an ... 06/14/07 - 20070132088 - Printed circuit board A printed circuit board including a conductor portion, an insulating layer formed over the conductor portion, a thin-film capacitor formed over the insulating layer and including a first electrode, a second electrode and a high-dielectric layer interposed between the first electrode and the second electrode, and a via-hole conductor structure ... 06/14/07 - 20070132087 - Via hole having fine hole land and method for forming the same Disclosed herein are a via hole having a fine hole land with which the density of circuit patterns can be increased and a method for forming the same. The method comprises: step 1 of forming a via hole in a copper clad laminate, coating an etching resist over the copper ... 05/31/07 - 20070120248 - Semiconductor device There is disclosed a semiconductor device comprising at least two substrates, at least one wiring being provided in each of the substrates, the substrates being stacked such that major surfaces on one side of each thereof oppose each other and the wirings being connected between the major surfaces, and a ... 05/24/07 - 20070114653 - Wiring glass substrate for connecting a semiconductor chip to a printed wiring substrate and a semiconductor module having the wiring glass substrate A wiring glass substrate includes a glass substrate formed of glass and having a plurality of holes formed at predetermined positions, bumps so formed as to be connected to a conductive material filling the holes and wirings formed on a surface opposite to a surface having the bumps formed thereon ... 05/10/07 - 20070102806 - Power distribution for high-speed integrated circuits An improved technique for power distribution for use by high speed integrated circuit devices. A mixture of high dielectric constant, Er and low Er materials are used in a dielectric layer sandwiched between the voltage and ground planes of a printed circuit board that is used to fixture one or ... 05/10/07 - 20070102805 - Chip type electric device and method, and display device including the same A chip type electric device and a display device including the same is capable of preventing a bonding defect caused by a deviation in height between external electrodes. The chip type electric device includes a body in which a plurality of dielectric layers is stacked, a contact hole penetrating at ... 05/10/07 - 20070102804 - Multilayered printed wiring board and manufacturing method thereof An object of the present invention is to provide a multi-layered printed wiring board which does not require roughening such as black oxide treatment and the like on inner layer circuits. For the purpose of achieving this object, there is adopted a multi-layered printed wiring board characterized by comprising a ... 04/19/07 - 20070085193 - Printed wiring board and method of suppressing power supply noise thereof Disclosed is a printed wiring board having signal layers each interposed between a power supply layer and a ground layer, wherein the signal layer includes at least one of a wiring region for a ground potential and a wiring region for a power supply potential. ... 03/29/07 - 20070069364 - Semiconductor device and method for manufacturing same A falling off of a through electrode is inhibited without decreasing a reliability of a semiconductor device including a through electrode. A semiconductor device 100 includes: a silicon substrate 101; a through electrode 129 extending through the silicon substrate 101; and a first insulating ring 130 provided in a circumference ... 03/29/07 - 20070069363 - Semiconductor ic-embedded substrate and method for manufacturing same A semiconductor IC-embedded substrate suitable for embedding a semiconductor IC in which the electrode pitch is extremely narrow. The substrate comprises a semiconductor IC 120 in which stud bumps 121 are provided to the principal surface 120a, a first resin layer 111 for covering the principal surface 120a of the ... 03/22/07 - 20070063336 - Qfn/son-compatible package A leadless package and method for manufacturing silicon based leadless QFN/SON compatible packages are described. In addition the package allows for hermetic sealing of devices while maintaining electrical and optical access. Micro-vias with feed-through metallization through a silicon structure facilitates a surface mount technology-compatible silicon package with bottom SMT pads ... 03/15/07 - 20070057363 - Multilayered wiring substrate and method of manufacturing the same A multilayered wiring substrate constructed by staking a wiring layer 105, 108, 110, 112 and an insulating layer 104, 106, 107, 109 in predetermined number, which includes a reinforcing wiring layer 103 whose thickness is 35 to 150 μm is arranged in one layer or plural layers. ... 03/08/07 - 20070052086 - Electronic parts and method of manufacturing electronic parts packaging structure A method of manufacturing an electronic parts packaging structure of the present invention, includes a step of mounting an electronic parts, which has a connection terminal and a passivating film to cover the connection terminal, on a mounted body to direct the connection terminal upward, a step of forming an ... 03/01/07 - 20070045816 - Electronic package with improved current carrying capability and method of forming the same An electronic package and method for forming such package that expands the current capability of lines and/or reducing line resistance for packages with a given feature dimension while relaxing feature tolerances. The methods and structures include electrical wirings having regions of larger wire cross-sectional areas in locations where the package ... 03/01/07 - 20070045815 - Wiring board construction including embedded ceramic capacitors(s) A wiring board includes a substrate core, ceramic capacitors and a built-up layer. The substrate core has a housing opening portion therein which opens at a core main surface. The ceramic capacitors are accommodated in the housing opening portion and oriented such that the core main surface and a capacitor ... 03/01/07 - 20070045814 - Wiring board and ceramic chip to be embedded A wiring board includes a substrate core and a ceramic chip to be embedded therein. The substrate core has a housing opening portion opening at a core main surface. The ceramic chip is accommodated in the housing opening portion so that the core main surface and a chip first main ... 02/01/07 - 20070023889 - Copper substrate with feedthroughs and interconnection circuits A method for fabricating a copper-based circuit module is described. The module is built on a copper sheet and has isolated feedthroughs fabricated using a glass frit. High density interconnection circuits are built on the copper sheet, including wells for accepting bumped devices such as integrated circuit chips. The modules ... 02/01/07 - 20070023888 - Semiconductor device and manufacturing method thereof A semiconductor chip 11 comprising an element formation layer 36 which is formed on a first main surface 35A of a semiconductor substrate 35 and has a semiconductor element, through electrodes 15, 16 which are electrically connected to the semiconductor element and extend through the semiconductor chip 11, and a ... 01/18/07 - 20070013048 - Electronic parts packaging structure and method of manufacturing the same An electronic parts packaging structure of the present invention includes a wiring substrate having a wiring pattern, a first insulating film which is formed on the wiring substrate and which has an opening portion in a packaging area where an electronic parts is mounted, the electronic parts having a connection ... 01/04/07 - 20070001284 - Semiconductor package having lead free conductive bumps and method of manufacturing the same A semiconductor package may include a printed circuit board having a conductive bump pad. At least one semiconductor chip may be electrically connected to the printed circuit board. A lead free conductive bump may be mounted on the conductive bump pad. The lead free conductive bump may include no more ... 11/30/06 - 20060267178 - Electrical component and production thereof A modularly constructed electrical component having a module substrate, preferably, of Si, and having one or more preferably un-housed chips placed on the module substrate while being electrically connected thereto and each joined to the module substrate, e.g., by direct wafer bonding. A recess is provided in the module substrate ... 11/23/06 - 20060261463 - Low cost power semiconductor module without substrate A power module for low voltage applications, which does not include an insulated metal substrate is disclosed. The module includes a power shell and a plurality of lead frames each lead frame including a conductive pad on which one or more MOSFETs may be electrically mounted. The MOSFETs are electrically ... 11/23/06 - 20060261462 - Semiconductior package substrate with embedded resistors and method for fabricating same A semiconductor package substrate with embedded resistors and a method for fabricating the same are proposed. Firstly, an inner circuit board having a first circuit layer thereon is provided, and a plurality of resistor electrodes are formed in the fist circuit layer. Then, a patterned resistive material is formed on ... 11/16/06 - 20060255449 - Lid used in package structure and the package structure having the same The present invention relates to a lid and a package structure having the same. The package structure comprises a first substrate, a first chip, a lid and a second package. The first chip is disposed on and electrically connected to the top surface of the first substrate. The lid is ... 11/09/06 - 20060249833 - Wiring board, multilayer wiring board, and method for manufacturing the same A method for manufacturing a wiring board comprising an insulating member, comprising: a penetrating hole formation process of forming a penetrating hole in the insulating member; a placement process of inserting a conductive connecting particle into the penetrating hole; a connecting particle pressing process of disposing the conductive layers on ... 10/12/06 - 20060226535 - Reinforced bond pad for a semiconductor device Disclosed herein are novel support structures for pad reinforcement in conjunction with new bond pad designs for semiconductor devices. The new bond pad designs avoid the problems associated with probe testing by providing a probe region that is separate from a wire bond region. Separating the probe region 212 from ... 10/12/06 - 20060226534 - Structure and assembly method of integrated circuit package A packaging structure and an assembly method are disclosed. A packaging structure includes a substrate, a die, conductive wires, and conductively filled material. The substrate includes a conductive structure, and the conductive wires are insulator-coated. The die is mounted on the substrate, and the conductive wires are connected between the ... 10/12/06 - 20060226533 - Via connection structure with a compensative area on the reference plane The invention discloses a via connection structure with compensative area on a reference plane. The substrate has several conductive layers isolated by the insulation layers. When two conductive lines formed on different conductive layers where a reference plane is sandwiched in, these two conductive lines are not electrical connected because ... 10/05/06 - 20060220219 - Substrate for ic package A packaging substrate is formed of an array of packaging units. Each packaging unit has a chip pad carrying a chip, a plurality of pins arranged around the chip pad and spaced from one another and the chip pad by an open space, an insulative member formed of a plurality ... 09/14/06 - 20060202322 - Interposer, and multilayer printed wiring board An interposer capable of preventing breaking of a wiring pattern with an IC chip loaded on a package substrate. Stress due to a difference in thermal expansion coefficient between a multilayer printed wiring board having a large thermal expansion and the IC chip having a small thermal expansion can be ... 08/17/06 - 20060180919 - Fine pitch low cost flip chip substrate A package, comprising a substrate having a surface comprising metal traces, a solder mask covering at least a portion of the surface of the substrate, and a first aperture through the solder mask exposing a plurality of metal traces. ... 07/13/06 - 20060151869 - Printed circuit boards and the like with improved signal integrity for differential signal pairs A printed circuit board with improved signal integrity for one or more differential signal pairs incorporates one or more conductive regions. In an exemplary embodiment, via structures for the differential pair that interconnect signal traces are isolated from the conductive region by an antipad area around the via structures and ... 07/06/06 - 20060145330 - Multilayer board and a semiconductor device Preparing a bottom grounding layer eliminates grounding pins, thereby the number of signal pins can be increased in a multilayer board that includes a grounding layer, a signal layer, a power supply layer, a grounding via, a signal via, a power supply via and the like in the insulation material ... 06/22/06 - 20060131728 - Repairable three-dimensional semiconductor subsystem A tightly packed three-dimensional electronic system or subsystem comprising multiple stacks of semiconductor elements is described. The system is repairable because the elements connect together using re-workable flip chip connectors; each flip chip connector comprises a conductive spring element on one side and a corresponding well filled with solder on ... 06/15/06 - 20060125082 - Semiconductor device and manufacturing method thereof A semiconductor device includes a base plate made of a material including at least a thermosetting resin, and having an opening, a vertical conductor filled and provided in the opening of the base plate, at least one semiconductor construct having a semiconductor substrate and a plurality of external connection electrodes ... 06/08/06 - 20060118941 - Semiconductor package and fabrication method thereof A semiconductor package and a fabrication method thereof are proposed. A lead frame is provided between a chip and a substrate in a window ball grid array semiconductor package, wherein an active surface of the chip is electrically connected to the lead frame via bonding wires formed in an opening ... 06/01/06 - 20060113658 - Substrate core and method for fabricating the same A substrate including a first patterned metallic layer, a second patterned metallic layer and an insulator is provided. One side of the first patterned metallic layer is connected to a corresponding side of the second patterned metallic layer. The first patterned metallic layer and the second patterned metallic layer are ... 05/25/06 - 20060108680 - Multi-layer printed circuit board wiring layout and method for manufacturing the same A multi-layer printed circuit board (PCB) includes a first wire layer, a middle layer above the first wire layer, a second wire layer above the middle layer, and a slanting via formed in the middle layer and the second wire layer. The manufacturing method includes the steps of providing a ... 05/11/06 - 20060097378 - Substrate having a penetrating via and wiring connected to the penetrating via and a method for manufacturing the same A disclosed substrate includes a base member having a through-hole, and a conductive metal filling in the through-hole so as to form a penetrating via. The penetrating via contains a conductive core member that is substantially at the central axis of the through-hole. ... 05/04/06 - 20060091523 - Semiconductor device and a method for manufacturing of the same A first solder resist section and a second solder resist section are formed over an upper surface of a wiring board. A semiconductor chip is bonded onto the first solder resist section via an adhesive interposed therebetween. Electrodes of the semiconductor chip are respectively electrically connected to connecting terminals exposed ... 04/13/06 - 20060076669 - Deflectable probe and thermometer A deflectable probe for use in a thermometer. The deflectable probe is constituted by a bendable probe body and a hollow tip member secured thereto. Furthermore, a deflectable member includes a main portion disposed in the bendable probe body. When the bendable probe body is subjected to a force, deformation ... 04/06/06 - 20060071323 - Method for processing a thin film substrate The present invention comprises a processed thin film substrate (10) and a method therefore, in order to produce a flexible printed circuit card, having a plurality of microvias going or passing through the thin film substrate and electrically connected along faced-away surfaces, in order to form an electric circuit. A ... 03/30/06 - 20060065968 - Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such an integrated type semiconductor device comprises a first semiconductor device (10) having a semiconductor chip (12) with electrodes (16), a ... 03/30/06 - 20060065967 - Apparatus for singulating and bonding semiconductor chips, and method for the same An apparatus for singulating and bonding semiconductor chips includes a singulating station and a mounting station. In the singulating station, a semiconductor chip is provided with a bonding wire by a bonding tool and lifted off a carrier film. Then, in the mounting station, the semiconductor chip is placed on ... 03/02/06 - 20060043570 - Substrate, semiconductor device, substrate fabricating method, and semiconductor device fabricating method A semiconductor element having a first external connection terminal is connected to a substrate. The substrate includes a base material and a wiring portion, positioned at the first surface side of the base material. This configuration facilitates the realization of the connection between the first external connection terminal and the ... 03/02/06 - 20060043569 - Low temperature methods of forming back side redistribution layers in association with through wafer interconnects, semiconductor devices including same, and assemblies Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be formed prior to forming the RDLs, after forming the RDLs, or substantially ... 03/02/06 - 20060043568 - Semiconductor device having multilayer printed wiring board and manufacturing method of the same A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed to an opening part ... 02/23/06 - 20060038279 - System-on-a-chip with multi-layered metallized through-hole interconnection The present invention is directed to a high-performance system on a chip which uses multi-layer wiring/insulation through-hole interconnections to provide short wiring and controlled low-impedance wiring including ground planes and power supply distribution planes between chips. ... 02/23/06 - 20060038278 - Submember mounted on a chip of electrical device for electrical connection A submember for electrical device is disclosed. Said submember is mounted on a chip of electrical device. An embodiment for the submember comprised of an insulator and a plurality of conductive elements, wherein the conductive elements embedded in the insulator and a portion of conductive element exposed to the insulator ... 02/16/06 - 20060033198 - Semiconductor device with sidewall wiring Cost is reduced and reliability is improved with a BGA (Ball Grid Array) type semiconductor device which has ball-shaped conductive terminals. A first wiring is formed on an insulation film which is formed on a surface of a semiconductor die. A glass substrate is bonded over the surface of the ... 02/09/06 - 20060027911 - Methods for creating electrophoretically insulated vias in semiconductive substrates and resulting structures Methods for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place ... 02/02/06 - 20060022328 - Interposer with flexible solder pad elements and methods of manufacturing the same Various embodiments of an interposer for mounting a semiconductor die, as well as methods for forming the interposer, are disclosed. The interposer includes flexible solder pad elements that are formed from a core material of the interposer, such that the interposer may absorb thermally induced stresses and conform to warped ... 01/12/06 - 20060006520 - Semiconductor component and system having back side and circuit side contacts A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In addition, the pin contacts are formed ... 12/29/05 - 20050285253 - Forming buried via hole substrates A preformed copper plug may be inserted into a via hole in a package substrate. The opposed surfaces of the copper preform may be covered with a solder material. Copper foils may then be applied over the core and over the preformed plug. A vacuum hot press method may be ... 12/08/05 - 20050269685 - Buried array capacitor and microelectronic structure incorporating the same A unitary buried array capacitor and microelectronic structures incorporating such capacitors are disclosed. A unitary buried array capacitor can be formed by a top layer of electrode, a middle layer of dielectric, and a bottom layer of electrode. A first electrode lead, a second electrode lead and at least one ... 12/01/05 - 20050263873 - Interposer substrate, semiconductor package and semiconductor device, and their producing methods A semiconductor package comprises a semiconductor chip, an interposer substrate, a plurality of unfilled end face through holes arrayed at the periphery of the semiconductor package, a plurality of inner through holes, a plurality of end face through hole electrodes each formed inside the end face through holes so as ... 11/24/05 - 20050258532 - Semiconductor device A wiring board includes a plurality of wiring layers, and one surface formed with a plurality of chip connecting electrodes and another surface formed with a plurality of external connecting electrodes of a semiconductor device. The wiring board has wiring layers and vias. The plurality of chip connecting electrodes include ... 11/17/05 - 20050253246 - Stacked land grid array package A spring plate may be provided between a bolster plate and a board in order to mount components on the opposite side of the board. In some embodiments, the spring plate may provide additional stack tolerance and forceful bias to hold the stack tightly together. ... 11/17/05 - 20050253245 - Package design and method for electrically connecting die to package A method and apparatus for electrically connecting a die to a package while reducing the length of wirebonds. This in turn reduces wire-sweep and the cost of manufacture. To reduce the length of the wirebonds, bonding holes are created through an insulating layer of the package to expose a conductive ... 10/20/05 - 20050230814 - Semiconductor packaging substrate and method of producing the same A semiconductor packaging substrate and a process for producing the same is disclosed. An internal circuit is formed by lamination. Then, external circuit is formed on the internal circuit by build-up technology. The substrate can be used as a flip-chip ball grid array packaging substrate with high density and small ... 10/20/05 - 20050230813 - Printed circuit board including via contributing to superior characteristic impedance A via is formed in a printed circuit board to penetrate through an insulating layer. A guard pattern, made of an electrically-conductive material, extends on the front surface of the insulating layer along a circle concentric with the via. An electrically-conductive body extends from the guard pattern in the insulating ... 10/20/05 - 20050230812 - Electronic component comprising a multilayer substrate and corresponding method of production The invention provides a highly-integrated electronic component that consists of at least one chip component (CB), especially a filter operating with acoustic waves, and a multi-layer substrate, wherein the multi-layer substrate comprises integrated circuit elements for impedance transformation (IW) and additional integrated circuit elements, and serves as carrier substrate for ... 09/08/05 - 20050194676 - Resin-encapsulated semiconductor device and lead frame, and method for manufacturing the same There are provided a lead frame including a plurality of first external terminal portions 5 provided on a plane, inner lead portions 6 formed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external ... 08/25/05 - 20050184382 - System and methods for hermetic sealing of post media-filled mems package This invention provides a system and method for hermetically sealing a post media-filled package with a metal cap. The method can include the operation of filling a MEMS package through a fill port with at least one medium. A further operation can be plugging the fill port in the MEMS ... 08/04/05 - 20050167817 - Microelectronic adaptors, assemblies and methods The present invention is directed to a circuit panel assembly. The assembly includes a circuit panel having a top surface and a first microelectronic element mounted on the circuit panel. The first microelectronic element includes a bottom surface overlying the top surface of the circuit panel and defining a gap ... 07/28/05 - 20050161803 - Semiconductor device and method of fabricating the same A semiconductor device includes a base member made of a material containing at least a thermosetting resin, and at least one semiconductor constructing body mounted on the base member, and having a semiconductor substrate and a plurality of external connecting electrodes formed on the semiconductor substrate. An insulating layer is ... 07/14/05 - 20050151239 - Integrated circuit devices, edge seals therefor An edge seal for a chip with integrated circuits. A first metal line extends along a periphery of the chip, with a first inter-metal dielectric layer on the first metal line. A second metal line overlies the first inter-metal dielectric layer and extends along the periphery of the chip. A ... 07/07/05 - 20050146019 - Wiring board, and electronic device with an electronic part mounted on a wiring board, as well as method of mounting an electronic part on a wiring board An electronic device is mounted on a wiring board, which includes: a substrate having through holes, and lands extending on surfaces of the substrate and adjacent to openings of the through holes. Further, at least one coating layer is provided, which coats at least one part of an outer peripheral ... 07/07/05 - 20050146018 - Package circuit board and package including a package circuit board and method thereof A package circuit board having a reduced package size. The package circuit board may include a semiconductor substrate in place of a printed circuit board. The package circuit board may further include a microelectronic chip mounted on the semiconductor substrate, the microelectronic chip having at least one of active and ... 07/07/05 - 20050146017 - Power supply connection structure to a semiconductor device A package substrate has a power supply path different from a signal supply path to a semiconductor element. A semiconductor element is mounted on a first surface of the package substrate. A second surface opposite to the first surface is provided with external connection terminals. A power supply layer is ... 07/07/05 - 20050146016 - Electronic package with improved current carrying capability and method of forming the same An electronic package and method for forming such package that expands the current capability of lines and/or reducing line resistance for packages with a given feature dimension while relaxing feature tolerances. The methods and structures include electrical wirings having regions of larger wire cross-sectional areas in locations where the package ... 06/30/05 - 20050139986 - Methods of making microelectronic assemblies including compliant interfaces An assembly includes a structure, a plurality of terminals and a plurality of compliant pads disposed between said terminals and said structure. The terminals are aligned with at least some of said pads, with the pads providing a standoff between the structure and the terminals. The compliant pads are preferably ... 06/30/05 - 20050139985 - Semiconductor chip package and multichip package The present invention provides a multichip package wherein a plurality of semiconductor chip packages (100) in each of which first electrode pads (16a) provided in a main surface of a semiconductor chip, and first bonding pads (20a) and first central bonding pads (18a) formed in an upper area of the ... 06/09/05 - 20050121770 - Wafer-level electronic modules with integral connector contacts and methods of fabricating the same An electronic module comprises a monolithic microelectronic substrate including at least one integrated circuit die, e.g., a plurality of unseparated memory dice or a mixture of different types of integrated circuit dice. The monolithic substrate further includes a redistribution structure disposed on the at least one integrated circuit die and ... 06/09/05 - 20050121769 - Stacked integrated circuit packages and methods of making the packages In some embodiments, a method includes providing a substrate, providing a coverlay blank, laminating the coverlay blank to the substrate, and forming at least one opening in the coverlay blank by photolithography. ... 06/09/05 - 20050121768 - Silicon chip carrier with conductive through-vias and method for fabricating same A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than or closely matches ... 06/02/05 - 20050116333 - Semiconductor device and semiconductor device manufacturing method Disclosed is a semiconductor device that includes: a semiconductor substrate; a first insulating film formed above the semiconductor substrate and having a relative dielectric constant of 3.8 or less; a conductor which covers a side face of the first insulating film at least near four corners of the semiconductor substrate, ... ### FreshPatents.com Support - Terms & Conditions |