Housing Or Package

Housing Or Package patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

12/20/07 - 20070290309 - System and method for hermetically sealing a package
A method for hermetically sealing a package includes applying a light or energy active resist to a fill port to act as a temporary hermetic seal, patterning the resist, and applying a solder to the fill port, wherein the solder is configured to serve as a hermetic seal. ...

12/06/07 - 20070278637 - Circuit arrangement, system carrier and methods for producing same
A circuit arrangement includes a component or an integrated circuit firmly attached on a wiring carrier via an adhesive layer. Furthermore, a pyrolytically deposited adhesion promoter layer with high surface energy and/or high porosity in the nanometer range is selectively provided on a metallic adherend location of the wiring carrier. ...

12/06/07 - 20070278636 - Matching circuits on optoelectronic devices
The present invention alters the frequency response of an optoelectronic device to match a driver circuit that drives the optoelectronic device. The optoelectronic device is formed on a first substrate. A matching circuit is also formed on the first substrate and coupled to the optoelectronic device to change its frequency ...

11/15/07 - 20070262433 - Semiconductor component with surface mountable devices and method for producing the same
A semiconductor component including: a substrate, at least one semiconductor chip arranged on the substrate and at least one passive device likewise arranged on the substrate. The passive device is mounted with its underside on the substrate. The semiconductor component further includes an interspace disposed between the underside of the ...

11/15/07 - 20070262429 - Perimeter stacking system and method
A stacked module employs flexible circuitry to connect CSP integrated circuits. A flexible circuit with obverse and reverse sides is disposed between two CSPs oriented face-to-face with the flex circuit between to form a precursor assembly. One or more flaps or extension parts of the flex circuitry extend from the ...

11/15/07 - 20070262428 - Indented structure for encapsulated devices and method of manufacture
A method for providing improved gettering in a vacuum encapsulated device is described The method includes forming a plurality of small indentation features in a device cavity formed in a lid wafer. The gettering material is then deposited over the indentation features. The indentation features increase the surface area of ...

11/01/07 - 20070252256 - Package-on-package structures
A POP (package-on-package) structure includes a first and a second semiconductor chip and a connecting structure. The first semiconductor chip is disposed on a first substrate that includes a plurality of first internal terminals and a plurality of first external terminals. The second semiconductor chip is disposed on a second ...

11/01/07 - 20070252254 - Molded sip package with reinforced solder columns
An integrated circuit, and a semiconductor die package formed therefrom, are disclosed including solder columns for adding structural support to the package during the fabrication process. ...

11/01/07 - 20070252253 - Cooling mechanism for stacked die package, and method of manufacturing stacked die package containing same
A stacked die package includes a substrate (210, 310), a first die (220, 320) above the substrate, a spacer (230, 330) above the first die, a second die (240, 340) above the spacer, and a mold compound (250, 370) disposed around at least a portion of the first die, the ...

11/01/07 - 20070252252 - Structure of electronic package and printed circuit board thereof
A PCB for mounting IC package is designed with dummy solder pads. Dummy solder pastes will spread on the dummy solder pads after screen printing process of solder paste. A substrate for a package of IC is designed with or without dummy solder pads. After mounting the package of IC ...

10/25/07 - 20070246812 - High reliability power module
A high reliability power module which includes a plurality of hermetically sealed packages each having electrical terminals formed from an alloy of tungsten copper and brazed onto a surface of a ceramic substrate. ...

10/25/07 - 20070246810 - Leadframe enhancement and method of producing a multi-row semiconductor package
A semiconductor package includes a plurality of first leads, each with a top outer portion removed from the lead and an outer end, and a plurality of second leads, each with a bottom outer portion removed from the lead and an outer end. The first and second leads alternate with ...

10/18/07 - 20070241436 - Adhesive bonding sheet, semiconductor device using the same, and method for manufacturing such semiconductor device
An adhesive bonding sheet having an optically transmitting supporting substrate and an adhesive bonding layer, and being used in both a dicing step and a semiconductor element adhesion step, wherein the adhesive bonding layer comprises: a polymer component (A) having a weight average molecular weight of 100,000 or more including ...

10/18/07 - 20070241434 - Adhesive sheet, semiconductor device, and process for producing semiconductor device
An object of the present invention is to provide an adhesive sheet that can fill irregularities due to wiring of a substrate or a wire attached to a semiconductor chip, etc., does not form resin burrs during dicing, and has satisfactory heat resistance and moisture resistance. The present invention relates ...

10/11/07 - 20070235852 - Method and system for sealing packages for optics
A system for wafer-level packaging of a plurality of MEMS devices includes a substrate having a plurality of individual chips. Each of the plurality of individual chips includes a plurality of MEMS devices and each of the plurality of individual chips is arranged in a spatial manner as a first ...

10/11/07 - 20070235851 - Point-to-point connection topology for stacked devices
The point-to-point interconnection system for stacked devices includes a device, a substrate, operational circuitry, at least three electrical contacts and a conductor. The substrate has opposing first and second surfaces. A first electrical contact is mechanically coupled to the first surface of the device and electrically coupled to the operational ...

10/11/07 - 20070235850 - Packaged system of semiconductor chips having a semiconductor interposer
A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components ...

10/11/07 - 20070235849 - Semiconductor package and method using isolated vss plane to accommodate high speed circuitry ground isolation
Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate which can have an integrated circuit die attached thereto. The package includes a dedicated high-speed ground plane that is electrically isolated from the ground plane used to ground the low speed circuitry of the package. ...

10/11/07 - 20070235848 - Substrate having conductive traces isolated by laser to allow electrical inspection
A semiconductor die substrate panel, and method of forming same, are disclosed wherein plating bars are severed for example by a laser after electroplating of the substrate. Severing the plating bars allows electrical testing of the substrate prior to attachment of electronic components. ...

10/11/07 - 20070235847 - Method of making a substrate having thermally conductive structures and resulting devices
Embodiments of a method of fabricating a substrate including thermally conductive structures, as well as devices made from such a substrate, are disclosed. Each thermally conductive structure includes a via and a number of carbon nanotubes formed within the via. An active circuit element disposed on the substrate may at ...

10/04/07 - 20070228539 - Method for detaching a semiconductor chip from a foil and device for mounting semiconductor chips
The detachment of a semiconductor chip (1) from a foil (4) and picking the semiconductor chip (1) from the foil (4) takes place with the support of a chip ejector (6), that has a ramp (16), the surface (17) of which is formed concave and ends at a stripping edge ...

10/04/07 - 20070228538 - Integrated circuit die with pedestal
An integrated circuit die is provided having a body portion having a singulation side and a pedestal portion extending from the body portion and having a singulation side coplanar with the singulation side of the body portion. ...

10/04/07 - 20070228537 - Semiconductor device
By disposing a rear surface of a first island 12 and a top surface of a second island 13 so as to at least partially overlap each other, a first semiconductor chip on the first island and a second semiconductor chip on a rear surface of the second island are ...

10/04/07 - 20070228533 - Folding chip planar stack package
A folding chip planar stack package is realized by employing folding chips. The folding chip planar stack package includes a substrate, first and second semiconductor chips attached to an upper surface of the substrate while being folded and spaced in parallel to each other, a bonding wire for electrically connecting ...

10/04/07 - 20070228531 - Apparatus and system for an ic substrate, socket, and assembly
An apparatus and system including a substrate having a plurality of through-holes therethrough, and an integrated circuit (IC) socket frame to mount to the substrate. The IC socket frame may include a plurality of beam features, each extending from a socket frame body and corresponding in arrangement to the plurality ...

09/27/07 - 20070222048 - Package structure
A package structure is provided herein. The package structure includes a first substrate and a second substrate. A first seal ring having a first height is disposed around a predetermined area of the first substrate and between the first and second substrates. A second seal ring having a second height ...

09/27/07 - 20070222046 - Electronic circuit device
An electronic circuit device includes a sub-board disposed upright on a main board. The sub-board is electrically coupled to the main board via a board terminal) disposed at sub-board edge. A semiconductor element is mounted on the sub-board facing the sub-board in parallel. A temperature sensor is also mounted on ...

09/27/07 - 20070222044 - Electronic component and methods to produce an electronic component
An electronic component includes at least one vertical MOSFET device, a leadframe and a contact clip. A source electrode and gate electrode are provided on a lower surface of the MOSFET device and are mounted on a source portion and a gate portion, respectively, of the leadframe. The contact clip ...

09/20/07 - 20070215998 - Led package structure and method for manufacturing the same
A LED package structure is disclosed. The LED package structure includes a substrate, a light emitting diode, a plasma chemical vapor deposition layer and a transparent material layer, wherein the substrate has a plurality of contacts. The light emitting diode is disposed on the substrate and electrically contacted to the ...

09/20/07 - 20070215997 - Chip-scale package
A power semiconductor package that includes a die having one electrode thereof electrically and mechanically attached to a web portion of a conductive clip. ...

09/20/07 - 20070215996 - Electronic component and method for its assembly
An electronic component has at least one semiconductor power switch with at least one anode and at least one control electrode positioned on a first surface and at least one cathode positioned on a second surface and a heat sink with a die attach region with an upper surface. The ...

09/13/07 - 20070210430 - Semiconductor device and method of manufacturing the same
A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded ...

09/13/07 - 20070210428 - Die stack system and method
Embodiments of the present invention provide a die stack including a first substrate, a first die bonded to the first substrate, a second substrate having a cavity sized and shaped to fit over the first die, and a second die bonded to at least a portion of a rim of ...

09/13/07 - 20070210427 - Warp compensated package and method
Methods and apparatus are provided for an electronic panel assembly (EPA) (82, 83), comprising: providing one or more electronic devices (30) with primary faces (31) having electrical contacts (36), opposed rear faces (33) and edges (32) therebetween. The devices (30) are mounted primary faces (31) down on a temporary support ...

09/13/07 - 20070210426 - Gold-bumped interposer for vertically integrated semiconductor system
A semiconductor system (100) enabled by an interposer (101) with non-reflow metal studs (251), preferably gold, coated with reflow metals (252), preferably solder. The studs are on exit ports (220, 230, etc) of the interposer surface; selected exit ports may be spaced apart by less than 125 μm center to ...

09/13/07 - 20070210425 - Integrated circuit package system
An integrated circuit package system is provided providing a first structure, forming a compression via in the first structure, forming a stud bump on a second structure and pressing the stud bump into the compression via forming a mechanical bond. ...

09/13/07 - 20070210424 - Integrated circuit package in package system
An integrated circuit package in package system including forming a base integrated circuit package with a base lead having a portion with a substantially planar base surface, forming an extended-lead integrated circuit package with an extended lead having a portion with a substantially planar lead-end surface, and stacking the extended-lead ...

09/06/07 - 20070205494 - Chip-size package structure and method of the same
The method includes a step of picking and placing standard good dice on a base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The method of the chip-size package comprises the steps of separating dice on a wafer and picking ...

08/23/07 - 20070194420 - Semiconductor package having an optical device and a method of making the same
A semiconductor package having an optical device and a method of making the same, the package including a chip, an upper metal redistribution layer, a transparent insulating layer, and a lower metal redistribution layer. The chip has an active surface, a back surface, at least one through hole, an optical ...

08/23/07 - 20070194418 - Semiconductor device
A semiconductor device (10) includes: a substrate (1), including an electrode pad (1a); an IC chip (4), mounted on the substrate (1); and an externally connecting terminal (7), formed on the electrode pad (1a) and electrically connected with the IC chip (4), the externally connecting terminal (7) including a resin ...

08/23/07 - 20070194416 - Apparatus and methods for high-density chip connectivity
Self-alignment structures, such as micro-balls and V-grooves, may be formed on chips made by different processes. The self-alignment structures may be aligned to mask layers within an accuracy of one-half the smallest feature size inside a chip. For example, the alignment structures can align an array of pads having a ...

08/23/07 - 20070194415 - Semiconductor device assemblies including face-to-face semiconductor dice, systems including such assemblies, and methods for fabricating such assemblies
Semiconductor device assemblies include at least first and second semiconductor dice disposed in a face-to-face configuration. At least some of a plurality of conductive structures are electrically and structurally coupled to a bond pad of the first semiconductor die and a bond pad of the second semiconductor die. A first ...

08/23/07 - 20070194414 - Method for providing and removing discharging interconnect for chip-on-glass output leads and structures thereof
Microelectronic devices may be fabricated while being protected from damage by electrostatic discharge. In one embodiment, a shorting circuit is connected to elements of the microelectronic device, where the microelectronic device is part of a chip-on-glass system. In one aspect of this embodiment, a portion of the shorting circuit is ...

08/16/07 - 20070187809 - Rfic die and package
A radio frequency integrated circuit (RFIC) includes a die and a package. The die includes a radio frequency (RF) input/output (I/O) section, an RF to baseband conversion section, and a baseband processing section. The package includes a ball grid array and an antenna. The antenna is located on one edge ...

08/16/07 - 20070187808 - Customizable power and ground pins
A configurable logic array composed of: a multiplicity of logic cells, each containing look-up tables, a multiplicity of customizable I/O cells, each containing a multiplicity of pads; and a customizable via connection layer for customizing the cells and interconnect between them, may be constructed to include the option of customizing ...

08/09/07 - 20070181987 - Highly reliable, cost effective and thermally enhanced ausn die-attach technology
In a circuit, an integrated circuit package and methods for attaching integrated circuit dies or discrete power components to flanges of integrated circuit packages, each of the integrated circuit dies is sawed from a wafer. The thickness of the wafer is reduced by mechanical grinding, applying an isotropic wet chemical ...

07/26/07 - 20070170566 - Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
A semiconductor device includes: a semiconductor substrate in which an integrated circuit is formed; an interconnect layer which includes a linear section and a land section connected with the linear section; and an underlayer disposed under the interconnect layer, and the land section includes a first section which is in ...

07/26/07 - 20070170564 - Chip card module
A smart card module including a substrate having an upper face and a lower face, contact arrays arranged on the substrate lower face, conductor structures, which have vias arranged in cutouts in the substrate, arranged on the substrate upper face and connected to the contact arrays, a chip having connecting ...

07/26/07 - 20070170561 - Leaded package integrated circuit stacking
The present invention provides an improvement on the use of flexible circuit connectors for electrically coupling IC devices to one another in a stacked configuration by use of the flexible circuit to provide the connection of the stacked IC module to other circuits. Use of the flexible circuit as the ...

07/19/07 - 20070164412 - Method of wire bonding over active area of a semiconductor circuit
A method and structure are provided to enable wire bond connections over active and/or passive devices and/or low-k dielectrics, formed on an Integrated Circuit die. A semiconductor substrate having active and/or passive devices is provided, with interconnect metallization formed over the active and/or passive devices. A passivation layer formed over ...

07/19/07 - 20070164410 - Wafer level packaging cap and fabrication method thereof
A fabrication method of a wafer level packaging cap for covering a device wafer provided with a device thereon, includes forming an insulating layer on a wafer; removing a predetermined part of the insulating layer and exposing an upper surface of the wafer; forming a cap pad extending from an ...

07/19/07 - 20070164409 - Semiconductor package with integrated heatsink and electromagnetic shield
The invention provides a mounting for a printed circuit board which mounting is suitable for receiving a semiconductor assembly wherein the mounting comprises: a base support having a semiconductor assembly facing surface, and an opposed printed surface board facing surface; a cover having a semiconductor assembly facing surface, an opposed ...

07/12/07 - 20070158801 - Methods for packaging and encapsulating semiconductor device assemblies that include tape substrates
Packaging and encapsulation methods include use of a tape substrate with a mold gate that includes an aperture and a support element that extends over at least a portion of the aperture. The tape substrate may be part of a strip. A semiconductor device is secured and electrically connected to ...

07/12/07 - 20070158800 - Managed memory component
The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded ...

07/12/07 - 20070158799 - Interconnected ic packages with vertical smt pads
An electronic component is disclosed including a plurality of semiconductor packages soldered together in a side-by-side configuration. The packages are batch processed on a substrate panel. The panel includes a plurality of through-holes drilled through the panel and subsequently filled with metal such as copper or gold. These filled through-holes ...

07/12/07 - 20070158798 - Wafer with optical control modules in ic fields
In a wafer (1) with a number of exposure fields (2), each of which exposure fields comprises a number of lattice fields (3) with an IC (4) located therein, two groups (5, 7) of saw paths (6, 8) are provided and two control module fields (A1, A2, B1, B2, C1, ...

07/05/07 - 20070152311 - Chip-packaging compositions including bis-maleimides, packages made therewith, and methods of assembling same
A chip-packaging composition includes a polymer of a bis-maleimide. A process includes formation of the chip-packaging composition including adding particulate fillers to achieve a coefficient of thermal expansion of about 20 ppm/K. A method includes assembly of the chip-packaging composition with a die or a mounting substrate. A computing system ...

07/05/07 - 20070152310 - Electrical ground method for ball stack package
A microelectronic package including a dielectric element with at least one conductive ground pad. The package may also include a microelectronic element with at least one ground contact exposed at a rear surface of the element. The ground pad and the ground contact are electrically connected to each other by ...

06/28/07 - 20070145559 - Semiconductor device
In a prior art, there has been a method in which a power supply line of an output buffer and that of a control circuit are independently provided so that the power supply noise occurring in the control circuit will not affect the output buffer. However, this method has had ...

06/28/07 - 20070145558 - Super high density module with integrated wafer level packages
A wafer level package, and a semiconductor wafer, electronic system, and a memory module that include one or more of the wafer level packages, and methods of fabricating the die packages on a wafer level, and integrated circuit modules that include one or more packages are provided. In one embodiment, ...

06/28/07 - 20070145557 - Method for fabricating a semiconductor device and semiconductor device
The present invention discloses a method for fabricating a semiconductor device, comprising: providing a translucent portion; forming a covering layer comprised of one or more metals on the translucent portion by vapor deposition; providing kinetic energy to the covering layer for forming a periodic mask; forming a periodic structure on ...

06/28/07 - 20070145556 - Techniques for packaging multiple device components
Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dices coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. ...

06/28/07 - 20070145555 - Semiconductor structure with a plastic housing and separable carrier plate
A semiconductor structure includes: a carrier plate; a thermosensitive adhesive coupled to a top surface of the carrier plate, which is removable from the carrier plate at a predetermined, defined temperature at which the thermosensitive adhesive loses its adhesive action; semiconductor chips having active top surfaces and back surfaces, where ...

06/28/07 - 20070145554 - Semiconductor device and its manufacture method capable of preventing short circuit of electrodes when semiconductor device is mounted on sub-mount substrate
A confronting surface of a substrate faces a first surface of a semiconductor element. Extension layers are formed on the substrate at positions facing electrodes on the semiconductor element. A levee film is disposed on one of the confronting surface and the first surface. Openings are formed through the levee ...

06/28/07 - 20070145553 - Flip-chip mounting substrate and flip-chip mounting method
A solder resist and a central pad to which a central Au bump provided on a semiconductor chip is flip-chip bonded are formed on a substrate main body. In a flip-chip mounting substrate where an underfill resin is provided after the semiconductor chip is mounted, a central opening portion for ...

06/28/07 - 20070145552 - Semiconductor component including semiconductor chip and method for producing the same
A semiconductor component includes at least one semiconductor chip arranged on a mounting substrate and connected thereto via bonding wires. For effective dissipation of heat, a solderable interlayer is arranged on the active upper side of the semiconductor chip and a heat sink is soldered onto the solderable interlayer. A ...

06/28/07 - 20070145550 - Microelectronic elements with compliant terminal mountings and methods for making the same
A dielectric structure is formed by a molding process, so that a first surface of a dielectric structure is shaped by contact with the mold. The opposite second surface of the dielectric structure is applied onto the front surface of a wafer element. The dielectric layer may include protruding bumps ...

06/28/07 - 20070145549 - Hermetically sealed integrated circuits and method
A semiconductor device includes an integrated circuit die, wherein a layer of photoresist is permanently disposed on and permanently hermetically seals an active circuit area of a top surface of the inductor die. In one embodiment, the semiconductor device includes a lead frame including a conductive pad and a plurality ...

06/28/07 - 20070145548 - Stack-type semiconductor package and manufacturing method thereof
A stack-type semiconductor package includes a first semiconductor package upon which a second semiconductor package is stacked. A layer of a hardened, insulative material, e.g., a no-flow underfill (NUF) material, is disposed between, and mechanically couples the stacked first and second semiconductor packages. The NUF layer covers portions of the ...

06/21/07 - 20070138613 - Electro-optical device and electronic apparatus
An electro-optical device includes a substrate, a plurality of external connection terminals provided on the substrate, an electronic component mounted on the substrate and having a plurality of terminals, and a plurality of wires that electrically connect the plurality of external connection terminals to the plurality of terminals of the ...

06/21/07 - 20070138612 - Stackable electronic device assembly and high g-force test fixture
A stackable chip assembly is disclosed, as are different embodiments relating to same. The chip assembly preferably includes at least two substrates with components mounted on each. The substrates are preferably situated with respect to one another such that components on one substrate extend towards the other substrate and vice ...

06/21/07 - 20070138611 - Device package
A package includes a device and a package substrate. The device includes a plurality of electrical pads, and has a periphery that defines a footprint. The package substrate, further includes a first substrate surface to which the device is attached, a second substrate surface, and a set of electrical contacts ...

06/14/07 - 20070132078 - Underfill film having thermally conductive sheet
An underfill film for an electronic device includes a thermally conductive sheet. The electronic device may include a printed circuit board, an electrical component, an underfill, and the thermally conductive sheet. The underfill is situated between the circuit board and the component. The thermally conductive sheet is situated within the ...

06/07/07 - 20070126098 - Surface-mountable light-emitting diode structural element
A surface-mountable light emitting diode structural element in which an optoelectronic chip is attached to a chip carrier part of a lead frame, is described. The lead frame has a connection part disposed at a distance from the chip carrier part, and which is electrically conductively connected with an electrical ...

06/07/07 - 20070126097 - Chip package structure
A chip package structure including a first chip, a circuit substrate, and a two-stage thermosetting adhesive layer is provided. The first chip has a first upper surface, a first side surface, and a first bottom surface. The circuit substrate has an upper surface and a bottom surface. The first chip ...

05/31/07 - 20070120238 - Semiconductor/printed circuit board assembly, and computer system
A method of forming a computer system and a printed circuit board assembly, are provided comprising first and second semiconductor dies and an intermediate substrate. The intermediate substrate is positioned between the first active surface of the first semiconductor die and the second active surface of the second semiconductor die ...

05/24/07 - 20070114646 - Die package having an adhesive flow restriction area
A die package having an adhesive flow restriction area. In a first embodiment, the adhesive flow restriction area is formed as a trench in a transparent element. A second embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches that extend from one ...

05/24/07 - 20070114645 - Integrated circuit package system configured for singulation
An integrated circuit package system includes forming lead structures including a dummy tie bar having an intersection with an outer edge of the integrated circuit package system, and connecting an integrated circuit die to the lead structures. ...

05/24/07 - 20070114644 - Scaling of functional assignments in packages
A family of package substrates adapted to receive a family of integrated circuits having different sizes and provide electrical connections between the integrated circuits and a circuit board. Each package substrate in the family includes a package substrate having a die side and a circuit board side. The package substrate ...

05/24/07 - 20070114643 - Mems flip-chip packaging
Packaging of MEMS and other devices, and in some cases, devices that have vertically extending structures. Robust packaging solutions for such devices are provided, which may result in superior vacuum performance and/or increased protection in some environments such as high-G environments, while also providing high volume throughput and low cost ...

05/17/07 - 20070108575 - Semiconductor package that includes stacked semiconductor die
A semiconductor package that includes at least two semiconductor devices that are coupled to one another through a conductive clip. ...

05/17/07 - 20070108574 - Chip stack package and manufacturing method thereof
A chip stack package may include a package substrate, a plurality of semiconductor chips mounted on the package substrate, bonding wires electrically connecting the semiconductor chips to the package substrate, and spacers interposed between the adjacent semiconductor chips. Each of the spacers may include a plurality of metal bumps. The ...

05/17/07 - 20070108573 - Wafer level package having redistribution interconnection layer and method of forming the same
A wafer level package may include a semiconductor substrate supporting an electrode pad. A first insulating layer may be provided on the semiconductor substrate. The first insulating layer may include a first opening through which the electrode pad may be exposed. A seed metal layer may be provided on an ...

05/17/07 - 20070108572 - Structure for reducing stress for vias and fabricating method thereof
A structure for reducing stress for vias and a fabricating method thereof are provided. One or more wires or vias in the thickness direction are enframed with the use of a stress block in a lattice structure to be isolated from being directly contacted with the major portion of insulating ...

05/10/07 - 20070102797 - Electrode package for semiconductor device
A plurality of isolated metal layers having the same shapes as electrodes are arranged in a matrix, and molded in a resin plate. The metal layers are exposed from both upper and lower surfaces of the resin plate. A cross-sectional area of each metal layer is increased with depth from ...

05/10/07 - 20070102796 - Power semiconductor module
A power semiconductor module is presented. The power semiconductor module has a substrate, a composite film, and a power semiconductor component between the substrate and the composite film. The composite film has a thin circuit-structured logic metal layer and a thick circuit-structured power metal layer and between them a thin ...

05/03/07 - 20070096278 - Semiconductor unit, and power conversion system and on-vehicle electrical system using the same
A semiconductor device includes a semiconductor chip and leads electrically connected to the electrodes of the semiconductor chip. A hollow radiator base houses the semiconductor device which is molded with high-thermal-conductivity resin having an electrical insulating property. The radiator base has a cooling-medium channel therein or radiating fins on the ...

05/03/07 - 20070096277 - Packaging for high speed integrated circuits
An integrated circuit package comprises an integrated circuit die comprising at least four pads that at least one of transmit and receive differential signals. A lead frame comprising at least four leads. At least four bondwires connecting the leads to the pads. A set of polarities of adjacent signals carried ...

05/03/07 - 20070096276 - Structure and manufacturing method of power semiconductor with twin metal and ceramic plates
A designing for a power semiconductor, and especially to a structure of a power semiconductor formed by using the basic materials including two metal plates and a ceramic plate, in the power semiconductor, mainly surfaces of the ceramic base plate provided with a receiving groove is metallized, and the metallic ...

04/26/07 - 20070090503 - Semiconductor package having an optical device and the method of making the same
The present invention relates to a semiconductor package having an optical device and the method of making the same. The semiconductor package comprises: a transparent substrate, a chip, an optical device and a carrier substrate. The transparent substrate has a plurality of first contacts and second contacts, wherein the first ...

04/19/07 - 20070085182 - Semiconductor device and fabrication method thereof
A semiconductor device includes a semiconductor chip having a plurality of electrode pads, and a rewiring pattern having a plurality of interconnects which are connected to the electrode pads and extend over an insulation film. The semiconductor device also includes a plurality of columnar electrodes each of which has a ...

04/19/07 - 20070085181 - Power semiconductor module with overcurrent protective device
A power semiconductor module having at least one fuse. The power semiconductor module comprises a housing, load terminal elements that lead outside of the housing, and a substrate disposed inside the housing with a plurality of metal connecting tracks of different polarity electrically insulated from one another. On at least ...

04/19/07 - 20070085180 - Image sensor mounted by mass reflow
A package for semiconductor image pickup device is provided. The package is fabricated by using flip chip bumping. During deposition process of forming a metallic bonding layer and a metal layer for plating, a surface of a semiconductor image pickup device is maintained at the range between room temperature and ...

04/12/07 - 20070080439 - Wiring board, semiconductor device in which wiring board is used, and method for manufacturing the same
A wiring board comprising a first surface on which a first electrode is disposed and a second surface on which a second electrode is disposed; at least a single insulation layer and at least a single wiring layer; and one or a plurality of mounted semiconductor elements, wherein the second ...

04/05/07 - 20070075410 - Semiconductor device for radio frequency applications and method for making the same
A semiconductor device (5) for radio frequency applications has a semiconductor chip (1) with an integrated circuit accommodated in a radio frequency package. Inside bumps (2) comprise inside contacts between the semiconductor chip (1) and a redistribution substrate (3). The inside bumps (2) have a metallic or plastic core (6) ...

04/05/07 - 20070075409 - Method of forming a molded array package device having an exposed tab and structure
In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connecting the electronic chips to specific leads, and ...

04/05/07 - 20070075408 - Semiconductor device and radiation detector employing it
A wiring substrate to which a semiconductor element 10 is connected, is a wiring substrate 20 comprised of a glass substrate with through-hole groups 20d, each group consisting of a plurality of through holes 20c extending from input surface 20a to output surface 20b and formed in a predetermined array, ...

03/29/07 - 20070069355 - Package with barrier wall and method for manufacturing the same
A ball grid array (BGA) package that may suppress flash contamination may include a flash contamination barrier wall. The barrier wall may be a portion of a copper pattern provided on a substrate. During a molding process, the flash contamination barrier may prevent a flash from contaminating a ball land. ...

03/29/07 - 20070069354 - Semiconductor sensor device with sensor chip and method for producing the same
A semiconductor sensor device includes a sensor chip. The sensor chip includes a sensor region and contact areas on its upper side and is further arranged in a cavity housing. The cavity housing includes side walls, a housing bottom, a cavity, external contacts on the outside of the cavity and ...

03/29/07 - 20070069353 - Semiconductor device with plastic housing composition and method for producing the same
A semiconductor device with plastic housing composition includes an internal wiring that is electrically insulated from the plastic housing composition by an insulation layer. The plastic housing composition has a high thermal conductivity and a low coefficient of expansion, the coefficient of expansion being adapted to the semiconductor chip of ...

03/29/07 - 20070069352 - Bumpless chip package and fabricating process thereof
A bumpless chip package comprising a supporting component, a chip, a metal-filled layer and an interconnection structure is provided. The supporting component has a supporting surface and a cavity. The chip is disposed within the cavity and has a plurality of chip pads formed on an active surface of the ...

03/29/07 - 20070069351 - Substrate carrier
The invention relates to a carrier for a substrate, wherein at least parts of the carrier are comprised of a material with a coefficient of thermal expansion which is higher than the coefficient of thermal expansion of the substrate. In order to avoid, or at least decrease, the nonuniform coating ...

03/22/07 - 20070063328 - Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided. The flip-chip pads define an area ...

03/22/07 - 20070063327 - Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided. The flip-chip pads define an area ...

03/22/07 - 20070063326 - Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided. The flip-chip pads define an area ...

03/22/07 - 20070063325 - Chip package structure and bumping process
A chip package structure including a first substrate, a second substrate, bumps and adhesive blocks is provided. The first substrate has first bonding pads. The second substrate is disposed above the first substrate and has second bonding pads. The bumps are respectively arranged on the first bonding pads or the ...

03/22/07 - 20070063324 - Structure and method for reducing warp of substrate
A warp reducing member is bonded to an area on one surface of the substrate corresponding to other side of an electronic part for which the warp is to be reduced with respect to a substrate. An external size of the warp reducing member is substantially same as a size ...

03/22/07 - 20070063323 - Led positioning structure
An improved LED positioning structure includes a retaining holder and a cover; multiple slots being disposed on one side of the retaining holder; a slope externally extending beneath each slot gradually and externally extending a slope; a hole connecting through each slot being formed on the bottom of the slope; ...

03/22/07 - 20070063322 - Integrated circuit protruding pad package system
An integrated circuit package system is provided. A protruding pad is formed on a leadframe. A die is attached to the leadframe. The die is electrically connected to the leadframe. At least portions of the leadframe, the protruding pad, and the die are encapsulated in an encapsulant. ...

03/15/07 - 20070057355 - Method for forming buried cavities within a semiconductor body, and semiconductor body thus made
A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the ...

03/08/07 - 20070052077 - Low height vertical sensor packaging
A system and method for packaging a magnetic sensor is described. A sensor die is constructed such that connection pads are situated on two opposing sides of the die in two vertical arrays. Bonding wires connect the connection pads on the sensor die to wire bond pads on a substrate. ...

03/01/07 - 20070045800 - Opto-coupler with high reverse breakdown voltage and high isolation potential
An opto-coupler and a process for fabricating an opto-coupler are disclosed. The opto-coupler includes at least one light-emitting diode and a photodiode for galvanically isolating electric circuits. The optical components are mounted in a yielding material, such as silicone rubber, in a housing. The interior walls are coated with a ...

03/01/07 - 20070045799 - Wafer processing method and adhesive tape used in the wafer processing method
A method of processing a wafer having a plurality of streets formed on the front surface in a lattice pattern and a plurality of devices formed in a plurality of areas sectioned by the plurality of streets, comprising an adhesive tape amounting step for mounting the front surface of the ...

03/01/07 - 20070045798 - Semiconductor package featuring metal lid member
where: “h” is a depth of the recess of the lid member; and “d” is a sum of a thickness of the semiconductor chip and a thickness of the second adhesive layer. ...

// - 25 μm≦h−d≦300 μm -
...

03/01/07 - 20070045797 - Microelectronic devices and microelectronic support devices, and associated assemblies and methods
Microelectronic devices, associated assemblies, and associated methods are disclosed herein. For example, certain aspects of the invention are directed toward a microelectronic device that includes a microfeature workpiece having a side and an aperture in the side. The device can further include a workpiece contact having a surface. At least ...

03/01/07 - 20070045796 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices
Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side ...

03/01/07 - 20070045795 - Mems package and method of forming the same
A MEMS package (100, 300) and method of fabrication include a package (100, 300) that is formed by bonding a first component (102, 302), which includes a MEMS device (106, 306) and a substrate (104, 304) upon which the MEMS device (106, 306) was formed as a part thereof, to ...

03/01/07 - 20070045794 - Buried photodiode for image sensor with shallow trench isolation technology
A buried photodiode with shallow trench isolation technology is formed in a semiconductor substrate of a first conductive type. A trench having a bottom portion and a sidewall portion is formed in the semiconductor substrate. An isolation region is formed on the bottom portion of the trench. A gate structure ...

03/01/07 - 20070045793 - Semiconductor device and method for fabricating the same
A semiconductor device includes a silicon substrate having first and second surfaces, in which a wiring pattern is formed on the first surface; a first resin layer formed over the first surface of the silicon substrate; and a second resin layer formed over the second surface of the silicon substrate. ...

02/22/07 - 20070040255 - Semiconductor device
A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor ...

02/22/07 - 20070040254 - Semiconductor die package
A clip-less packaged semiconductor device includes at least one semiconductor die having bottom and top surfaces each having at least one electrode. A leadframe comprising a sheet of conductive material having top and bottom surfaces, the top surface being substantially planar, the bottom surface having a recessed region having a ...

02/22/07 - 20070040253 - Chip type led
A chip type LED which is capable of laterally emitting light from the light emitting diode chip and having a relatively small thickness is provided. The chip type LED includes an insulating substrate 12, a light emitting diode chip 15 mounted on the upper surface of the insulating substrate, and ...

02/15/07 - 20070034998 - Method for fabricating wafer level semiconductor package with build-up layer
A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass ...

02/08/07 - 20070029654 - Electronic parts packaging structure and method of manufacturing the same
In an electronic parts packaging structure of the present invention, an electronic parts is mounted or formed on a silicon circuit substrate having a structure in which wiring layers on both sides thereof are connected to each other through a through electrode, and a protruded bonding portion which is ring-shaped ...

02/08/07 - 20070029653 - Application of autonomic self healing composites to integrated circuit packaging
A method, apparatus and system with an autonomic, self-healing polymer capable of slowing crack propagation within the polymer and slowing delamination at a material interface. ...

02/01/07 - 20070023883 - Semiconductor stack block comprising semiconductor chips and methods for producing the same
A semiconductor stack block contains either stacked semiconductor chip size semiconductor devices or semiconductor devices with semiconductor chips in a plastic housing composition, the semiconductor chips and the plastic housing composition having a coplanar area. Arranged on the active top side of the semiconductor chips and the plastic housing composition ...

02/01/07 - 20070023882 - Balance filter packaging chip having balun mounted therein and manufacturing method thereof
A balance filter packaging chip having a balun mounted therein and a manufacturing method thereof are provided. The balance filter packaging chip includes a device substrate; a balance filter mounted on the device substrate; a bonding layer stacked on a certain area of the device substrate; a packaging substrate having ...

02/01/07 - 20070023881 - Semiconductor wafer with a wiring structure, a semiconductor component, and methods for their production
A semiconductor wafer is provided with a wiring structure, and semiconductor chip positions arranged in rows and columns. The semiconductor wafer has at least one coating (6) as a self-supporting dimensionally stable substrate layer (4), and/or as a wiring structure composed of conductive, high-temperature-resistant material. The coating material (6) of ...

02/01/07 - 20070023880 - Packaged integrated circuit with enhanced thermal dissipation
A semiconductor package (10) uses a plurality of thermal conductors (56-64) that extend upward within an encapsulant (16) from one or more thermal bond pads (22, 24, 26) on a die (14) to disperse heat. The thermal conductors may be bond wires or conductive stud bumps and do not extend ...

02/01/07 - 20070023879 - Single unit heat sink, voltage regulator, and package solution for an integrated circuit
A method, apparatus, and system with a subassembly for simple integration of high power integrated electronics, the subassembly including an integrated circuit package, an integrated circuit package cooling device and a printed circuit board with coupled power delivery components. ...

01/25/07 - 20070018296 - Stacked semiconductor package having adhesive/spacer structure and insulation
Stacked semiconductor assemblies in which a device such as a die, or a package, or a heat spreader is stacked over a first wire-bonded die. An adhesive/spacer structure is situated between the first wire-bonded die and the device stacked over it, and the device has an electrically non-conductive surface facing ...

01/25/07 - 20070018295 - Apparatus for stacking semiconductor chips, method for manufacturing semiconductor package using the same and semiconductor package manufactured thereby
The present invention relates to an apparatus for stacking semiconductor chips, a method for manufacturing a semiconductor package using the same and a semiconductor package manufactured thereby. The apparatus for stacking semiconductor chips may comprise two tables for supporting wafers, a picker for picking up semiconductor chips and a picker ...

01/25/07 - 20070018294 - Packaging for high speed integrated circuits
An integrated circuit package comprises an integrated circuit die comprising N pads, where N is an integer greater than one. A lead frame comprising N adjacent leads. N connections individually connect the N leads to the N pads, respectively. A first material comprises an insulating layer and a conductive layer. ...

01/25/07 - 20070018293 - Packaging for high speed integrated circuits
An integrated circuit package comprises an integrated circuit die comprising N adjacent pads, where N is an integer greater than three. A lead frame comprises first, second, third and fourth leads that include first ends that are spaced from the integrated circuit die and second ends that are adjacent to ...

01/25/07 - 20070018292 - Packaging for high speed integrated circuits
An integrated circuit package comprises an integrated circuit die comprising a first pad, a second pad adjacent to the first pad, a third pad adjacent to the second pad, and a fourth pad adjacent to the third pad. A lead frame comprises a first lead, a second lead adjacent to ...

01/11/07 - 20070007635 - Self aligned metal gates on high-k dielectrics
A method for forming a transistor including a self aligned metal gate is provided. According to various method embodiments, a high-k gate dielectric is formed on a substrate and a sacrificial carbon gate is formed on the gate dielectric. Sacrificial carbon sidewall spacers are formed adjacent to the sacrificial carbon ...

12/28/06 - 20060289978 - Memory element conducting structure
Disclosed is a memory element conducting structure, which includes a substrate with contacts, hollow sockets provided at the top side of the substrate corresponding to the contacts of the substrate, conducting media respectively mounted in the hollow sockets and supported on the contacts, and a plurality of positioning means respectively ...

12/28/06 - 20060289977 - Lead-free semiconductor package
A package substrate includes die solder pads and pin solder fillets. The pin solder fillets might comprise between approximately 90 wt % to approximately 99 wt % tin and approximately 10 wt % to 1 wt % antimony. The die solder pads might comprise between approximately 4 wt % to ...

12/28/06 - 20060289976 - Pre-patterned thin film capacitor and method for embedding same in a package substrate
An embedded passive structure, its method of formation, and its intergration onto a substrate during fabrication are disclosed, In one embodiment the embedded passive structure is a thin film capacitor (TFC) formed using a thin film laminate that has been mounted onto a substrate. The TFC's capacitor dielectric and/or lower ...

12/21/06 - 20060284296 - Semiconductor device
A semiconductor device with a packaging circuit portion connected to a semiconductor chip therein. The semiconductor chip includes a plurality of pad electrodes, and the packaging circuit portion includes wiring connected to the pad electrodes on the semiconductor chip, mounting terminals, and a first signal path for receiving a signal ...

12/21/06 - 20060284295 - Method and system for hermetically sealing packages for optics
A system for hermetically sealing devices. The system includes a substrate, which includes a plurality of individual chips. Each of the chips includes a plurality of devices and each of the chips are arranged in a spatial manner as a first array. The system also includes a transparent member of ...

12/21/06 - 20060284294 - Optical device package
An optical device package includes a substrate having an upper surface, a distal end, a proximal end, and distal and proximal longitudinally extending notches co-linearly aligned with each other. A structure is mounted to the substrate and has at least one recessed portion. The structure can be a lid or ...

12/21/06 - 20060284293 - Semiconductor integrated circuit and device and method for testing the circuit
An accelerated test for transistors included in inverter circuits of a semiconductor integrated circuit is to be improved in efficiency. Output terminals 30A, 30B of inverter circuits 11, 12, each including a CMOS circuit, may be short-circuited. A test circuit 20 supplies signals of mutually exclusive logical values to the ...

12/21/06 - 20060284292 - Package structure of chip and the package method thereof
For a package structure of chip and the formation thereof, adhesive, conductive and metal layers are positioned on a substrate. The portions of the conductive and metal layers are removed to form multitudes of trenches therethrough, so that the metal layer is divided into chip supporters and conductive nodes isolated ...

12/14/06 - 20060278965 - Hermetically sealed package and methods of making the same
Hermetically sealed packages having organic electronic devices are presented. A number of sealing mechanisms are provided to hermetically seal the package to protect the organic electronic device from environmental elements. A metal alloy sealant layer is employed proximate to the organic electronic device. Alternatively, a metal alloy sealant layer in ...

12/14/06 - 20060278964 - Plastic integrated circuit package, leadframe and method for use in making the package
A semiconductor package comprises a plurality of metal contacts, each contact having a first surface, a second surface opposite the first surface, and a locking mechanism to lock the contacts with an encapsulant material of the package. A plurality of extended metallic interconnections are provided, each having a first surface ...

12/07/06 - 20060273435 - Chip package
A chip package includes a bump connecting said semiconductor chip and said circuitry component, wherein the semiconductor chip has a photosensitive area used to sense light. The chip package may include a ring-shaped protrusion connecting a transparent substrate and the semiconductor chip. ...

11/30/06 - 20060267171 - Semiconductor device modules, semiconductor devices, and microelectronic devices
Supports (40) of microelectronic devices (10) are provided with underfill apertures (60) which facilitate filling underfill gaps (70) with underfill material (74). The underfill aperture may have a longer first dimension (62) and a shorter second dimension (64). In some embodiments, a method of filling the underfill gap (70) employs ...

11/30/06 - 20060267170 - Integrated circuit package with air gap
An integrated circuit (IC) package comprises an IC wafer comprising a circuit. A “C”-shaped layer is arranged adjacent to the substrate and that creates an air gap between the “C”-shaped layer and the circuit of the IC wafer. ...

11/30/06 - 20060267169 - Image sensitive electronic device packages
The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the ...

11/30/06 - 20060267168 - Hollow package and semiconductor device using the same
A solid state imaging device is composed of an image sensor chip and a hollow package that contains the image sensor chip. The hollow package has a recessed first chip chamber on a top surface of its package body. Formed on a bottom surface of the first chip chamber is ...

11/30/06 - 20060267167 - Microelectronic device with integrated energy source
An apparatus including an electronic device having a plurality of substantially collocated components, the plurality of components including an antenna, an energy supply and an integrated circuit chip. The integrated circuit chip is electrically coupled to the antenna and the energy supply. A material substantially encloses the electronic device. ...

11/30/06 - 20060267166 - Semiconductor device
To prevent a semiconductor device which can be made to be small even though a big-sized chip is used and in which a MOSFET having a low on-resistance can be formed, a semiconductor device according to the invention includes a resin package; at least two main leads that are integrated ...

11/23/06 - 20060261455 - Led package structure and method making of the same
An LED package structure and a method for making the same are described. The LED package structure has at least one LED die, at least one metallic frame relating to the LED die, and an insulative body packaging the LED die and the metallic frame. The metallic frame has a ...

11/23/06 - 20060261454 - System-in-a-package based flash memory card
A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to ...

11/09/06 - 20060249825 - Package substrate, integrated circuit apparatus, substrate unit, surface acoustic wave apparatus, and circuit device
On a piezoelectric substrate 23, there are provided surface acoustic wave devices F1 and F2 in which predetermined circuit patterns are formed, and a package substrate 11 comprising side vias 16 formed in a caved manner in the thickness direction on side surfaces on which the surface acoustic wave devices ...

11/09/06 - 20060249824 - Stack type surface acoustic wave package, and method for manufacturing the same
Disclosed herein is a stack type surface acoustic wave package. The surface acoustic wave package comprises a first bare chip having a plurality of electrodes formed thereon, a second bare chip having a plurality of electrodes and via-holes formed thereon, a connecting portion electrically connecting the first bare chip to ...

11/02/06 - 20060244117 - Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides
Semiconductor package assemblies include a package subassembly, having at least one die affixed to, and electrically interconnected with, a die attach side of a first package substrate, and a second substrate having a first side and a second (“land”) side, mounted over the first package with the first side of ...

11/02/06 - 20060244116 - Semiconductor device
One of the aspects of the present invention is to provide a semiconductor device, which includes a case, and an insulating substrate provided within the case. It also includes a plurality of semiconductor chips mounted on the insulating substrate, each of which has a first chip electrode for receiving a ...

11/02/06 - 20060244115 - Chip package structure and method for manufacturing the same
A chip package structure and a method for manufacturing the same are disclosed. The chip package structure comprises a carrier and a chip deposed on the carrier. The carrier comprises a heat-sinking pad, a plurality of pins, and at least two supporting bars, in which the heat-sinking pad has a ...

11/02/06 - 20060244114 - Systems, methods, and apparatus for connecting a set of contacts on an integrated circuit to a flex circuit via a contact beam
Systems, methods, and apparatus for connecting a set of contacts on an integrated circuit to a flex circuit via a contact beam are provided. An exemplary chip-scale packaged (CSP) device comprising an integrated circuit having at least one major surface, the at least one major surface having a set of ...

10/26/06 - 20060237832 - Standoffs for centralizing internals in packaging process
A semiconductor device, semiconductor die package, mold tooling, and methods of fabricating the device and packages are provided. In one embodiment, the semiconductor device comprises a pair of semiconductor dies mounted on opposing sides of a flexible tape substrate, the outer surfaces of the dies having one or more standoffs ...

10/26/06 - 20060237831 - Semiconductor device and electronic device
This invention provides a high frequency power module which is incorporated into a mobile phone and which incorporates high frequency portion analogue signal processing ICs including low noise amplifiers which amplify an extremely weak signal therein. A semiconductor device includes a sealing body which is made of insulation resin, a ...

10/26/06 - 20060237830 - Semiconductor device and electronic device
This invention provides a high frequency power module which is incorporated into a mobile phone and which incorporates high frequency portion analogue signal processing ICs including low noise amplifiers which amplify an extremely weak signal therein. A semiconductor device includes a sealing body which is made of insulation resin, a ...

10/26/06 - 20060237829 - Method and system for a semiconductor package with an air vent
Systems and methods for a structure for semiconductor packages where the effects that features on the package substrate have on the impedance of signal traces within the semiconductor package is substantially reduced. These systems and methods may allow a feature, or multiple features, to be placed anywhere on the semiconductor ...

10/26/06 - 20060237828 - System and method for enhancing wafer chip scale packages
System and method for enhancing the performance of wafer chip scale packages (WCSP). A preferred embodiment comprises a parent electrical device 305 and a daughter electrical device 310 coupled to a bottom surface of the parent electrical device, wherein the bottom surface is also used to attach the parent electrical ...

10/19/06 - 20060231936 - Semiconductor device having resin-sealed area on circuit board thereof
A semiconductor device having a molded sealing resin for sealing a semiconductor chip on a circuit board thereof reduces resin burrs resulting from the leakage of the sealing resin, and also restrains the occurrence of disconnection caused by a wiring layer being crushed. In the semiconductor device, the sealing resin ...

10/19/06 - 20060231935 - Bga type semiconductor package featuring additional flat electrode teminals, and method for manufacturing the same
In a semiconductor package including a wiring board having a top surface, a bottom surface and a side face. The bottom surface is divided into a central area, and a peripheral area surrounding the central area. A semiconductor chip is mounted on the top surface of the wiring board so ...

10/05/06 - 20060220200 - Substrate for ic package
A packaging substrate is formed of an array of packaging units. Each packaging unit includes a chip pad on which a chip is carried, a plurality of pins arranged around the chip pad and spaced from one another and the chip pad by an open space, an insulative member filling ...

10/05/06 - 20060220199 - Low cost hermetically sealed package
Disclosed herein is a device package that comprises a device having a top substrate that is disposed on a supporting surface of a package substrate. A package frame contacts the top surface of the top substrate and top surface of the package substrate, and hermetically seals the device between the ...

10/05/06 - 20060220198 - Semiconductor integrated circuit (ic) packaging with carbon nanotubes (cnt) to reduce ic/package stress
A packaged integrated circuit (IC) is described having an integrated circuit that is electrically coupled to its package's wiring with Carbon nanotubes (CNTs) placed within an electrically conductive material. ...

10/05/06 - 20060220197 - Method of forming self-passivating interconnects and resulting devices
A method of forming self-passivating interconnects. At least one of two mating bond structures is formed, at least in part, from an alloy of a first metal and a second metal (or other element). The second metal is capable of migrating through the first metal to free surfaces of the ...

09/28/06 - 20060214276 - Systems and methods for testing packaged dies
A main die and a stacked die are included in the same component package. A transmission gate (370) is implemented on the main die, and can be enabled to receive leakage current in a connection (318) between the main die and the stacked die, and to conduct the leakage current ...

09/28/06 - 20060214275 - Semiconductor device
A semiconductor device that exhibits an enhanced inhibition to a generation of voids in an underfill resin for encapsulation supplied between a semiconductor chip and an electronic component, which are mutually coupled through bump electrodes. The semiconductor device includes a first semiconductor chip and a second semiconductor chip, wherein bumps-formed ...

09/28/06 - 20060214274 - Semiconductor device and manufacturing method thereof
In a semiconductor device manufacturing method which includes a mounting a semiconductor element having a bonding electrode on a substrate, the mounting includes supplying solder paste containing Au—Sn series solder particles onto the substrate, putting the semiconductor element having a film of an Sn alloy or Sn formed on the ...

09/28/06 - 20060214273 - Led package structure and method making of the same
An LED package structure and a method for making the same are described. The LED package structure has at least one LED die, at least one metallic frame relating to the LED die, and an insulative body packaging the LED die and the metallic frame. The metallic frame has a ...

09/21/06 - 20060208347 - Semiconductor device package
A semiconductor device package includes a semiconductor device mounted and electrically coupled to the upper surface of a substrate, a package body encapsulating the semiconductor device against a portion of the upper surface of the substrate; and a metal ring formed on the upper surface of the substrate and connected ...

09/14/06 - 20060202315 - Microelectronic devices having conductive complementary structures and methods of manufacturing microelectronic devices have conductive complementary structures
Microelectronic devices, microfeature workpieces, and methods of forming and stacking the microelectronic devices and the microfeature workpieces. In one embodiment, a microfeature workpiece includes a plurality of first microelectronic dies. The individual first dies have an integrated circuit, a plurality of pads electrically coupled to the integrated circuit, and a ...

09/14/06 - 20060202314 - Semiconductor package and method for manufacturing the same
A semiconductor package comprises a chip, a plurality of pad extension traces, a plurality of via holes, a lid and a plurality of metal traces, wherein the chip has an active surface, a back surface opposite to the active surface, an optical component disposed on the active surface, and a ...

09/07/06 - 20060197203 - Die structure of package and method of manufacturing the same
A die structure of a package is provided. The die structure of the package includes a carrier and a die. The die includes a first portion and a second portion. The top surface of the first portion is an active surface. The second portion is configured below the first portion. ...

09/07/06 - 20060197202 - Photo detector package
A photo detector package is provided. The photo detector package includes a carrier, a photo sensor and a calibration module. The photo sensor having an active surface is disposed on the carrier. The calibration module is disposed on the carrier. The calibration module is electrically connected to the photo sensor. ...

09/07/06 - 20060197201 - Image sensor structure
An image sensor structure includes a substrate, a photosensitive chip, a plurality wires, a plurality of ball elements, a transparent layer, and a glue layer. The substrate has an upper surface and a lower surface. The photosensitive chip has a plurality of bonding pads, and is mounted on the upper ...

08/24/06 - 20060186521 - Semiconductor packages and methods for making and using same
A semiconductor package is provided which includes a substrate having a plurality of semiconductor dice mounted thereon. The substrate is divided into segments by grooves formed in the bottom surface of the substrate. Each semiconductor die is electrically connected to the substrate by electrical connections which extend from bond pads ...

08/24/06 - 20060186520 - Semiconductor device and manufacturing method thereof
A semiconductor device includes a solder dam for restricting the flow of solder during manufacturing. The device includes a semiconductor chip bonded to a first side of a circuit board, a metal base for dissipating heat produced by the semiconductor chip, the metal base being bonded to a second side ...

08/24/06 - 20060186519 - Semiconductor device and unit equipped with the same
A semiconductor device comprises columnar electrodes including columnar portions and ball-shaped low-melting point layers joined to the top surfaces of columnar portions. The amount of plating of the low-melting point layer and the cross-sectional area of the columnar portion are adjusted in such a way that the relationship represented by ...

08/24/06 - 20060186518 - Module card structure
A module card structure includes a structure, a first chip, a second chip, an adhered layer, and a compound layer. The substrate has an upper surface on which a plurality of golden finger are formed, and a lower surface. The first chip is mounted on the upper surface of the ...

08/17/06 - 20060180908 - Resin composition, heat-resistant resin paste and semiconductor device using these and method of preparing the same
There are disclosed a resin composition comprising (A) a heat-resistant resin soluble in a solvent at room temperature, (B) a heat-resistant resin which is insoluble in a solvent at room temperature but becomes soluble by heating, and (C) a solvent; a heat-resistant resin paste further containing (D) particles or liquid ...

08/17/06 - 20060180907 - Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectonic devices
Packaged microelectronic devices, interconnecting units for packaged microelectronic devices, and methods and apparatuses for packaging microelectronic devices with pressure release elements. In one aspect of the invention, a packaged microelectronic device includes a microelectronic die, an interconnecting unit coupled to the die, and a protective casing over the die. The ...

08/17/06 - 20060180906 - Chip package and producing method thereof
A chip package and a producing method thereof are provided. The producing method of the chip package includes following steps. First, a bottom surface of a chip is disposed on a carrier, and a top surface of the chip is wire-bonded to the carrier. Then, a first molding compound is ...

08/17/06 - 20060180905 - Ic package with signal land pads
In one embodiment, an integrated circuit package comprises a substrate including a first surface having a plurality of signal land pads and a second surface having a plurality of signal die pads; a plurality of signal connectors arranged to electrically couple the plurality of the signal land pads to the ...

08/03/06 - 20060170087 - Semiconductor device
A semiconductor device according to the present invention includes a substrate having interconnections thereon, a first semiconductor chip mounted on the substrate such that the device formation surface thereof is faced to the substrate and a second semiconductor chip mounted on the first semiconductor chip, wherein an interconnection layer is ...

08/03/06 - 20060170086 - Semiconductor package and method of manufacturing the same
Disclosed herein are a semiconductor package used in digital optical instruments and a method of manufacturing the same. The semiconductor package comprises a wafer made of a silicon material and having pad electrodes formed at one side surface thereof, an IR filter attached on the pad electrodes of the wafer ...

07/27/06 - 20060163710 - Semiconductor device and manufacturing method thereof
A technique for manufacturing a low-cost, small volume, and highly integrated semiconductor device is provided. A characteristic of the present invention is that a semiconductor element formed by using a semiconductor thin film is transferred over a semiconductor element formed by using a semiconductor substrate by a transfer technique in ...

07/27/06 - 20060163709 - Chip-scale monolithic load switch for portable applications
A chip-scale package houses a monolithic semiconductor die containing first and second lateral metal oxide semiconductor field effect transistors (MOSFETs) formed on a surface of the semiconductor die. The MOSFETs are formed using a lateral double diffused metal oxide semiconductor structure. The first MOSFET has a first conduction terminal coupled ...

07/27/06 - 20060163708 - Semiconductor device
A semiconductor device comprises: an envelope having a thermal conductivity; a semiconductor dies placed inside the envelope; and a sealing cap disposed so as to cover the envelope and having a thermal conductivity. The envelope is provided with a lead connection portion including a lead wire and a dies receiving ...

07/27/06 - 20060163707 - Method and apparatus for reducing stresses applied to bonded interconnects between substrates
A method (200) is provided for reducing stresses applied to one or more bonded interconnects (106) of a substrate (103) and a PCB (Printed Circuit Board) (104). The method comprises the steps of coupling (204) a compound (108) on a top surface of the substrate, wherein the compound has the ...

07/27/06 - 20060163706 - Bilayer aluminum last metal for interconnects and wirebond pads
A method for connecting a microelectronic device to a wirebond comprises providing a substrate having a microelectronic circuit therein and forming a wiring layer over the substrate. The wiring layer includes a bilayer wiring structure comprising upper and lower electrically conductive layers separated by a protective electrically conductive layer. The ...

07/20/06 - 20060157838 - Multimedia card and transfer molding method
A semiconductor card is made using a method which, in one molding step, forms a plastic body on a substrate attached to a surrounding frame by narrow connecting segments spanning a peripheral opening. The connecting segments are motivated downward by pins outside of the card periphery, holding the substrate against ...

07/20/06 - 20060157837 - Solid state image pickup device and its manufacture method
PROBLEM To provide a high quality solid state image pickup device. SOLUTION Impurities are implanted into a semiconductor substrate to form vertical transfer channels for transferring electric charges in a first direction and to form a drain near each of the vertical transfer channels via a gate which forms a ...

07/20/06 - 20060157836 - Thin film transistor array panel and manufacturing method thereof
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a thin film transistor including a gate electrode, a drain electrode, a source electrode and a semiconductor on a substrate; forming a first passivation layer on the drain and the source electrodes; forming a transparent ...

07/20/06 - 20060157835 - Semiconductor device and method of fabricating same
A semiconductor device has a bottomless package and a semiconductor chip. The semiconductor chip is disposed in a chip installation-side opening in a chip storage space of the package. The semiconductor device also has a sealing lid that lies opposite the upper face of the semiconductor chip and covers the ...

07/20/06 - 20060157834 - Plastic molding die
A plastic molding die provided with a cavity where a plastic material is put in, wherein a part of an inner surface of the cavity is configured with an elastic body. A molding portion corresponding to a molding surface of a molded product is disposed on the inner surface of ...

07/20/06 - 20060157833 - Semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device
A semiconductor device includes a semiconductor substrate, and a circuit pattern group comprising at least N (≧2) circuit pattern on the semiconductor substrate, at least one vicinity of end portion among the at least of N circuit patterns including a connection area to electrically connect to a circuit pattern in ...

07/20/06 - 20060157832 - Printed circuit board including embedded chips and method of fabricating the same
A printed circuit board having embedded chips, composed of a central layer having an embedded chip, an insulating layer formed on one surface or both surfaces of the central layer and having a via hole filled with conductive ink, and a circuit layer formed on the insulating layer and having ...

07/13/06 - 20060151864 - Mems packaging with improved reaction to temperature changes
A large-scale MEMS device includes a MEMS die supported by at least one compliant die mount. The compliant die mount couples the MEMS die to a support structure. The support structure is positioned within a package. In accordance with an aspect of the invention, the package is substantially symmetrical about ...

07/13/06 - 20060151863 - Capacitor material for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate
A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns ...

07/06/06 - 20060145322 - Circuit device and portable device
To provide a circuit device freed from constrains of a mounting direction. The circuit device according to the present invention includes: a conductive pattern for forming a die pad, a first bonding pad, and a second bonding pad; and a semiconductor element (TR) attached to the conductive pattern. The circuit ...

07/06/06 - 20060145321 - Microcomponent holder and method for manufacture thereof
Provided is a microcomponent holder for retaining a micro-scale component. The microcomponent holder includes at least one aperture for receiving a micro-scale component therein. At least one loop-shaped support member is disposed about the aperture for contacting the micro-scale component to retain the micro-scale component within the microcomponent holder. The ...

07/06/06 - 20060145320 - Embedded heat spreader
In some embodiments an apparatus may comprise a semiconductor die, an elastomer layer attached to the die, a tape lead attached to the elastomer, a portion of the tape lead exposed through the elastomer to connect with the die, a polymer resin attached to the tape lead, and a thermally ...

07/06/06 - 20060145319 - Flip chip contact (fcc) power package
This invention discloses a power device package for containing, protecting and providing electrical contacts for a power transistor. The power device package includes a top and bottom lead frames for directly no-bump attaching to the power transistor. The power transistor is attached to the bottom lead frame as a flip-chip ...

06/29/06 - 20060138624 - Semiconductor device package
Provided is a semiconductor device package in which instability of a bonding wire that may occur when a plurality of semiconductor chips are stacked is prevented and which obtains a light, thin and small structure. The semiconductor device package includes a substrate having a plurality of substrate pads on a ...

06/29/06 - 20060138623 - Stacked-type semiconductor device
A stacked-type semiconductor device including a plurality of semiconductor elements stacked through a spacer is disclosed. The electrical characteristics with the bonding wires are improved and a narrow pitch is secured. The stacked-type semiconductor device includes a lower semiconductor element (2) fixed on a wiring board (1), an insulating spacer ...

06/29/06 - 20060138622 - One step capillary underfill integration for semiconductor packages
The present invention relates to a semiconductor package containing a package substrate, integrated heat spreader, and semiconductor die. An underfill material is embedded in the semiconductor package serving both as underfill and sealant. ...

06/29/06 - 20060138621 - Optoelectronic component and a module based thereon
An optoelectronic component (1) having a semiconductor arrangement (4) which emits and/or receives electromagnetic radiation and which is arranged on a carrier (22) which is thermally conductively connected to a heat sink (12). External electrical connections (9) are connected to the semiconductor arrangement (4), where the external electrical connections (9) ...

06/22/06 - 20060131711 - Package for semiconductor device
A lid for sealing a ceramic container receiving a semiconductor device such as an acceleration sensor is provided. The lid has an electrodeposition coating layer having a thickness of approximately 10 μm, which is formed by plating the outer surface of the 42 alloy plate having a thickness of approximately ...

06/22/06 - 20060131710 - Advanced cavity structure for wafer level chip scale package
The present invention provides an advanced cavity structure for optically sensitive devices in wafer level chip scale package and methods of manufacturing thereof. Image sensor or light detection integrated circuits are formed on substrate. Substantially absorptive bleached cavity walls are formed about the image sensor or light detection integrated circuits. ...

06/22/06 - 20060131709 - Semiconductor die positioning system and a method of bonding a semiconductor die to a substrate
The present invention describes a process for bonding a semiconductor die to a selected substrate, including the formation of a die positioning structure on the substrate to receive and secure the semiconductor die. The substrate is selected from a number of materials, the properties of which render it penetrable by ...

06/22/06 - 20060131708 - Packaged electronic devices, and method for making same
In one embodiment, an electronic device is packaged by electrically connecting the electronic device to an electrical contact on a substrate; applying a binding agent to bind the electronic device to the electrical contact; and then removing at least a portion of the substrate to expose the electrical contact as ...

06/15/06 - 20060125066 - Self-adhesive frame applied in package of field emission display, the manufacturing method for the same and the package method by the same
A self-adhesive frame is applied in package of field emission display, the manufacturing method for the same and the package method by the same being also discussed in the specification. The self-adhesive frame can be designed as an independent component and suitable to be manufactured independently. The cathode plate and ...

06/08/06 - 20060118933 - Stackable frames for packaging microelectronic devices
A frame is provided for packaging a microelectronic device. The frame is formed from a unitary member, electrically conductive device-attachable pads, and terminals in electrical communication with the device-attachable pads. The unitary member includes a base section, first and second wall sections each extending from the base section, and first ...

06/08/06 - 20060118932 - Ultrasonic bonding equipment for manufacturing semiconductor device, semiconductor device and its manufacturing method
An ultrasonic bonding equipment for manufacturing a semiconductor device comprises a tip portion. The tip portion has a top surface which is faced to a member to be bonded, and propagates an ultrasonic vibration to the top surface. A plurality of protruding portions are provided on the top surface. Each ...

06/08/06 - 20060118931 - Assembly structure and method for embedded passive device
An assembly structure for an embedded passive device is provided, including at least one passive device embedded in a through hole of a core layer in a circuit substrate. The embedded passive device comprises plural electrodes, which electrically connect through the top side and the bottom side of the core ...

06/08/06 - 20060118930 - Method and integrated circuits of module packing
The present invention provides a modular packing integrated circuit card and its manufacturing method. The above modular packing integrated circuit card comprises a shell, a composite chip unit, and a switch card with a specific interface format. The switch card has a predetermined space for locating the composite chip unit, ...

06/08/06 - 20060118929 - Ball assignment schemes for integrated circuit packages
The present disclosure is directed to ball assignment schemes for ball grid array packages in integrated circuits with increased signal count. The ball assignment scheme includes an array of electrical contacts. The array has a first diagonal including a pair of signal contacts adjacent to a pair of first-type voltage ...

06/08/06 - 20060118928 - Electronic component device
An electronic component having thermal shock resistance and high reliability includes an element having a functional part and a first frame-shaped electrode surrounding the functional part, a substrate including a second frame-shaped electrode, and a solder sealing frame provided on the surface of at least one of the first frame-shaped ...

06/01/06 - 20060113650 - Bond pad rerouting element and stacked semiconductor device assemblies including the rerouting element
A rerouting element for a semiconductor device includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device with which the rerouting element is to be used. The conductive ...

06/01/06 - 20060113649 - Light transmissive cover, device provided with same and methods for manufacturing them
A light transmissive cover for a device comprising: a cover member of light transmissive material; and a junction member joined to the cover member, the junction member being a member used to be joined to the body of the device and having a light interrupting film on the inner surface ...

06/01/06 - 20060113648 - Semiconductor chip and tab package having the same
A semiconductor chip, having an active surface including a peripheral area and a central area, presents a connection area formed on a portion of the peripheral area. The semiconductor chip includes output pads formed in the peripheral area of the active surface and input pads formed in the central area ...

06/01/06 - 20060113647 - Semiconductor device with improved heat dissipation
The invention relates to a semiconductor module with at least one semiconductor modular printed circuit board, which offers an improvement of the heat dissipation or a more efficient heat transport from the semiconductor chip, e.g. a memory chip or a logic chip, to the modular printed circuit board. An intermediate ...

06/01/06 - 20060113646 - Connection arrangement for micro lead frame plastic packages
A connection arrangement for a micro lead frame plastic (MLP) package is provided that includes a paddle configured to be connected to a circuit board and a first ground pad and a second ground pad each connected to the paddle. The first and second ground pads together with the paddle ...

05/25/06 - 20060108673 - Method for forming an encapsulated device and structure
In one embodiment, an electronic device package (1) includes a leadframe (2) with a flag (3). An electronic chip (8) is attached to the flag (3) with a die attach layer (9). A trench (16) having curved sidewalls is formed in the flag (3) in proximity to the electronic chip ...

05/18/06 - 20060102991 - Semiconductor apparatus
A semiconductor apparatus according to the present invention comprises a support member that has a recessed portion, one pair of positive and negative conductive wiring members that are provided on the support member, a semiconductor device that is electrically connected to the conductive wiring members and is disposed in the ...

05/11/06 - 20060097372 - Ic chip package with isolated vias
An IC chip package includes a substrate (2), a chip (5), a plurality of bonding wires (52), and a cover (6). The substrate has a top surface, a receiving chamber (23) having an opening at the top surface, a plurality of solder pads (3) arranged around the top surface and ...

05/11/06 - 20060097371 - Resin-sealed semiconductor device, leadframe with die pads, and manufacturing method for leadframe with die pads
A resin-sealed semiconductor device with built-in heat sink prevents internal bulging and cracking caused by exfoliation of a semiconductor element from the heat sink when the vapor pressure of moisture absorbed into a gap between the semiconductor element and the heat sink rises during mounting of the semiconductor device to ...

05/11/06 - 20060097370 - Stepped integrated circuit packaging and mounting
An electronic assembly and system and method implementing the same are disclosed herein. The electronic assembly includes an IC carrier package having circuitry contained within a housing unit. The IC carrier package includes a connector interface for electrically coupling the IC carrier package circuitry to a printed circuit board. The ...

05/04/06 - 20060091514 - Fan out type wafer level package structure and method of the same
To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, ...

05/04/06 - 20060091513 - Chip package having flat transmission surface of transparent molding compound and method for manufacturing the same
A chip package having flat transmission surface of transparent molding compound mainly comprises a substrate, a chip, a transparent cover and a transparent molding compound. The transparent molding compound is formed between the substrate and the transparent cover to seal the chip. The transparent molding compound is tightly attached to ...

05/04/06 - 20060091512 - Semiconductor device and manufacturing process thereof
The semiconductor device according to one of the embodiments of the present invention includes a metal block having first and second main surfaces and defining a recess on the first main surface. It also includes a semiconductor chip received within the recess of the metal block and mounted on the ...

05/04/06 - 20060091511 - Chip-on-board package having flip chip assembly structure and manufacturing method thereof
A chip-on-board (COB) package has a flip chip assembly structure and is used for an integrated circuit (IC) card. The COB package has conductive patterns as contact terminals on an outer surface of a non-conductive film, and an IC chip on an inner surface of the film. The film has ...

05/04/06 - 20060091510 - Probe card interposer
A probe card interposer includes a substrate with a plurality of conductive bumps disposed on first surface of the substrate. Each conductive bump comprises a dielectric core and a plurality of conductive leads. The suspended ends of the conductive wires extend toward the centers of the corresponding dielectric cores and ...

05/04/06 - 20060091509 - Flip chip package including a non-planar heat spreader and method of making the same
A flip chip package generally includes a substrate, a flip chip die, and a heat spreader. The flip chip die is coupled to the substrate. The heat spreader is coupled to the flip chip die. The heat spreader can include one or more walls. Generally, the one or more walls ...

05/04/06 - 20060091508 - Power distribution within a folded flex package method and apparatus
A device includes a folded flex substrate. A memory die is connected to a first side of the folded flex substrate. A logic die is connected to a second side of the folded flex substrate. A trace routing pattern of source voltage signals is identical to a trace routing pattern ...

04/27/06 - 20060087015 - Thermally enhanced molded package for semiconductors
Integrated circuit packaging with improved thermal transmission from the integrated circuit heat source to the exterior of the packaging. Improved packaging employs a compressive interposer which allows for greater manufacturability of the packaged integrated circuit parts. Additionally different shaped compressive interposers are described. ...

04/27/06 - 20060087014 - Bolster plate assembly for processor module assembly
Systems, methodologies, methods of manufacture, and other embodiments associated with semiconductor/processor module assemblies are described. One exemplary system embodiment includes a bolster plate assembly for a semiconductor module assembly that includes a bolster plate and a leaf spring pre-loaded onto the bolster plate. The example system may also include the ...

04/27/06 - 20060087013 - Stacked multiple integrated circuit die package assembly
An electronic package assembly is formed with a plurality of integrated circuit dies stacked in layers. At least one first die is placed on a substrate. Each subsequent layer of the stack contains at least one die. Each die on each layer has a size and shape such that, when ...

04/27/06 - 20060087012 - System to control effective series resistance of power delivery circuit
According to some embodiments, a system includes an integrated circuit package to support an integrated circuit die. The integrated circuit package may include a plurality of conductive contacts, and an element having a plurality of resistive portions, each of the plurality of resistive portions being coupled to a respective one ...

04/20/06 - 20060081969 - Package structure module of bump posited type lead frame
A package structure that uses a bump posited type lead frame is disclosed. The package structure uses a lead frame having holes thereon for accommodating conductive bumps of a chip or a positioning film having openings thereon for accommodating conductive bumps of a chip or both to avoid the flow ...

04/20/06 - 20060081968 - Semiconductor package
The present invention discloses a semiconductor package comprising a substrate having a plurality of substrate units, a plurality of semiconductor chips respectively disposed on the substrate units, and a plurality of conductive guard lines each disposed between two adjacent substrate units. Each substrate unit is provided with a plurality of ...

04/13/06 - 20060076661 - Attachment of integrated circuit structures and other substrates to substrates with vias
Vias (210, 210B) are formed in a surface of a substrate. At least portions of contact pads (139, 350) are located in the vias. Contact pads (150, 340) of an integrated circuit structure are inserted into the vias and attached to the contact pads (139, 350) of the substrate. The ...

04/13/06 - 20060076660 - Power transistor
A power transistor includes a leadframe and a semiconductor chip arranged on the leadframe. The top side of the semiconductor chip has a drain contact-making layer, and the underside of the semiconductor chip has a source contact-making layer. The source contact-making layer bears directly on the leadframe. A gate contact-making ...

04/13/06 - 20060076659 - Chip package structure, package substrate and manufacturing method thereof
A package substrate for carrying a chip with a plurality of bumps thereon is provided. The package substrate includes a first substrate, and an interposer. The first substrate has a first circuit layer disposed on a surface thereof. The interposer includes a second substrate and a second circuit layer formed ...

04/13/06 - 20060076658 - Semiconductor package structure with microstrip antennan
A semiconductor package structure with a microstrip antenna comprises a packaging substrate, a chip and a microstrip radiation device. The packaging substrate has an upper surface having a packaging area on which the chip is disposed and a peripheral area on which the microstrip radiation device is disposed for transceiving ...

04/06/06 - 20060071312 - Semiconducting device that includes wirebonds
Some embodiments relate to a semiconducting device that includes a substrate, a die and an interconnect device. The die and interconnect device are attached to an upper surface of the substrate. The semiconducting device further includes a first wire that is bonded to the substrate and to the interconnect device ...

04/06/06 - 20060071311 - Surface-mounted microwave package and corresponding mounting with a multilayer circuit
The invention relates to a microwave package delimiting an interior volume, comprising: a Faraday cage formed by a conducting surface surrounding the interior volume, a connection point placed outside the Faraday cage, the connection point being intended to be linked electrically to an exterior circuit, an input-output passing through the ...

03/30/06 - 20060065960 - Display device and manufacturing method thereof
A technique for obtaining light emitting devices manufactured with high yield is provided. The width of a seal pattern (605b) can be kept thin by manufacturing a light emitting device using a second substrate (600a) which has a concave portion (607a) and a concave portion (608a). It therefore becomes possible ...

03/30/06 - 20060065959 - Chip package
The chip package comprising a package substrate, a circuit layer, a chip and at least one conductive wire is provided. The circuit layer is disposed on a first surface of the substrate, and extends from the first surface to a second surface of the substrate via the inner surface of ...

03/30/06 - 20060065958 - Three dimensional package and packaging method for integrated circuits
A 3D package has: a three-dimensional (3D) package substrate, a land grid array (LGA) or quad flat no-lead (QFN) package mounted on the 3D package substrate, the LGA or QFN package having an LGA or QFN die on a first side of an LGA or QFN package substrate, and a ...

03/23/06 - 20060060953 - Semiconductor device package
A semiconductor device package includes a semiconductor device mounted to a substrate, a wall erected around the semiconductor device with a height taller than the height of the semiconductor device, at least one metal member provided in the wall or against the wall; and a lid secured to the metal ...

03/16/06 - 20060055015 - Surface mount hermetic package for power semiconductor die
A hermetically sealed AlN housing for power semiconductor die has a rectangular bottom surrounded by a peripheral wall. Spaced conductive plating sections on the top of the bottom section are connected by conductive vias to conductive plated sections on the bottom to enable surface mounting of the device. A ceramic ...

03/16/06 - 20060055014 - Wireless chip and manufacturing method of the same
The present invention provides a new type wireless chip that can be used without being fixed on a product. Specifically, a wireless chip can have a new function by a sealing step. One feature of a wireless chip according to the present invention is to have a structure in which ...

03/16/06 - 20060055013 - Electronic component, circuit board, electronic apparatus, and method for manufacturing electronic component
An electronic component includes: a semiconductor substrate having a first surface and a second surface opposing to the first surface; a trans-substrate conductive plug that penetrates the semiconductor substrate from the first surface to the second surface; an electronic element provided in the vicinity of the first surface of the ...

03/16/06 - 20060055012 - Led package with zener diode protection circuit
A light emitting diode (LED) package is fabricated with protection circuit against static electricity. The protection circuit includes series connection of more than one Zener diodes which limit any voltage surge no higher than their breakdown voltage, and is connected in parallel with the LED chip. The breakdown voltage of ...

03/09/06 - 20060049499 - Semiconductor device and its manufacturing method
The occurrence of a package crack in the back vicinity of a die pad is restrained by making the outward appearance of the die pad of a lead frame smaller than that of a semiconductor chip which is mounted on it, and also the occurrence of a package crack in ...

03/09/06 - 20060049498 - Methods of making microelectronic assemblies including compliant interfaces
An assembly includes a structure, a plurality of terminals and a plurality of compliant pads disposed between said terminals and said structure. The terminals are aligned with at least some of said pads, with the pads providing a standoff between the structure and the terminals. The compliant pads are preferably ...

03/09/06 - 20060049497 - Physical quantity sensor
A physical quantity sensor includes a package, a circuit chip disposed and held in the package, a sensor chip stacked and fixed on the circuit chip, and a wiring member having flexibility, through which the circuit chip and the package are electrically and mechanically bonded together. In the physical quantity ...

03/09/06 - 20060049496 - System and method for providing scalability in an integrated circuit
The invention provides a system and method for providing scalability in an integrated circuit (IC) having a package coupled to a die through package balls. The die includes a plurality of input/output (I/O) slots and a hardmac configured to implement a logic function. A patch board is included between the ...

03/09/06 - 20060049495 - Semiconductor package and laminated semiconductor package
A semiconductor package has a semiconductor device chip and a flexible substrate having a thermoplastic insulating resin layer. An electrode provided on the flexible substrate is connected to a predetermined electrode of the semiconductor device chip and sealed by the thermoplastic insulating resin layer. The flexible substrate is bent and ...

03/02/06 - 20060043554 - Method of making a semiconductor device adapted to remove noise from a signal
What is invented is a semiconductor device (10) comprising a pellet (12) having a ground electrode (18), an outside signal terminal (15) connected to the pellet (12), so as to receive signal which is likely to include noise. Therein, said outside signal terminal (15) is surrounded with a ground terminal ...

03/02/06 - 20060043553 - Chip package having a heat spreader and method for packaging the same
A chip package mainly includes a substrate, a stiffener, a chip, a thermal interface material (TIM) and a heat spreader. The stiffener is disposed on the substrate and has a receiving portion. The chip is disposed on the substrate. The thermal interface material (TIM) is formed on a surface of ...

03/02/06 - 20060043552 - Semiconductor device and process for manufacturing the same
The present invention relates to a semiconductor device in which electrodes formed on a semiconductor chip and electrodes formed on a wiring board are electrically connected via projecting elastic electrodes, and further relates to a mounting method of reducing a pressure applied to electrodes formed on a substrate or underlying ...

03/02/06 - 20060043551 - Electronic control device
A circuit board mounting electronic components including a heat generating element is accommodated in a casing. A heat dissipation member is disposed between the heat generating element and an inner surface of the casing. The heat dissipation member is thermally bonded to the heat generating element and to the casing. ...

03/02/06 - 20060043550 - Hermetic semiconductor package
A hermetically sealed semiconductor package that includes a power semiconductor die having electrodes thereof electrically connected to the external surface mountable terminals of the package without the use of wirebonds. ...

03/02/06 - 20060043549 - Micro-electronic package structure and method for fabricating the same
A micro-electronic package structure and a method for fabricating the same are proposed. A carrier is prepared and provided with a cavity for receiving at least one semiconductor chip having a plurality of electrical connection contacts. A dielectric layer is formed on the carrier, with the electrical connection contacts being ...

03/02/06 - 20060043548 - Semiconductor device having stiffener
A semiconductor device includes a substrate, a semiconductor element mounted on the substrate and a stiffener attached via an adhesive to a surface of the substrate opposite to a surface thereof on which the semiconductor element is mounted. The adhesive has a coefficient of thermal expansion smaller than that of ...

03/02/06 - 20060043547 - Circuit board and method for producing a circuit board
A circuit board comprises a dielectric layer, a net of first power supply lines for providing a first reference voltage plane and a net of second power supply lines for providing a second reference voltage plane. The nets of first and second power supply lines are arranged such that first ...

02/23/06 - 20060038268 - Semiconductor module
Disclosed is a semiconductor module comprising a semiconductor element (1) and two terminal electrodes (3a, 3b, 3c) between which the semiconductor element (1) is disposed and with which the semiconductor element (1) is contacted in an electrically conducting manner. The semiconductor element (1) is surrounded by an at least partly ...

02/23/06 - 20060038267 - Display device with characteristic data stored therein
A method of manufacturing a display device is presented. The method includes mounting the memory on the printed circuit board (PCB) and writing the characteristic data in the memory. The characteristic data, which is data that is specific to a display device having a particular specification, allows an operator to ...

02/16/06 - 20060033190 - Vertically mountable and alignable semiconductor device packages and assemblies including the same
A semiconductor device package includes a die, a package encapsulating at least a portion of the die, and a plurality of leads. Each lead of the plurality includes an external portion. The external portion of each lead is substantially planar and extends outward from a bottom edge of the package. ...

02/16/06 - 20060033189 - Structure and method of forming capped chips
As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern is formed on a chip insulated from wiring of the chip, and a cap is formed including a metal. The cap is joined to the metal base pattern ...

02/16/06 - 20060033188 - Electronic component packaging
One embodiment of an electronic component packaging system includes a base adapted for supporting an electronic component and including a mechanically planarized sealing surface, and a lid including a mechanically planarized sealing surface sealed to the planarized sealing surface of the base so as to define a hermetic seal therebetween. ...

02/09/06 - 20060027905 - Biosensor with smart card configuration
A biosensor that has a smart card configuration includes a semiconductor chip including a bioactive structure and contact areas disposed on a first side of the semiconductor chip, and a rewiring substrate including contact pads, external contact areas and rewiring lines that electrically connect the contact pads to the external ...

02/09/06 - 20060027904 - Micro device having micro system structure and method for manufacturing the same
A micro device having a micro system structure includes a protection film disposed on the micro system structure for protecting from a particle. The protection film includes a first protection film having a Vickers hardness equal to or larger than 2500 Hv or a nano indentation hardness equal to or ...

02/09/06 - 20060027903 - Semiconductor package, method for fabricating the same, and semiconductor device
A semiconductor device includes a semiconductor chip, leads for sending and receiving signals between the semiconductor chip and an external device, fine metal wires, an encapsulant for sealing the leads, and a lid member. On the surface of each of the leads, a metal oxide film is formed by an ...

02/02/06 - 20060022322 - Small structure and method for fabricating the same
A small structure which uses bonding wires to prevent disturbance and provide support and a method of fabricating the same are provided. The small structure includes a floating body having a plurality of first contact pads, a base having a plurality of second contact pads, and a plurality of bonding ...

02/02/06 - 20060022321 - Semiconductor chip having gettering layer, and method for manufacturing the same
In a semiconductor chip A wherein an element layer 2 having transistors and the like is formed on the front face, and the back face is joined to an underlying member, such as a package substrate, the thickness T is made 100 μm or less, and thereafter, a gettering layer ...

02/02/06 - 20060022320 - Semiconductor device and manufacturing method thereof
A semiconductor apparatus includes: a first insulating layer formed on an IC chip; a metal wiring having one end connected to a chip electrode pad, and one other end on which an external connection terminal mounting electrode is provided; an electronic component connected to part of the external connection terminal ...

02/02/06 - 20060022319 - Airtight package, piezoelectric device, and piezoelectric oscillator
An airtight package has an insulating base having an opening approximately in the center and a recessed portion penetrating the insulating base in a thickness direction on a circumferential surface of the insulating base. The airtight package also has a lid sealed against the insulating base so as to block ...

01/26/06 - 20060017144 - Semiconductor device
The present invention provides a technique which, without causing two problems, i.e., (1) increased number of power supply/grounding pins and (2) increased power feed line inductance, prevents the noise causing a problem in a control circuit, from becoming routed around and induced into an output buffer. More specifically, the above ...

01/26/06 - 20060017143 - Semiconductor device and its manufacturing method
There are constituted by a tab (1b) on which a semiconductor chip (2) is mounted, a sealing portion (3) formed by resin-sealing the semiconductor chip (2), a plurality of leads (1a) each having a mounted surface (1d) exposed to a peripheral portion of a rear surface (3a) of the sealing ...

01/19/06 - 20060012020 - Wafer-level assembly method for semiconductor devices
A wafer-level assembly method for bonding chips to other wafers or to arrays of circuits. The method allows an array of chips, held on a temporary carrier, to be separated by expanding said carrier so that said chips can be aligned and bonded to a substrate with dimensions that would ...

01/19/06 - 20060012019 - Semiconductor package
A semiconductor package includes a semiconductor chip, a circuit board at which a wire pattern is formed, and a metal structure including a portion inserted through an opening of the circuit board and upon which the semiconductor chip rests. With the semiconductor chip in direct contact with the metal structure, ...

01/19/06 - 20060012018 - Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
A multipackage module has multiple die of various types and having various functions and, in some embodiments, the module includes a digital processor, an analog device, and memory. A first die, having a comparatively large footprint, is mounted onto first die attach region on a surface of a first package ...

01/19/06 - 20060012017 - Semiconductor device and method of manufacturing the same
A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the ...

01/19/06 - 20060012016 - High-frequency power semiconductor module with a hollow housing and method for the production thereof
The invention relates to a radiofrequency power semiconductor module having a cavity housing constructed from three modules, a 1st module, which has an upwardly and downwardly open housing frame with horizontally arranged flat conductors, a 2nd module, which has the chip island as a heat sink with at least one ...

01/12/06 - 20060006510 - Plastic encapsulated semiconductor device with reliable down bonds
Plastic encapsulated semiconductor devices having elevated topographical features on the chip mount pad to control the extent of delamination at the plastic to substrate interface, thereby allowing reliable down bond sites to be formed on the top surface of the chip mount pad which may serve as a ground plane. ...

01/12/06 - 20060006509 - Semiconductor device
This is a semiconductor apparatus capable of realizing a sharing of parts without introducing enlargement of the apparatus and deterioration in reliability of the wire bonding in case of responding to various electronic circuits. It is a semiconductor laser apparatus configured to include a housing (1) in which device mounting ...

01/05/06 - 20060001139 - Support structure for use in thinning semiconductor substrates and for supporting thinned semiconductor substrates
A support structure for use with a semiconductor substrate in thinning, or backgrinding, thereof, as well as during post-thinning processing of the semiconductor substrate includes a portion which extends substantially along and around an outer periphery of the semiconductor substrate to impart the thinned semiconductor substrate with rigidity. The support ...

01/05/06 - 20060001138 - Ic-tag-bearing wiring board and method of fabricating the same
To improve electronic part packaging efficiency without sacrificing the transmission distance of a radio IC tag, a recess is formed in the front side surface of a printed wiring board. An IC chip is placed in the recess so that the IC chip does not protrude from the front side ...

01/05/06 - 20060001137 - Integrated circuit package including embedded thin-film battery
An integrated circuit package is provided with a thin-film battery electrically connected to and encapsulated with an integrated circuit die. The battery can be fabricated on a dedicated substrate, on the die pad, or on the integrated circuit die itself. ...

12/29/05 - 20050285247 - Substrate-based die package with bga or bga-like components
A packaged electronic component includes a substrate with an upper layer, a lower layer and a middle layer between the upper layer and the lower layer. The middle layer is formed from a first material that is more flexible than the material of the upper layer and the material of ...

12/29/05 - 20050285246 - Microelectronic packages and methods therefor
A microelectronic package includes a microelectronic element having faces, contacts and an outer perimeter, and a flexible substrate overlying and spaced from a first face of the microelectronic element, an outer region of the flexible substrate extending beyond the outer perimeter of the microelectronic element. The package includes a plurality ...

12/29/05 - 20050285245 - Substrate strip for a transparent package
A substrate strip for a transparent package has a top surface, a bottom surface and an injection region through the top and bottom surface. The top surface includes a plurality of package regions and a plurality of runner regions. The injection region is disposed between the package regions and is ...

12/29/05 - 20050285244 - Method of embedding semiconductor element in carrier and embedded structure thereof
A method of embedding a semiconductor element in a carrier and an embedded structure thereof are proposed. First, a carrier having a hole is provided and an auxiliary material is attached to a side of the carrier. A semiconductor element is placed in the hole of the carrier. Then, a ...

12/29/05 - 20050285243 - Integrated circuit packages, systems, and methods
An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shadow region. ...

12/29/05 - 20050285242 - Lids for wafer-scale optoelectronic packages
A method for forming a lid for a wafer-scale package includes (1) forming a cavity in a substrate, (2) forming an oxide layer over the cavity and over a bond area around the cavity on the substrate, (3) forming a reflective layer over the oxide layer, (4) forming a barrier ...

12/22/05 - 20050280130 - Printed wiring board and production method for printed wiring board
A printed wiring board including solder pads excellent in frequency characteristic is provided. To do so, each solder pad 73 is formed by providing a single tin layer 74 on a conductor circuit 158 or a via 160. Therefore, a signal propagation rate can be increased, as compared with a ...

12/22/05 - 20050280129 - Semiconductor device and manufacturing method therefor
A semiconductor device is manufactured by sealing a semiconductor chip, which is mounted on a prescribed support such as a lead frame, support bars, and a substrate connected with electrical wiring, in a package. Herein, individual information containing management information representing manufacturing conditions of semiconductor chips and test information representing ...

12/22/05 - 20050280128 - Thermal interposer for thermal management of semiconductor devices
A thermal interposer is provided for attachment to a surface of a semiconductor device. In one embodiment, the thermal interposer includes an upper plate having a bottom surface with a plurality of grooves and made of a material having high thermal conductivity, and a lower plate having a top surface ...

12/22/05 - 20050280127 - Apparatus and method for thermal and electromagnetic interference (emi) shielding enhancement in die-up array packages
An apparatus and method for enhancing thermal performance and electromagnetic interference (EMI) shielding in die-up array integrated circuit (IC) device packages is presented. A die-up array package includes an IC die mounted to a first stiffener surface. The package further includes a cap body having first and second surfaces. A ...

12/15/05 - 20050275077 - High density chip scale leadframe package and method of manufacturing the package
An integrated circuit package having a die pad with a first face and a second face, a plurality of inner leads, and a plurality of sides between the first face and the second face. The plurality of inner leads is disposed substantially co-planer with and substantially around the die pad. ...

12/15/05 - 20050275076 - Semiconductor apparatus and method of manufacturing same, and method of detecting defects in semiconductor apparatus
A semiconductor apparatus comprising: a semiconductor substrate having a device region and a periphery region surrounding the device region; a semiconductor device provided in the device region of the semiconductor substrate; a first electrode pad provided on the semiconductor substrate; a second electrode pad provided on the semiconductor substrate; a ...

12/15/05 - 20050275075 - Micro-electro-mechanical system (mems) package with spacer for sealing and method of manufacturing the same
A micro-electro-mechanical system (MEMS) package with a spacer for sealing and a method of manufacturing the package are disclosed. The MEMS package and method of the present invention hermetically and reliably seals MEMS elements from an external environment, including temperature, humidity, impact and vibration, by a sealing unit which has ...

12/15/05 - 20050275074 - Semiconductor package and method of manufacturing the same
A semiconductor package comprising a substrate and a semiconductor device disposed on the substrate by flip-chip bonding. The present invention is characterized by a connection structure disposed between the semiconductor device and the substrate that extends along the periphery of the bottom surface of the semiconductor device. As a result, ...

12/15/05 - 20050275073 - Method and system for improved wire bonding
According to one embodiment of the invention, a method for coupling electrical contacts is provided. The method includes providing an electronic component having a contact that is to be coupled to another contact. The method also includes forming, over the contact, a bonded ball having a downwardly sloping shoulder that ...

12/15/05 - 20050275072 - Package having bond-sealed underbump
A package for containing microelectromechanical devices includes a first substrate wafer, and a second substrate wafer made of an optical quality material. An underbump is interposed between the first and second substrate wafers. The underbump is composed of a standoff region and a localized bond region. The first and second ...

12/08/05 - 20050269677 - Preparation of front contact for surface mounting
A semiconductor device which includes a power electrode on a surface thereof, a solderable body on the power electrode and a passivation body spaced from but surrounding the solderable body. ...

12/08/05 - 20050269676 - Adhesive/spacer island structure for stacking over wire bonded die
Adhesive/spacer structures used to adhere a first device, such as a die, or a package, to a second device such as a die, or a package, or a heat spreader, in a stacked semiconductor assembly, include a plurality of spaced-apart adhesive/spacer islands securing the first and the second devices to ...

12/01/05 - 20050263867 - Intermediate substrate
An intermediate substrate is provided which reduces the effect of the difference in the coefficients of linear expansion between the terminals of the substrate and those of a semiconductor integrated circuit device, and which thus lowers the likelihood of disconnection due to thermal stress. The intermediate substrate, which is a ...

12/01/05 - 20050263866 - Hermetic pacakging and method of manufacture and use therefore
An embodiment of the present invention provides a method of manufacturing hermetic packaging for devices on a substrate wafer, comprising forming a plurality of adhesive rings on a cap wafer or the substrate wafer, bonding the cap wafer to the substrate wafer with an adhesive layer, forming trenches in the ...

12/01/05 - 20050263865 - Ic chip package
An IC chip package includes a carrier having a top side, a bottom side, a receiving chamber, and a plurality of solder areas and non-solder areas alternately arranged around the opening of the receiving chamber, an IC chip fixedly mounted inside the receiving chamber, a plurality of solder wires respectively ...

11/24/05 - 20050258526 - Semiconductor device, method for mounting the same, and method for repairing the same
A substrate 1 has formed therein through-holes 7 lined on the internal walls with a wiring layer 9, and solder balls 6 are fusion-bonded to the substrate 1 in such a manner as to cover the through-holes 7. In the mounting process or in the repair process, heating probes 41 ...

11/24/05 - 20050258525 - Sensor isolation system
A sensor isolation system including a sensor, a package for the sensor, and a compliant interposer disposed between the sensor and the package and interconnecting the sensor to the package to isolate the sensor from thermal and mechanical stresses and yet at the same time providing a physical interconnect between ...

11/17/05 - 20050253238 - Systems for degating packaged semiconductor device with tape substrates
A system for degating a packaged semiconductor device that includes a tape substrate includes a first element and a second element. The first element of the system is positionable adjacent to a first major surface of the packaged semiconductor device and includes a receptacle for receiving a portion of a ...

11/17/05 - 20050253237 - Method of forming an array of semiconductor packages
A semiconductor package is provided which includes a substrate having a plurality of semiconductor dice mounted thereon. The substrate is divided into segments by grooves formed in the bottom surface of the substrate. Each semiconductor die is electrically connected to the substrate by electrical connections which extend from bond pads ...

11/17/05 - 20050253236 - Semiconductor device capable of being connected to external terminals by wire bonding in stacked assembly
A semiconductor device includes a rectangular chip having four sides, wires connected respectively to different external terminals, and a bonding pad disposed along one of the four sides of the rectangular chip and directly connected to the wires for connection to the different external terminals. Since the different external terminals ...

11/17/05 - 20050253235 - Semiconductor chip and circuit board, manufacturing method of same, and electronic equipment
A semiconductor chip is provided that is highly packageable and particularly well suited for mounting on a circuit board having a curved surface. The semiconductor chip comprises a warpage control film that controls the warpage of a substrate. ...

11/17/05 - 20050253234 - Semiconductor package and method of fabricating the same
A TAB type package on which a semiconductor chip is mounted and a method of manufacturing the same. The semiconductor package includes a plurality of inner leads to be connected to the semiconductor chip and formed on a base film, and a plurality of reinforcing leads connected to four edges ...

11/17/05 - 20050253233 - Power module and electric transportation apparatus incorporating the same
A power module includes a substrate having an insulative surface and a conductive pattern disposed on the insulative surface, a semiconductor device disposed on the substrate, a plate conductor provided on the conductive pattern with an insulating layer interposed therebetween, and a wire arranged to electrically connect the plate conductor ...

11/17/05 - 20050253232 - Semiconductor device
A semiconductor device includes a semiconductor chip. A stepped member having stepped regions is provided on the semiconductor chip. The stepped member, together with a redistribution layer, is encapsulated by an encapsulating resin layer. The stepped member is exemplified by functional bumps and dummy bumps having stepped regions. The dummy ...

11/17/05 - 20050253231 - Semiconductor package with encapsulated passive component
A semiconductor package with an encapsulated passive component mainly includes at least a substrate having a surface, a passive component and a molding compound. A plurality of SMD pads (Solder Mask Defined pads) and a solder mask are formed on the surface of the substrate. Each SMD pad has an ...

11/17/05 - 20050253230 - Large die package structures and fabrication method therefor
A method for fabricating large die package structures is provided wherein at least portions of the leadtips of at least a plurality of leadfingers of a leadframe are electrically insulated. A die is positioned on the electrically insulated leadtips. The die is electrically connected to at least a plurality of ...

11/17/05 - 20050253229 - Semiconductor device and manufacturing method of same
In a semiconductor device in which a second semiconductor chip is layered on a first semiconductor chip mounted on a substrate, a mounting-use bonding layer being formed on a reverse surface of the second semiconductor chip with respect to a circuit formation thereof, the mounting-use bonding layer functions as a ...

11/17/05 - 20050253228 - Method for encapsulation of a chipcard and module obtained thus
Method for conditioning of an electronic microcircuit designed for the production of an electronic module which can be glued by means of a simple glue or by soldering. For this purpose the microchip has a geometric shape compatible with a recess in a card provided to accommodate it and has ...

11/10/05 - 20050248014 - Resin-encapsulated semiconductor apparatus and process for its fabrication
The present invention provides a resin-encapsulated semiconductor apparatus comprising a semiconductor device having a ferroelectric film and a surface-protective film, and an encapsulant member comprising a resin; the surface-protective film being formed of a polyimide. The present invention also provides a process for fabricating a resin-encapsulated semiconductor apparatus, comprising the ...

11/10/05 - 20050248013 - Assemblies with bond pads of two or more semiconductor devices electrically connected to the same surface of a plurality of leads
A semiconductor device includes two or more semiconductor devices with bond pads that are electrically connected to the same, single surface of a plurality of leads. The two or more devices may include substantially centrally located bond pads or substantially identically arranged bond pads. ...

11/10/05 - 20050248012 - Mounting structure, electro-optical device, substrate for electro-optical device, and electronic apparatus
A mounting structure includes a mounting substrate on which a plurality of mounting pads each constituting a portion of a conductive pattern extending in a Y direction are arranged in an X direction, the X direction and the Y direction being two directions orthogonal to each other, and a member ...

11/10/05 - 20050248011 - Flip chip semiconductor package for testing bump and method of fabricating the same
A semiconductor package comprises a plurality of pads disposed along a surface edge of a semiconductor chip, a plurality of mounting bumps formed on a surface of the semiconductor chip and disposed away from the plurality of pads at a predetermined distance, a plurality of redistribution connecting wires for electrically ...

11/10/05 - 20050248010 - Semiconductor package and system module
A thermal expansion coefficient of a module substrate 8 is different from that of a package substrate. There is not any place where stresses generated in Interfaces between soldering balls 5 and the substrate are released. These stresses are largely applied to soldering bond, the soldering balls are strained, deformed, ...

11/10/05 - 20050248009 - Circuit device
To provide a circuit device suitable for incorporating a semiconductor element emitting or receiving short-wavelength light. The circuit device includes a casing, a semiconductor element, and a cover portion. The casing has an opening on the top face thereof. The semiconductor element is incorporated in the casing and emits or ...

11/10/05 - 20050248008 - Optical surface mount technology package
A semiconductor package includes a package substrate, an optical device die atop the package substrate, a transparent optical element atop the die, an optional dam around the die, and an encapsulant entirely covering the die and partially covering the transparent optical element. ...

11/03/05 - 20050242419 - Method of fabricating an apparatus including a sealed cavity and an apparatus embodying the method
A method of fabricating an apparatus including a sealed cavity and an apparatus embodying the method is disclosed. To fabricate the apparatus, a device chip including a substrate and at least one circuit element on the substrate is fabricated. Also, a cap is fabricated. The cap is attached to the ...

11/03/05 - 20050242418 - Structure of package
The present invention discloses a structure of wafer level packaging. The structure comprises a first patterned isolation layer, a conductive layer and a second patterned isolation layer. The first patterned isolation layer is formed with a passivation layer of an IC (Integrated Circuit). The conductive layer is configured to have ...

10/27/05 - 20050236705 - Wire bonding system and method of use
A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit ...

10/27/05 - 20050236704 - Chip package structure and process for fabricating the same
A chip package structure comprising a carrier, a chip and an underfill layer is disclosed. The carrier has a plurality of bumps disposed thereon. The chip has an active surface. The chip is flip-chip bonded and electrically connected to the carrier through the bumps such that the active surface of ...

10/27/05 - 20050236703 - Systems and methods for testing packaged dies
A main die and a stacked die are included in the same component package. A transmission gate (370) is implemented on the main die, and can be enabled to receive leakage current in a connection (318) between the main die and the stacked die, and to conduct the leakage current ...

10/20/05 - 20050230797 - Chip packaging structure
A flip-chip package structure includes a flexible interconnection structure, at least one chip, a stiffener layer, and an isolating layer. The flexible interconnection structure having a plurality of bumps on a top surface, a plurality of contact terminals on a bottom surface, and an inner circuit connected to the bumps ...

10/20/05 - 20050230796 - Semiconductor integrated circuit
To provide a test technology capable of reducing a package size by reducing a number of terminals (pins) in a semiconductor integrated circuit of SIP or the like constituted by mounting a plurality of semiconductor chips to a single package, in SIP 102 constituted by mounting a plurality of semiconductor ...

10/20/05 - 20050230795 - Lsi package provided with interface module, and transmission line header employed in the package
An LSI package encompasses a transmission line header embracing a header-base, a transmission line held by the header-base, and an interface IC chip mounted on the header-base, an interposer substrate having a plurality of board-connecting joints, which facilitate connection with the printed wiring board; an LSI chip mounted on the ...

10/20/05 - 20050230794 - Semiconductor device with improved design freedom of external terminal
A semiconductor device comprises: a semiconductor chip; an extension portion formed in contact with the side surfaces so as to surround the semiconductor chip; an insulating film formed on a surface of the extension portion and the semiconductor chip; each of a plurality of wiring patterns electrically connected to each ...

10/13/05 - 20050224940 - Method for maintaining solder thickness in flipchip attach packaging processes
A packaging assembly for semiconductor devices and a method for making such packaging is described. The invention provides a non-Pb bump design during a new flip-chip method of packaging. The design uses special conductive materials in a stud form, rather than a solder ball containing Pb. This configuration maintains a ...

10/13/05 - 20050224939 - Semiconductor device and method for manufacturing same
As illustrated in FIG. 2(a), a wiring pattern 2 is provided on an insulating tape 1. Part of the wiring pattern 2 is a connection section 4 for connection. As illustrated in FIG. 2(b), an insulating resin 7 is provided so that the connection section 4 is coated with the ...

10/13/05 - 20050224938 - Electronic package having a sealing structure on predetermined area, and the method thereof
An electronic package for a photo-sensing device is provided. The package is formed to include a substrate of a material substantially transparent to light within a predetermined range of wavelengths. The package further formed to include at least one photo-sensing die having a photo-sensing area defined on a front side ...

10/13/05 - 20050224937 - Exposed pad module integrated a passive device therein
An exposed pad module integrated a passive device therein. The module includes a base, an active device overlying the base, a trace line electrically connecting to the active device, beyond the base, a pad beyond the trace line, a passive device electrically connecting the trace line and contact pad, and ...

10/13/05 - 20050224936 - Chip package structure
A chip package includes a package substrate, a chip and a molding compound. The package substrate has a carrying surface and a back surface opposite to the carrying surface. The chip is mounted on the carrying surface and electrically connected to the package substrate. Furthermore, the molding compound is applied ...

10/13/05 - 20050224935 - Organic electronic packages having hermetically sealed edges and methods of manufacturing such packages
Organic electronic packages having sealed edges. More specifically, packages having organic electronic devices are provided. A number of sealing mechanisms are provided to hermetically seal the edges of the package to completely protect the organic electronic device from external elements. A sealant may be implemented to completely surround the organic ...

10/06/05 - 20050218496 - Circuit board and method for manufacturing the same and semiconductor device and method for manufacturing the same
A circuit board includes a film substrate, a plurality of wiring layers arranged in order on the film substrate, and bumps formed on the wiring layers, respectively. Each of the bumps is provided across a longitudinal direction of a corresponding one of the wiring layers so as to extend over ...

10/06/05 - 20050218495 - Microelectronic assembly having encapsulated wire bonding leads
An integrated circuit package comprises an interposer having an opening, first and second surfaces and an outline. The interposer has first terminals and second terminals. The first terminals are electrically connected to the second terminals. A semiconductor chip adhered to the second surface of the interposer has an outline that ...

10/06/05 - 20050218494 - Semiconductor device, a method of manufacturing the same and an electronic device
A novel semiconductor device high in both heat dissipating property and connection reliability in mounting is to be provided. The semiconductor device comprises a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface ...

10/06/05 - 20050218493 - Coupling spaced bond pads to a contact
Two dice may be provided within a single package so that one pin and associated leadfinger may be coupled to bond pads on different dice. This may mean that two different bond pads on different dice are coupled, for example by wirebonding, to the same leadfinger. An adhesive tape may ...

10/06/05 - 20050218492 - Optical semiconductor device and a method for manufacturing the same
An optical semiconductor device includes a first set of lead frames having a first set of element mounting beds, a second set of lead frames having a second set of element mounting beds, which are arranged substantially on a same plane as the first set of element mounting beds. A ...

10/06/05 - 20050218491 - Circuit component module and method of manufacturing the same
The present invention provides a circuit component module having high precision, reliability, and low manufacturing costs, and a method of manufacturing the same. A circuit component module includes an electronic component, wiring lines formed in a predetermined pattern, and a resin layer for covering some of the wiring lines and ...

10/06/05 - 20050218490 - Semiconductor storage device, semiconductor device, and manufacturing method therefor
According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. With this structure, metal ...

10/06/05 - 20050218489 - Semiconductor device
The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the ...

10/06/05 - 20050218488 - Electronic component having micro-electrical mechanical system
An electronic component includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a cavity that penetrates from the first surface to the second surface of the semiconductor substrate, and an electrical mechanical element that has a movable portion formed above the first ...

09/29/05 - 20050212108 - Semiconductor chip package
A semiconductor chip package is formed by a first semiconductor chip and a second semiconductor chip, which have electrodes for wiring at surfaces thereof, being integrated and mounted in a state in which reverse surfaces thereof oppose one another. Therefore, two semiconductor chips can be freely combined and mounted regardless ...

09/29/05 - 20050212107 - Circuit device and manufacturing method thereof
In the case of mounting a passive element in a circuit device, since an electrode part is tin-plated, the passive element is fixed to a mounting land part by use of a solder material, and wires cannot intersect with each other in a single layer. Accordingly, there are problems such ...

09/29/05 - 20050212106 - Multilayer integrated circuit for rf communication and method for assembly thereof
A low profile radio frequency (RF) module and package with efficient heat dissipation characteristics, and a method of assembly thereof, are provided. In some embodiments, the RF module package comprises a radio frequency integrated circuit (RFIC) attached to a recessed area of a lead frame. The RFIC has an active ...

09/29/05 - 20050212105 - Integrated circuit die and substrate coupling
A system may include a pre-formed portion of underfill material defining openings. The openings may be configured to pass electrical interconnects for coupling an integrated circuit die to a portion of a substrate. ...

09/22/05 - 20050205979 - Semiconductor package and method for fabricating the same
A semiconductor package and method for fabricating the same is disclosed. In one embodiment, the semiconductor package includes a circuit board, at least two semiconductor chips, electric connection means, an encapsulant, and a plurality of conductive balls. The circuit board has a resin layer and a circuit pattern. The resin ...

09/22/05 - 20050205978 - Semiconductor package and fabrication method thereof
A semiconductor package and a fabrication method thereof are provided in which a chip is mounted on a substrate, and a dielectric layer is applied over the substrate and chip, with bond fingers formed on the substrate and electric contacts formed on the chip being exposed outside. A metal layer ...

09/22/05 - 20050205977 - Methods and apparatus for packaging integrated circuit devices
An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and an active surface formed on the first generally planar surface, at least one chip scale packaging layer formed over the active surface and at ...

09/22/05 - 20050205976 - Circuit device and manufacturing method thereof
A manufacturing method of a circuit device that is formed by embedding a circuit in an insulating film is provided, the method including pressure bonding by a vacuum adhesion method on a first film a film that contains an insulating film between elements and is provided with a recess or ...

09/22/05 - 20050205975 - Semiconductor package having step type die and method for manufacturing the same
A variety of non-rectangular IC chips having a stepped or modified periphery or edge profile including one or more recessed or indented peripheral regions are provided for incorporation in modified package configurations, single chip packages and multi-chip assemblies, both stacked and/or planar. In the planar configurations, the recessed regions may ...

09/22/05 - 20050205974 - Optoelectronic semiconductor component
An optoelectronic semiconductor component applies to a surface mount component of an optoelectronic semiconductor. The optoelectronic semiconductor component has one or more semiconductor chip secured on a chip carrier. The chip carrier is a part of a lead frame, and another part of the lead frame is formed with an ...

09/15/05 - 20050199989 - Semiconductor device and manufacturing method thereof
According to one aspect of the present invention, a semiconductor device, comprising a wiring board provided with wires and electrodes; a semiconductor element which is mounted on the wiring board and has plural connection electrodes formed on its surface; and a metal layer of fine metal particles aggregated and bonded ...

09/15/05 - 20050199988 - Sensor device
A sensor device includes a circuit chip and a sensor chip. The circuit chip has a bonding portion. The sensor chip is stacked on the bonding portion of the circuit chip. The circuit chip and the sensor chip are bonded by a film-type adhesive containing 91 ±3 weight % of ...

09/08/05 - 20050194670 - Semiconductor device and manufacturing method of the same
This invention improves reliability of a semiconductor device and a manufacturing method thereof. A glass substrate is bonded on a surface of a silicon wafer formed with pad electrodes. Next, via holes are formed from a back surface of the silicon wafer to pad electrodes, and a groove is formed ...

09/08/05 - 20050194669 - Integrated circuit package with chip-side signal connections
Embodiments of the present invention include an apparatus, method, and/or system for an integrated circuit package with signal connections on the chip-side of the package structure. ...

09/08/05 - 20050194668 - Wafer scale die handling
A waffle pack device including a member having recesses in a surface of the member to accommodate die from at least one semiconductor wafer. The member is compatible with semiconductor wafer handling equipment and/or semiconductor wafer processing. Preferably, the member accommodates at least a majority of die from a semiconductor ...

09/01/05 - 20050189636 - Packaging substrates for integrated circuits and soldering methods
A packaging substrate (310) includes a semiconductor interposer (120) and at least one other intermediate substrate (110), e.g. a BT substrate. The semiconductor interposer has first contact pads (136C) attachable to dies (124) above the interposer, and second contact pads (340) attachable to circuitry below the interposer. Through vias (330) ...

09/01/05 - 20050189635 - Packaged acoustic and electromagnetic transducer chips
Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as a ...

09/01/05 - 20050189634 - Semiconductor module and method of manufacturing thereof
A method of manufacturing a semiconductor module includes the steps of producing semiconductor devices of substantially the same thickness by forming respective resin portions covering respective semiconductor elements, mounting the semiconductor devices on a module substrate, covering inner bumps of the semiconductor devices with an encapsulating resin, providing a heat ...

09/01/05 - 20050189633 - Chip package structure
A chip package structure comprising a substrate, a chip, a plurality of bumps, some buffer material and some encapsulation is provided. The substrate has a first surface and a corresponding second surface. The chip has an active surface and a back surface. The bumps are disposed between the active surface ...

09/01/05 - 20050189632 - Sealed three dimensional metal bonded integrated circuits
The invention provides a sealing layer that seals metal bonding structures between three dimensional bonded integrated circuits from a surrounding environment. A material may be applied to fill a volume between the bonded integrated circuits or seal the perimeter of the volume between the bonded integrated circuits. The material may ...

09/01/05 - 20050189631 - Integrated circuit structure having a flip-chip mounted photoreceiver
An apparatus comprising an integrated circuit structure is provided. The integrated circuit structure comprises a substrate and a photoreceiver. The substrate has a first side and a second side opposite the first side and includes a first light passage area operable to allow light to pass through. The photoreceiver has ...

09/01/05 - 20050189630 - Bonding arrangement and method for ltcc circuitry
An LTCC (low temperature cofired ceramic) structure which has conductors to which leads are to be bonded for connection to external circuitry. The conductors include additives to promote adhesion to the ceramic layer. The presence of these additives degrade bonding performance. For better bondability of the leads, a pure conductor ...

08/25/05 - 20050184375 - Electronic device configured as a multichip module, leadframe and panel with leadframe positions
An electronic device has, as a multichip module, two or more semiconductor chips that are integrated into a leadframe such that a placement side of the leadframe and the active top sides of the circuit chips are flush and have a common fine wiring plane. The leadframe is arranged as ...

08/25/05 - 20050184374 - Optical semiconductor device and electronic equipment using same
An optical semiconductor device 1a includes a lead frame 4 having an aperture 7, a submount 8 disposed on one surface of the lead frame 4 to close the aperture 7, a semiconductor optical element 3 which has an optical portion 6 and which is mounted on a surface of ...

08/25/05 - 20050184373 - Semiconductor device and fabrication method for the same
A method of fabrication a semiconductor device characerized by: mounting a first semiconductor chip on a wiring substrate; bonding a spacer having a first main surface and a second main surface oppose to the first main surface so that the first main surface contact to the first semiconductor chip; and ...

08/25/05 - 20050184372 - Three-dimensional mounting structure and method for producing the same
A three-dimensional mounting structure according to the present invention includes: a first main wiring board having a first wiring pattern on its surface and an electronic component mounted on the wiring pattern; a second main wiring board disposed facing the first main wiring board and having a second wiring pattern ...

08/25/05 - 20050184371 - Circuit carrier
The present invention provides a circuit carrier for connecting to at least a bump. The circuit carrier comprises a substrate, at least a contact pad on a surface of the substrate and a solder mask layer covering the substrate. The solder mask has at least a stepped opening that exposes ...

08/25/05 - 20050184370 - Embedded heat spreader for folded stacked chip-scale package
In some embodiments, a T-shaped heat spreader may be provided centrally within a folded stacked chip-scale package. The dice may be situated around the T-shaped heat spreader which may be made of high conductivity material. Heat may be dissipated through the T-shaped spreader 24 and downwardly through thermal vias into ...

08/11/05 - 20050173788 - Semiconductor package having wire bonded die and multi layer metal bumps
A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizing ...

08/11/05 - 20050173787 - Method for assembling a ball grid array package with two substrates
An electrically and thermally enhanced die-up ball grid array (BGA) package is described. An integrated circuit (IC) package includes a first substrate, a second substrate, and a stiffener. A surface of the first substrate is attached to a first surface of the stiffener. A surface of the second substrate is ...

08/11/05 - 20050173786 - Semiconductor package and method for manufacturing the same
A semiconductor package includes a semiconductor chip, a first substrate layer and a second substrate layer. The semiconductor chip has an active surface and a plurality of pads disposed on the active surface. The first substrate layer is formed on the active surface of the semiconductor chip and has a ...

08/11/05 - 20050173785 - Anisotropic conductive film and bump, and packaging structure of semiconductor having the same
In an anisotropic conductive film including conductive particles, and a bump, and a packaging structure of a semiconductor chip having the anisotropic conductive film and the bump, the anisotropic conductive film includes a resin layer and the conductive particles. The anisotropic conductive film electrically connects an electrode of a substrate ...

08/11/05 - 20050173784 - Stacked semiconductor device having mask mounted in between stacked dies
A stacked semiconductor device has a substrate having a conductor pattern thereon and the conductor pattern has a plurality of pads. A first die is mounted on the substrate and is electrically connected to the pads of the conductor pattern by gold wires. A first insulating layer is mounted on ...

08/04/05 - 20050167808 - Semiconductor device, its fabrication method and electronic device
A semiconductor device comprising a semiconductor chip having an electrode on a circuit formation surface thereof, a flexible film having a lead attached thereto and electrically connected to said electrode of said semiconductor chip through a bump, a resin for covering said circuit formation surface of said semiconductor chip and ...

08/04/05 - 20050167807 - Enhanced adhesion strength between mold resin and polyimide
A new method is provided for the interface between a stress relieve interface layer of polyimide and a thereover created layer of mold compound. The invention provides for creating a pattern in the stress relieve layer of polyimide before the layer of mold compound is formed over the stress relieve ...

08/04/05 - 20050167806 - Method and apparatus for providing an integrated circuit cover
An integrated circuit cover incorporating a spring portion is described. The spring portion may include any structure that allows displacement between a plate portion of the integrated circuit cover and an attachment portion of the integrated circuit cover and that provides a substantially equalizing effect of pressure on the plate ...

08/04/05 - 20050167805 - Semiconductor device and manufacturing method thereof
When forming a silicon nitride film to protect and insulate a surface on which a silicon substrate has been ground or polishing, by use of a mixed gas containing SiH4, N2, and NH3 as a reaction gas, a film is formed by a single-frequency parallel-plate plasma CVD method. Thereby, even ...

08/04/05 - 20050167804 - Substrate for packaging ic device and method for manufacturing the same
A substrate for packaging a semiconductor chip is disclosed. The substrate includes a dielectric layer, a plurality of conductive circuits and bonding pads formed on the dielectric layer, a metal thin deposition layer formed on the conductive circuits and the bonding pads, and a solder mask formed on the dielectric ...

08/04/05 - 20050167803 - Film substrate, fabrication method thereof, and image display substrate
In a film substrate (FB) including a film base material (1) and conductor wiring (23) that is formed on the film base material (1), the conductor wiring (23) is arranged such that the conductor wiring thickness of an external connection portion on the film substrate to which another panel or ...

08/04/05 - 20050167802 - Semiconductor device
A semiconductor device includes first and second semiconductor elements, a first metal body attached to a first side of the semiconductor elements by a first solder portion, a second metal body attached to a second side of the semiconductor elements with a second solder portion, and a resin mold sealing ...

08/04/05 - 20050167801 - Structure and method for improved heat conduction for semiconductor devices
A thermally conductive structure for a semiconductor integrated circuit and a method for making the structure. The structure comprises one or more vertical and/or horizontal thermally conductive elements disposed proximate a device for improving thermal conductivity from the device to a substrate of the integrated circuit. In one embodiment a ...

08/04/05 - 20050167800 - Semiconductor device and method of manufacturing same
According to this invention, a semiconductor device has an upper surface on which an external connection electrode is formed and a lower surface which opposes the upper surface and is in a mirror surface state. A roughened region roughened by laser marking is formed at part of the lower surface. ...

08/04/05 - 20050167799 - Method of fabricating wafer-level packaging with sidewall passivation and related apparatus
A method of fabricating a chip-scale or wafer-level package having passivation layers on substantially all surfaces thereof to form a hermetically sealed package. The package may be formed by disposing a first passivation layer on the passive or backside surface of a semiconductor wafer. The semiconductor wafer may be attached ...

08/04/05 - 20050167798 - Die-wafer package and method of fabricating same
A die-wafer package includes a singulated semiconductor die having a first plurality of bond pads on a first surface and a second plurality of bond pads on a second opposing surface thereof. Each of the first and second pluralities of bond pads includes an under-bump metallization (UBM) layer. The singulated ...

08/04/05 - 20050167797 - Structure package
Wireless devices use protruding antennas for transmitting and receiving data signals. These protruding antennas govern the size and dimensions of these wireless devices. Perpetual reduction in the size of these wireless devices has resulted in an increasing need and desire to eliminate the protruding antennas. Solutions such as reducing the ...

08/04/05 - 20050167796 - Miniaturised surface mount optoelectronic component
The invention relates to a miniaturised surface mount optoelectronic component. An electrically conductive material (1) preferably metal frame is used to serve as the base for the assembly. Optionally a cavity (2) may be formed within this electrically conductive base material to serve as a reflector cup. An optoelectronic chip ...

08/04/05 - 20050167795 - Electronic devices and its production methods
An electronic device having mounted thereon an MEMS element or other functional elements, in which a device body and lid define an element-carrying space, the element-carrying space is sealed air-tight by an ultrasonic bonded part bonding the device body and the lid, and the element-carrying space having arranged inside it ...

08/04/05 - 20050167794 - Semiconductor device and method of manufacturing same
The semiconductor device (10) comprises a carrier (30) and a semiconductor element (20), such as an integrated circuit. The carrier (30) is provided with apertures (15), thereby defining connecting conductors (31-33) having side faces (3). Notches (16) are present in the side faces (3). The semiconductor element (20) is enclosed ...

07/28/05 - 20050161788 - Semiconductor device
An object of the present invention is to provide a semiconductor device capable of adapting to an increase in the external terminals which can be arranged on the mount surface (a greater number of pins). A mesa-type semiconductor chip is mounted on a mount surface of a substrate which is ...

07/28/05 - 20050161787 - Integrated circuit arrangement
Integrated circuit arrangement, in which bearing areas of mutually opposing sides of a carrier and of a substrate layer, which carries circuit structures, are bonded by means of an adhesive layer. The adhesive bond is produced from adhesives forming at least two adhesive tracks. The first adhesive track is formed ...

07/28/05 - 20050161786 - Hermetic surface mounted power package
A semiconductor package which includes a substrate formed from AlN and electrical terminals formed from tungsten on at least one surface of the substrate by bulk metallization to serve as electrical connection to a component within the package. ...

07/28/05 - 20050161785 - Semiconductor device
In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT1 is formed on the rear surface of the chip 2, and the source terminal ST1 and gate terminal GT1 are formed on the principal surface of the ...

07/28/05 - 20050161784 - Embedded flat film molding
A flat filter layer is received between upper and lower mold portions of a mold for packaging an integrated circuit sensor device, held by the mold over and in contact with the integrated circuit's sensing surface, in light compression between the sensing surface and a mold surface. The filter layer ...

07/28/05 - 20050161783 - Method for manufacturing circuit board, circuit board, and electronic equipment
A method for manufacturing a slim, highly reliable circuit board, wherein connection between electrodes of a chip component and a wiring pattern on the board can be readily and stably established, a circuit board, and electronic equipment including the circuit board are provided. The method includes the steps of disposing ...

07/28/05 - 20050161782 - Hybrid integrated circuit device and manufacturing method of the same
Provided are a hybrid integrated circuit device and a manufacturing method of the same, in which it is capable of molding while fixing a position of a board in a cavity. A method for manufacturing a hybrid integrated circuit device includes the steps of: forming an electric circuit which includes ...

07/28/05 - 20050161781 - Hybrid integrated circuit device and manufacturing method thereof
Disclosed are a hybrid integrated circuit device and a method of manufacturing thereof which can enhance reliability of connections between conductive patterns and a circuit board. A method of manufacturing the hybrid integrated circuit device comprises the steps of providing an insulating layer on a surface of the circuit board ...

07/28/05 - 20050161780 - Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods therefor
A method for fabricating a semiconductor package with a substrate in a strip format is provided. Semiconductor devices are attached in a strip format to the substrate, and a thermal interface material is applied to the semiconductor devices. A flat panel heat spreader is attached to each semiconductor device. The ...

07/28/05 - 20050161779 - Flip chip assemblies and lamps of high power gan leds, wafer level flip chip package process, and method of fabricating the same
The present invention discloses new flip chip assemblies and lamps for high power semiconductor chips or devices including GaN LEDs and a new wafer level flip chip packaging process for cost effectively manufacturing the same. The advantages of the new flip chip assemblies, lamps, and the wafer level flip chip ...

07/28/05 - 20050161778 - Power module and power module assembly
The one-piece power module (12) comprises at least one cut-out metal trace (14), at least one electronic power component (16) electrically connected to the cut-out metal trace, and an electrically insulating material (30; 56) providing the power module with cohesion. The power module presents a cooling face (28) for putting ...

07/21/05 - 20050156301 - Method of packaging an optical sensor
An image sensor device includes a first, QFN type leadframe to which a sensor IC is electrically connected. A second leadframe is provided for holding a lens. A third leadframe is positioned between the first and second leadframes to appropriately space the IC from the lens. Multiple sensor devices are ...

07/21/05 - 20050156300 - Microelectronic component assemblies and microelectronic component lead frame structures
The present invention provides microelectronic component assemblies and lead frame structures that may be useful in such assemblies. For example, one such lead frame structure may include a set of leads extending in a first direction and a dam bar. Each of the leads may have an outer length and ...

07/21/05 - 20050156299 - Partially populated ball grid design to accommodate landing pads close to the die
Methods and structures to reduce in semiconductor packages the length of critical electrical connections between bond pads on one or multiple semiconductor chips and wire landing pads on a substrate have been achieved. An electrical connection becomes critical if high current, high speed or radio frequency signals have to be ...

07/21/05 - 20050156298 - Semiconductor device including semiconductor elements mounted on base plate
A semiconductor device 100 includes the first semiconductor device 110 having a plurality of bumps 3 which are formed on the backside surface thereof, and the second semiconductor device 120 having a plurality of terminals 2 which are formed on the front surface thereof and are to be electrically connected ...

07/21/05 - 20050156297 - Semiconductor package including flex circuit, interconnects and dense array external contacts
A chip scale semiconductor package and a method for fabricating the package are provided. The package includes a semiconductor die and a flex circuit bonded to the face of the die. The flex circuit includes a polymer substrate with a dense array of external contacts, and a pattern of conductors ...

07/07/05 - 20050146005 - Semiconductor device and manufacturing method thereof
The semiconductor device includes a first semiconductor chip having first electrodes on a fringe region of a main surface thereof, and a second semiconductor chip smaller in area than the first semiconductor chip and having second electrodes on a main surface thereof. The first semiconductor chip and the second semiconductor ...

07/07/05 - 20050146004 - Semiconductor sensor device and method of producing the same
A semiconductor sensor device is provided with a semiconductor sensor chip having a plurality of electrodes formed on a substrate surface and a semiconductor sensor, and a signal processing IC chip mounted on the semiconductor sensor chip by flip-chip bonding. ...

07/07/05 - 20050146003 - Microdisplay packaging system
Some embodiments provide a microdisplay integrated circuit (IC), a substantially transparent protective cover coupled to the microdisplay IC, and a base coupled to the microdisplay IC. Thermal expansion characteristics of the base may be substantially similar to thermal expansion characteristics of the protective cover. According to some embodiments, at least ...

06/30/05 - 20050139975 - Tension resistant structure
Disclosed is a tension resistant structure. The tension resistant structure includes a TCP/COF (tape carrier package/chip on film) tape having first and second sprocket holes formed at upper and lower ends of the TCP/COF tape while forming an interval of a predetermined pitch therebetween and supporters provided at both sides ...

06/30/05 - 20050139974 - Chip package structure
A chip package structure is disclosed. The chip package structure includes an inner molding compound with a low modulus and a heat sink covering the chip. An outer molding compound having a modulus larger than the modulus of the inner molding compound can be applied around the heat sink. ...

06/30/05 - 20050139973 - Dicing die-bonding film
A dicing die-bonding film has a supporting substrate, an adhesive layer formed on the supporting substrate, and a die-bonding adhesive layer formed on the adhesive layer, and further has a mark for recognizing the position of the die-bonding adhesive layer. It is possible to provide a dicing die-bonding film in ...

06/30/05 - 20050139972 - System and method for improving solder joint reliability in an integrated circuit package
A system and method is disclosed for improving solder joint reliability in an integrated circuit package. Each terminal of a quad, flat, non-leaded integrated circuit package is formed having portions that define a solder slot in the bottom surface of the terminal. An external surface of the die pad of ...

06/23/05 - 20050133896 - Semiconductor package with a flip chip on a solder-resist leadframe
A semiconductor package includes a flip chip mounted on a plurality of leads and encapsulated by a molding compound. The upper surfaces of the leads includes a plurality of bump-bonding regions at the fan-in ends of the leads, and the lower surfaces of the leads include a plurality of outer ...

06/23/05 - 20050133895 - Manufacturing method of a semiconductor device
The yield of a sealing process for a semiconductor device which adopts a flip-chip mounting method is to be improved. In a molding process wherein plural semiconductor chip ICs mounted on a parts mounting surface of a substrate matrix through bump electrodes are to be sealed all together with a ...

06/23/05 - 20050133894 - Method and apparatus for improved power routing
An apparatus comprising: a die having a top metal layer, the top metal layer comprised of at least a first metal line and a second metal line; a passivation layer covering the top metal layer; a C4 bump on the passivation layer; and a first passivation opening and a second ...

06/16/05 - 20050127487 - Semiconductor package with improved solder joint reliability
A semiconductor package has an improved solder joint reliability. The package includes a semiconductor chip having chip pads, and metal lines electrically coupled to the chip pads. The package further includes ball lands provided on a ball-forming surface and electrically coupled to the metal lines. A solder resist covers the ...

06/16/05 - 20050127486 - Chip-scale package and carrier for use therewith
A carrier for use in a chip-scale package includes a film with at least one aperture defined therethrough. The aperture, which is alignable with a corresponding bond pad of a semiconductor device over which the carrier is to be positioned, is at least partially filled with conductive material. A contact ...

06/16/05 - 20050127485 - Light-emitting diode package structure
A light-emitting diode package structure is provided. The light-emitting diode package comprises an insulating sub-mount, a first patterned conductive-reflective film, a second patterned conductive-reflective film and a light-emitting diode chip. The insulating sub-mount has a first surface and a cavity therein. The first and the second patterned conductive-reflective film are ...

06/16/05 - 20050127484 - Die extender for protecting an integrated circuit die on a flip chip package
A semiconductor package is provided including a substrate, an integrated circuit die, and a die extender disposed on the substrate around the die. The die extender protects the die from damage. The die extender is typically at least as thick as the die. In addition, the die extender may frame ...

06/09/05 - 20050121762 - Temperature sustaining flip chip assembly process
A temperature sustaining flip chip process in which ILD cracking and delamination are lessened. A sequence of substrate prebake, underfill dispense, chip placement, solder reflow and underfill cure operative stages introduces lower thermal-mechanical stress during flip chip packaging. ...

06/09/05 - 20050121761 - Semiconductor device and method for fabricating the same
A semiconductor chip is mounted on a first surface of a substrate, the substrate having wiring formed on the first surface, so that a circuit formation surface of the semiconductor chip faces the first surface of the substrate and that electrodes provided on the circuit formation surface are connected with ...

06/09/05 - 20050121760 - Semiconductor module
A semiconductor module has a semiconductor device, a wiring substrate, an external terminal, and a conductor. The semiconductor device includes a main electrode through which a main electric current flows. The wiring substrate includes a base plate and a main wiring pattern provided on a surface of the base plate. ...

06/09/05 - 20050121759 - Semiconductor package with a chip on a support plate
A semiconductor package includes a support plate made of an electrically non-conducting material. Electrical connection vias are formed outside a chip fixing region provided on the front face of the support plate. Electrical connection wires connect pads on a front of the chip to pads on the front of the ...

06/09/05 - 20050121758 - Thin package for stacking integrated circuits
An improved structure and method for making interconnects for a thin package of stacked integrated circuits is described. The structure uses a spring contact to replace traditional solder balls in a stacked structure. The spring contacts are incorporated in an integrated circuit layer and may be made from stressed metal ...

06/09/05 - 20050121757 - Integrated circuit package overlay
A system may include an integrated circuit package substrate, a plurality of integrated circuit die attached to the integrated circuit package substrate, and a stiffener strip attached to the integrated circuit package substrate and surrounding two or more of the plurality of integrated circuit die. ...

06/02/05 - 20050116329 - Semiconductor package with low resistance package-to-die interconnect scheme for reduced die stresses
A low resistance package-to-die interconnect scheme for reduced die stresses includes a relatively low melting temperature and yield strength solder on the die and a relatively higher melting temperature and electrically conductive material such as copper on the substrate. A soldered joint connects the solder to the electrically conductive material ...

06/02/05 - 20050116328 - Substrate and method of manufacture thereof
A substrate of the present invention includes an electrically-insulating glass layer formed on both sides of a stainless-plate measuring substrate. The substrate also has a wiring pattern on the electrically-insulating glass layer, and an overcoat glass layer covering the wiring pattern. Thus, the present invention provides a substrate that is ...

06/02/05 - 20050116327 - Method of manufacturing a semiconductor device
The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural leads having respective to-be-connected surfaces exposed to outer ...

06/02/05 - 20050116326 - Formation of circuitry with modification of feature height
A connection component for mounting a chip or other microelectronic element is formed from a starting unit including posts projecting from a dielectric element by crushing or otherwise reducing the height of at least some of the posts. ...

06/02/05 - 20050116325 - Switching media for chip carrier device
The present invention is related to a switching media for chip carrier device, the switching media has a flexible board, the flexible board has circuits and a plurality of connecting points by way of etching thereon, the connecting points are able to connect to any type of chip of integrated ...

06/02/05 - 20050116324 - Semiconductor device and manufacturing method thereof
A plurality of semiconductor chips (14) each having a first main surface (14b) formed with electrode pads (21) and a second main surface (14c) opposite to the first main surface are respectively mounted on a chip mounting surface (12a) larger in area than the second main surface, of a wafer-shaped ...

06/02/05 - 20050116323 - Semiconductor device and method for assembling the same
In a semiconductor device provided with a thinned semiconductor element, the present invention intends to provide a semiconductor device in which a damage of a semiconductor element is inhibited from occurring in the neighborhood of an outer periphery and thereby the reliability can be secured. In order to realize the ...

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