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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Lead Frame > With Structure For Mounting Semiconductor Chip To Lead Frame (e.g., Configuration Of Die Bonding Flag, Absence Of A Die Bonding Flag, Recess For Led)

With Structure For Mounting Semiconductor Chip To Lead Frame (e.g., Configuration Of Die Bonding Flag, Absence Of A Die Bonding Flag, Recess For Led)

With Structure For Mounting Semiconductor Chip To Lead Frame (e.g., Configuration Of Die Bonding Flag, Absence Of A Die Bonding Flag, Recess For Led) patent applications listed include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

04/17/14 - 20140103507 - Optical device package and system
Optical device packages and systems are disclosed. In one embodiment, a system may comprise first and second optical device packages. A respective first and second optical path length may be associated with the first and second optical device packages. The first and second optical path lengths may be adjusted differently....

04/17/14 - 20140103508 - Encapsulating package for an integrated circuit
An apparatus is provided. An integrated circuit or IC is secured to a package housing. The IC has an IC substrate and an epitaxial layer formed over the substrate and having an active region and an upper surface. The upper surface is substantially exposed, and bond pads are formed over...

04/17/14 - 20140103509 - Semiconductor device and method of forming conductive ink layer as interconnect structure between semiconductor packages
A semiconductor device has a semiconductor die with an encapsulant deposited over and around the semiconductor die. An opening is formed in a first surface of the encapsulant by etching or LDA. A plurality of bumps is optionally formed over the semiconductor die. A bump is recessed within the opening...

04/17/14 - 20140103510 - Semiconductor device and method of manufacturing the same
A semiconductor device includes a source electrode pad formed to a front surface of a semiconductor chip and a metal clip (metal plate) to which a lead is electrically connected. The metal clip includes a chip-connecting portion electrically connected to the source electrode pad via a conductive bonding material, a...

04/17/14 - 20140103511 - Semiconductor device, semiconductor device storage method, semiconductor device manufacturing method, and semiconductor manufacturing apparatus
A semiconductor package has a semiconductor chip, a lead frame in which a semiconductor chip is mounted on a die pad, and a resin sealing the semiconductor chip and the die pad from an upper surface and a lower surface, the resin has a concave portion disposed at the surface...

04/17/14 - 20140103512 - Dual-leadframe multi-chip package
A dual-leadframe multi-chip package comprises a first leadframe with a first die pad, and a second leadframe with a second die pad; a first chip mounted on the first die pad functioning as a high-side MOSFET and second chip mounted on the second die pad functioning as a low-side MOSFET....

04/17/14 - 20140103513 - Semiconductor device with lead terminals having portions thereof extending obliquely
A semiconductor device in which a semiconductor chip, a lead frame and metal wires for electrically connecting the lead frame are sealed with sealing resin. The lead frame has a plurality of lead terminal portions, a supporting portion for supporting the semiconductor chip, and hanging lead portions supporting the supporting...

04/17/14 - 20140103514 - Power quad flat no-lead (pqfn) package having bootstrap diodes on a common integrated circuit (ic)
According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a multi-phase inverter situated on a leadframe. The PQFN package further includes drivers situated on the leadframe and configured to drive the multi-phase inverter. The PQFN package also includes bootstrap diodes respectively coupled to the drivers. The...

04/17/14 - 20140103515 - Semiconductor device
In a QFP with a chip-stacked structure in which a lower surface of a die pad is exposed from a lower surface of a sealing member, a semiconductor chip having a BCB film, which is made of a polymeric material containing at least benzocyclobutene in its backbone as an organic...

04/10/14 - 20140097526 - Packaged ic having printed dielectric adhesive on die pad
A method of assembling a packaged integrated circuit (IC) includes printing a viscous dielectric polymerizable material onto a die pad of a leadframe having metal terminals positioned outside the die pad. An IC die having a top side including a plurality of bond pads is placed with its bottom side...

04/10/14 - 20140097527 - Method of manufacture integrated circuit package
An integrated circuit package may be formed using a leadframe having an open space extending therethrough. A shunt is located within the open space such that it is not in contact with any portion of the leadframe. Tape may be applied to the lower surface of the leadframe to support...

04/10/14 - 20140097528 - Chip arrangements, a chip package and a method for manufacturing a chip arrangement
A chip package is provided. The chip package includes a chip carrier, a voltage supply lead, a sensing terminal and a chip disposed over the chip carrier. The chip includes a first terminal and a second terminal, wherein the first terminal electrically contacts the chip carrier. The chip package also...

04/10/14 - 20140097529 - Solder flow-impeding plug on a lead frame
Embodiments described herein relate to a method of manufacturing a packaged circuit having a solder flow-impeding plug on a lead frame. The method includes partially etching an internal surface of a lead frame at dividing lines between future sections of the lead frame as first partial etch forming a trench....

04/10/14 - 20140097530 - Integrated circuit package
An integrated circuit package and a manufacturing method thereof are provided. The integrated circuit package can include a substrate provided with a circuit pattern, a first set of bonding fingers and a second set of bonding fingers, a first chip stack mounted on the substrate and having a plurality of...

04/10/14 - 20140097531 - Power quad flat no-lead (pqfn) package in a single shunt inverter circuit
According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a driver integrated circuit (IC) situated on a leadframe. The PQFN package further includes low-side U-phase, low-side V-phase, and low-side W-phase power switches situated on the leadframe. A logic ground of the leadframe is coupled to a...

04/03/14 - 20140091447 - Semiconductor device and production method thereof
A semiconductor device according to an embodiment includes: a first unit device configured to include a semiconductor chip, a backside electrode that is in contact with a backside of the semiconductor chip, and a bonding wire in which one end is connected to the backside electrode; a second unit device...

04/03/14 - 20140091448 - Semiconductor package with corner pins
There are provided semiconductor packages having corner pins and methods for their fabrication. Such a semiconductor package includes a leadframe and a die paddle, the leadframe having first and second edge sides meeting to form a first corner. The semiconductor package also includes edge pins arrayed substantially parallel to the...

04/03/14 - 20140091449 - Power quad flat no-lead (pqfn) semiconductor package with leadframe islands for multi-phase power inverter
According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a U-phase output node situated on a first leadframe island of a leadframe, a V-phase output node situated on a second leadframe island of said leadframe, and a W-phase output node situated on a W-phase die pad...

03/27/14 - 20140084432 - Method and apparatus for multi-chip structure semiconductor package
A packaged semiconductor device may include a leadframe and a die carrier mounted to the leadframe. The die carrier is formed from an electrically and thermally conductive material. A die is mounted to a surface of the die carrier with die attach material having a melting point in excess of...

03/27/14 - 20140084433 - Semiconductor device having a clip contact
A semiconductor device comprises a carrier. Further, the semiconductor devices comprises a semiconductor chip comprising a first main surface and a second main surface opposite to the first main surface, wherein a first electrode is arranged on the first main surface and the semiconductor chip is mounted on the carrier...

03/27/14 - 20140084434 - Semiconductor device
A semiconductor device is reduced in size. The semiconductor device includes a die pad, a plurality of leads arranged around the die pad, a memory chip and a power source IC chip mounted over the die pad, a logic chip mounted over the memory chip, a plurality of down bonding...

03/27/14 - 20140084435 - Resin-encapsulated semiconductor device and method of manufacturing the same
A resin-encapsulated semiconductor device includes: a semiconductor element mounted on a die pad portion; a plurality of lead portions disposed so that distal end parts thereof are opposed to the die pad portion; a metal thin wire for connecting an electrode of the semiconductor element to the lead portion; and...

03/27/14 - 20140084436 - Semiconductor device and method of manufacturing the same
To enhance the reliability of connection between a semiconductor chip and a metal plate by ensuring sufficiently the thickness of a conductive material interposed between the semiconductor chip and the metal plate. A lead frame is arranged over a jig and a clip frame is arranged over protruding portions provided...

03/27/14 - 20140084437 - Semiconductor device including semiconductor chip mounted on lead frame
A semiconductor device includes a lead frame, a semiconductor chip, a substrate, a plurality of chip parts, a plurality of wires, and a resin member. The lead frame includes a chip mounted section and a plurality of lead sections. The semiconductor chip is mounted on the chip mounted section. The...

03/27/14 - 20140084438 - Semiconductor device and method of manufacturing same
A semiconductor device has a plurality of electronic components mounted on an insulating substrate formed with a metal layer, and electrically connected to each other or to the metal layer; a positioning wire member having a predetermined diameter and a predetermined length, and bonded to each of the plurality of...

03/20/14 - 20140077347 - Semiconductor device and method for manufacturing thereof
The present invention provides a semiconductor device including: a semiconductor chip; a lead frame provided with a recessed portion on at least one of an upper surface or a lower surface thereof, and electrically coupled to the semiconductor chip; and a resin section that molds the semiconductor chip and the...

03/20/14 - 20140077348 - Semiconductor device and lead frame used for the same
A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads...

03/13/14 - 20140070388 - Semiconductor device and method of assembling same
A semiconductor device has a die support and external leads formed integrally from a single sheet of electrically conductive material. A die mounting substrate is mounted on the die support, with bonding pads coupled to respective external connection pads on an external connector side of the substrate. A die is...

03/13/14 - 20140070389 - Manufacturing method of semiconductor device and semiconductor device
To enhance the reliability of a semiconductor device. The semiconductor device includes die pads, over which a first semiconductor chip and a second semiconductor chip are mounted respectively, a plurality of support pins that support each of the die pads, a plurality of inner leads and outer leads arranged around...

03/13/14 - 20140070390 - Multi-chip packaging structure and method
Disclosed are multi-chip packaging structures and methods. In one embodiment, a multi-chip packaging structure can include: (i) N chips, where N is an integer of at least two, and where an upper surface of each chip comprises a plurality of pads; (ii) a lead frame with a chip carrier and...

03/13/14 - 20140070391 - Lead carrier with print-formed terminal pads
A lead carrier provides support for an integrated circuit chip and associated leads during manufacture as packages containing such chips. The lead carrier includes a temporary support member with multiple package sites. Each package site includes a plurality of terminal pads surrounding a die attach region. The pads are formed...

03/13/14 - 20140070392 - Common drain power clip for battery pack protection mosfet
A first embodiment is a common drain+clip 20. It has a conventional drain contact on its bottom surface and is flip chip mounted on a half-etched leadframe 40 which has external source, gate and drain contacts connected to the sources, gate and common drain of the die 20. Common drain...

03/06/14 - 20140061883 - Leadframes, air-cavity packages, and electronic devices with offset vent holes, and methods of their manufacture
A leadframe (e.g., incorporated in a device package) includes a feature (e.g., a die pad or lead) with a vent hole formed between first and second opposed surfaces. The cross-sectional area of the vent hole varies substantially between the surfaces (e.g., the vent hole has a constricted portion). The vent...

03/06/14 - 20140061884 - Stacked die power converter
A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor switch (first power transistor) attached to the die pad, and a first metal clip attached to one side of the first die....

03/06/14 - 20140061885 - Power quad flat no-lead (pqfn) package
Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections have been disclosed. One exemplary embodiment comprises a PQFN semiconductor package comprising a leadframe, a driver integrated circuit (IC) coupled to the leadframe, a plurality of vertical conduction power...

03/06/14 - 20140061886 - Semiconductor package with interposer
The present application discloses various implementations of a semiconductor package including an organic substrate and one or more interposers having through-semiconductor vias (TSVs). Such a semiconductor package may include a contiguous organic substrate having a lower substrate segment including first and second pluralities of lower interconnect pads, the second plurality...

02/27/14 - 20140054759 - Method of manufacturing semiconductor device
A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed...

02/20/14 - 20140048919 - Integrated circuit packaging system with array contacts and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: providing an array of leads having a jumper lead and a covered contact; coupling an insulated bonding wire between the jumper lead and the covered contact; attaching an integrated circuit die over the covered contact; and coupling a bond...

02/20/14 - 20140048920 - Selective leadframe planishing
A metal leadframe strip (500) for semiconductor devices comprising a plurality of sites (510) for assembling semiconductor chips, the sites alternating with zones (520) for connecting the leadframe to molding compound runners; the sites (510) having mechanically rough and optically matte surfaces (511, 512); the zones (520) having at least...

02/13/14 - 20140042603 - Electronic device and method of fabricating an electronic device
A semiconductor device includes an electrically conducting carrier and a semiconductor chip disposed over the carrier. The semiconductor device also includes a porous diffusion solder layer provided between the carrier and the semiconductor chip....

02/13/14 - 20140042604 - Three-dimensional (3d) semiconductor package
Disclosed herein is a three-dimensional (3D) semiconductor package. The 3D semiconductor package includes a printed circuit board, a main interposer that is formed on the printed circuit board, a semiconductor device that is formed on the main interposer, and a support interposer that is disposed on the same plane as...

02/13/14 - 20140042605 - Lead frame package and method for manufacturing the same
In one embodiment, a lead frame package structure includes a lead frame having sides that surround a die paddle and on which a plurality of leads are formed. An electronic chip is attached to the die paddle and a case is attached to the lead frame to seal the leads...

02/06/14 - 20140035113 - Packaging and methods for packaging
A packaged integrated device can include a die attach pad having a top surface and a bottom surface. A plurality of leads physically and electrically separated from the die attach pad can be positioned at least partially around the perimeter of the die attach pad. An integrated device die can...

02/06/14 - 20140035114 - Semiconductor package structure and method
In one embodiment, a semiconductor package structure includes a substrate having a well region extending from a major surface. An interposer structure is attached to the substrate within the well region. The interposer structure has a major surface that is substantially co-planar with the major surface of the substrate. An...

02/06/14 - 20140035115 - Semiconductor device
A semiconductor device includes any one of a lead frame having a die pad portion and a circuit board, one or more semiconductor elements, a copper wire, an encapsulating member. The one or more semiconductor elements are mounted on any one of the die pad portion of the lead frame...

02/06/14 - 20140035116 - Top exposed semiconductor chip package
A semiconductor package and it manufacturing method includes a lead frame having a die pad, and a source lead with substantially a V groove disposed on a top surface. A semiconductor chip disposed on the die pad. A metal plate connected to a top surface electrode of the chip having...

01/30/14 - 20140027892 - Electric device package comprising a laminate and method of making an electric device package comprising a laminate
A system and method for manufacturing an electric device package are disclosed. An embodiment comprises comprising a first carrier contact, a first electric component, the first electric component having a first top surface and a first bottom surface, the first electric component comprising a first component contact disposed on the...

01/30/14 - 20140027893 - Circuit substrate for mounting chip, method for manufacturing same and chip package having same
A circuit board includes an insulation layer, an electrically conductive layer, and a solder mask layer. The insulation layer has a plurality of through holes passing through. The electrically conductive layer is formed on a surface of the insulation layer and covers the through holes. The electrically conductive layer has...

01/30/14 - 20140027894 - Resin molded semiconductor device and manufacturing method thereof
This invention is directed to provide a method of manufacturing a resin molded semiconductor device with high reliability by preventing a resin leakage portion from occurring due to burrs on a lead frame formed by punching. The method of manufacturing the resin molded semiconductor device according to the invention includes...

01/16/14 - 20140015117 - Very extremely thin semiconductor package
A package and method of making thereof. The package includes a first plated area, a second plated area, a die, a bond, and a molding. The die is attached to the first plated area, and the bond couples the die to the first and/or the second plated areas. The molding...

01/09/14 - 20140008777 - Thermal leadless array package with die attach pad locking feature
Embodiments of the present invention are directed to a thermal leadless array package with die attach pad locking feature and methods of producing the same. A copper layer is half-etched on both surfaces to define an array of package contacts and a die attach pad. Each die attach pad is...

01/09/14 - 20140008778 - Photonic semiconductor devices in llc assembly with controlled molding boundary and method for forming same
Embodiments of a laminate leadless carrier package are presented. The package includes an optoelectronic chip, a substrate supporting the optoelectronic chip, a plurality of conductive slotted vias, a wire bond pad disposed on the top surface of the substrate, a wire bond coupled to the optoelectronic chip and the wire...